1 /* $NetBSD: tegra234-clock.h,v 1.1.1.1 2021/11/07 16:50:00 jmcneill Exp $ */ 2 3 /* SPDX-License-Identifier: GPL-2.0 */ 4 /* Copyright (c) 2018-2019, NVIDIA CORPORATION. All rights reserved. */ 5 6 #ifndef DT_BINDINGS_CLOCK_TEGRA234_CLOCK_H 7 #define DT_BINDINGS_CLOCK_TEGRA234_CLOCK_H 8 9 /** @brief output of gate CLK_ENB_FUSE */ 10 #define TEGRA234_CLK_FUSE 40 11 /** @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_SDMMC4 */ 12 #define TEGRA234_CLK_SDMMC4 123 13 /** @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_UARTA */ 14 #define TEGRA234_CLK_UARTA 155 15 16 #endif 17
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