1 /* $NetBSD: admpci.c,v 1.18 2022/09/29 07:00:46 skrll Exp $ */ 2 3 /*- 4 * Copyright (c) 2007 David Young. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or 7 * without modification, are permitted provided that the following 8 * conditions are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above 12 * copyright notice, this list of conditions and the following 13 * disclaimer in the documentation and/or other materials provided 14 * with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY 17 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, 18 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A 19 * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR 20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, 21 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 22 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 23 * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR 25 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT 26 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 27 * OF SUCH DAMAGE. 28 */ 29 /*- 30 * Copyright (c) 2006 Itronix Inc. 31 * All rights reserved. 32 * 33 * Written by Garrett D'Amore for Itronix Inc. 34 * 35 * Redistribution and use in source and binary forms, with or without 36 * modification, are permitted provided that the following conditions 37 * are met: 38 * 1. Redistributions of source code must retain the above copyright 39 * notice, this list of conditions and the following disclaimer. 40 * 2. Redistributions in binary form must reproduce the above copyright 41 * notice, this list of conditions and the following disclaimer in the 42 * documentation and/or other materials provided with the distribution. 43 * 3. The name of Itronix Inc. may not be used to endorse 44 * or promote products derived from this software without specific 45 * prior written permission. 46 * 47 * THIS SOFTWARE IS PROVIDED BY ITRONIX INC. ``AS IS'' AND 48 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 49 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 50 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ITRONIX INC. BE LIABLE FOR ANY 51 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 52 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 53 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 54 * ON ANY THEORY OF LIABILITY, WHETHER IN 55 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 56 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 57 * POSSIBILITY OF SUCH DAMAGE. 58 */ 59 60 #include "opt_pci.h" 61 #include "pci.h" 62 63 #include <sys/cdefs.h> 64 __KERNEL_RCSID(0, "$NetBSD: admpci.c,v 1.18 2022/09/29 07:00:46 skrll Exp $"); 65 66 #include <sys/param.h> 67 #include <sys/types.h> 68 #include <sys/bus.h> 69 #include <sys/cpu.h> 70 #include <sys/time.h> 71 #include <sys/systm.h> 72 #include <sys/errno.h> 73 #include <sys/device.h> 74 #include <sys/extent.h> 75 76 #include <uvm/uvm_extern.h> 77 78 #include <dev/pci/pcivar.h> 79 #include <dev/pci/pcireg.h> 80 #include <dev/pci/pciconf.h> 81 82 #ifdef PCI_NETBSD_CONFIGURE 83 #include <mips/cache.h> 84 #endif 85 86 #include <mips/adm5120/include/adm5120_mainbusvar.h> 87 #include <mips/adm5120/include/adm5120reg.h> 88 #include <mips/adm5120/include/adm5120var.h> 89 90 #ifdef ADMPCI_DEBUG 91 int admpci_debug = 1; 92 #define ADMPCI_DPRINTF(__fmt, ...) \ 93 do { \ 94 if (admpci_debug) \ 95 printf((__fmt), __VA_ARGS__); \ 96 } while (/*CONSTCOND*/0) 97 #else /* !ADMPCI_DEBUG */ 98 #define ADMPCI_DPRINTF(__fmt, ...) do { } while (/*CONSTCOND*/0) 99 #endif /* ADMPCI_DEBUG */ 100 101 #define ADMPCI_TAG_BUS_MASK __BITS(23, 16) 102 /* Bit 11 is reserved. It selects the AHB-PCI bridge. Let device 0 103 * be the bridge. For all other device numbers, let bit[11] == 0. 104 */ 105 #define ADMPCI_TAG_DEVICE_MASK __BITS(15, 11) 106 #define ADMPCI_TAG_DEVICE_SUBMASK __BITS(15, 12) 107 #define ADMPCI_TAG_DEVICE_BRIDGE __BIT(11) 108 #define ADMPCI_TAG_FUNCTION_MASK __BITS(10, 8) 109 #define ADMPCI_TAG_REGISTER_MASK __BITS(7, 0) 110 111 #define ADMPCI_MAX_DEVICE 112 113 struct admpci_softc { 114 device_t sc_dev; 115 struct mips_pci_chipset sc_pc; 116 117 bus_space_tag_t sc_memt; 118 bus_space_tag_t sc_iot; 119 120 bus_space_tag_t sc_conft; 121 bus_space_handle_t sc_addrh; 122 bus_space_handle_t sc_datah; 123 }; 124 125 int admpcimatch(device_t, cfdata_t, void *); 126 void admpciattach(device_t, device_t, void *); 127 128 #if NPCI > 0 129 static void admpci_attach_hook(device_t, device_t, 130 struct pcibus_attach_args *); 131 static int admpci_bus_maxdevs(void *, int); 132 static pcitag_t admpci_make_tag(void *, int, int, int); 133 static void admpci_decompose_tag(void *, pcitag_t, int *, int *, int *); 134 static pcireg_t admpci_conf_read(void *, pcitag_t, int); 135 static void admpci_conf_write(void *, pcitag_t, int, pcireg_t); 136 static const char *admpci_intr_string(void *, pci_intr_handle_t, char *, size_t); 137 static void admpci_conf_interrupt(void *, int, int, int, int, int *); 138 static void *admpci_intr_establish(void *, pci_intr_handle_t, int, 139 int (*)(void *), void *); 140 static void admpci_intr_disestablish(void *, void *); 141 static int admpci_intr_map(const struct pci_attach_args *, pci_intr_handle_t *); 142 #endif /* NPCI > 0 */ 143 144 CFATTACH_DECL_NEW(admpci, sizeof(struct admpci_softc), 145 admpcimatch, admpciattach, NULL, NULL); 146 147 int admpci_found = 0; 148 149 /* 150 * Physical PCI addresses are 36-bits long, so we need to have 151 * adequate storage space for them. 152 */ 153 #if NPCI > 0 154 #if !defined(_MIPS_PADDR_T_64BIT) && !defined(_LP64) 155 #error "admpci requires 64 bit paddr_t!" 156 #endif 157 #endif 158 159 #define PCI_IO_START ADM5120_BASE_PCI_IO 160 #define PCI_IO_SIZE (ADM5120_BASE_PCI_CONFADDR - ADM5120_BASE_PCI_IO) 161 162 #define PCI_MEM_START1 ADM5120_BASE_PCI_MEM 163 #define PCI_MEM_SIZE1 (ADM5120_BASE_PCI_IO - ADM5120_BASE_PCI_MEM) 164 165 #define PCI_MEM_START2 ADM5120_BOTTOM 166 #define PCI_MEM_SIZE2 (ADM5120_BASE_SRAM1 - ADM5120_BOTTOM) 167 168 int 169 admpcimatch(device_t parent, cfdata_t match, void *aux) 170 { 171 struct mainbus_attach_args *ma = (struct mainbus_attach_args *)aux; 172 173 return !admpci_found && strcmp(ma->ma_name, "admpci") == 0; 174 } 175 176 void 177 admpciattach(device_t parent, device_t self, void *aux) 178 { 179 struct adm5120_config *admc = &adm5120_configuration; 180 struct admpci_softc *sc = device_private(self); 181 struct mainbus_attach_args *ma = (struct mainbus_attach_args *)aux; 182 #if NPCI > 0 183 struct pcibus_attach_args pba; 184 #endif 185 186 admpci_found = 1; 187 188 sc->sc_dev = self; 189 sc->sc_conft = ma->ma_obiot; 190 if (bus_space_map(sc->sc_conft, ADM5120_BASE_PCI_CONFDATA, 4, 0, 191 &sc->sc_datah) != 0) { 192 aprint_error( 193 ": unable to map PCI Configuration Data register\n"); 194 return; 195 } 196 if (bus_space_map(sc->sc_conft, ADM5120_BASE_PCI_CONFADDR, 4, 0, 197 &sc->sc_addrh) != 0) { 198 aprint_error( 199 ": unable to map PCI Configuration Address register\n"); 200 return; 201 } 202 203 aprint_normal(": ADM5120 Host-PCI Bridge, " 204 "data %"PRIxBSH" addr %"PRIxBSH", sc %p\n", 205 sc->sc_datah, sc->sc_addrh, sc); 206 207 #if NPCI > 0 208 sc->sc_memt = &admc->pcimem_space; 209 sc->sc_iot = &admc->pciio_space; 210 211 sc->sc_pc.pc_conf_v = sc; 212 sc->sc_pc.pc_attach_hook = admpci_attach_hook; 213 sc->sc_pc.pc_bus_maxdevs = admpci_bus_maxdevs; 214 sc->sc_pc.pc_make_tag = admpci_make_tag; 215 sc->sc_pc.pc_decompose_tag = admpci_decompose_tag; 216 sc->sc_pc.pc_conf_read = admpci_conf_read; 217 sc->sc_pc.pc_conf_write = admpci_conf_write; 218 219 sc->sc_pc.pc_intr_v = sc; 220 sc->sc_pc.pc_intr_map = admpci_intr_map; 221 sc->sc_pc.pc_intr_string = admpci_intr_string; 222 sc->sc_pc.pc_intr_establish = admpci_intr_establish; 223 sc->sc_pc.pc_intr_disestablish = admpci_intr_disestablish; 224 sc->sc_pc.pc_conf_interrupt = admpci_conf_interrupt; 225 226 #ifdef ADMPCI_DEBUG 227 pcitag_t tag = pci_make_tag(&sc->sc_pc, 0, 0, 0); 228 ADMPCI_DPRINTF("%s: BAR 0x10 0x%08x\n", __func__, 229 pci_conf_read(&sc->sc_pc, tag, PCI_MAPREG_START)); 230 #endif 231 232 #ifdef PCI_NETBSD_CONFIGURE 233 struct pciconf_resources *pcires = pciconf_resource_init(); 234 235 pciconf_resource_add(pcires, PCICONF_RESOURCE_IO, 236 PCI_IO_START, PCI_IO_SIZE); 237 pciconf_resource_add(pcires, PCICONF_RESOURCE_MEM, 238 PCI_MEM_START1, PCI_MEM_SIZE1); 239 240 /* XXX Is this one really needed? */ 241 pciconf_resource_add(pcires, PCICONF_RESOURCE_MEM, 242 PCI_MEM_START2, PCI_MEM_SIZE2); 243 244 pci_configure_bus(&sc->sc_pc, pcires, 245 0, mips_cache_info.mci_dcache_align); 246 247 pciconf_resource_fini(pcires); 248 #endif 249 250 pba.pba_iot = sc->sc_iot; 251 pba.pba_memt = sc->sc_memt; 252 /* XXX: review dma tag logic */ 253 pba.pba_dmat = ma->ma_dmat; 254 pba.pba_dmat64 = NULL; 255 pba.pba_pc = &sc->sc_pc; 256 pba.pba_flags = PCI_FLAGS_IO_OKAY | PCI_FLAGS_MEM_OKAY; 257 pba.pba_bus = 0; 258 pba.pba_bridgetag = NULL; 259 260 config_found(self, &pba, pcibusprint, 261 CFARGS(.iattr = "pcibus")); 262 #endif /* NPCI > 0 */ 263 } 264 265 #if NPCI > 0 266 267 void 268 admpci_attach_hook(device_t parent, device_t self, 269 struct pcibus_attach_args *pba) 270 { 271 } 272 273 /* There are at most four devices on bus 0. The ADM5120 has 274 * request/grant lines for 3 PCI devices: 1, 2, and 3. The host 275 * bridge is device 0. 276 */ 277 int 278 admpci_bus_maxdevs(void *v, int bus) 279 { 280 if (bus == 0) 281 return 4; 282 283 return 1 + __SHIFTOUT_MASK(ADMPCI_TAG_DEVICE_MASK); 284 } 285 286 pcitag_t 287 admpci_make_tag(void *v, int bus, int device, int function) 288 { 289 if (bus > __SHIFTOUT_MASK(ADMPCI_TAG_BUS_MASK) || 290 device > __SHIFTOUT_MASK(ADMPCI_TAG_DEVICE_MASK) || 291 function > __SHIFTOUT_MASK(ADMPCI_TAG_FUNCTION_MASK)) 292 panic("%s: bad request", __func__); 293 294 return __SHIFTIN(bus, ADMPCI_TAG_BUS_MASK) | 295 __SHIFTIN(device, ADMPCI_TAG_DEVICE_MASK) | 296 __SHIFTIN(function, ADMPCI_TAG_FUNCTION_MASK); 297 } 298 299 void 300 admpci_decompose_tag(void *v, pcitag_t tag, int *b, int *d, int *f) 301 { 302 int bus, device, function; 303 304 bus = __SHIFTOUT(tag, ADMPCI_TAG_BUS_MASK); 305 device = __SHIFTOUT(tag, ADMPCI_TAG_DEVICE_MASK); 306 function = __SHIFTOUT(tag, ADMPCI_TAG_FUNCTION_MASK); 307 308 if (b != NULL) 309 *b = bus; 310 if (d != NULL) 311 *d = device; 312 if (f != NULL) 313 *f = function; 314 } 315 316 static int 317 admpci_tag_to_addr(void *v, pcitag_t tag, int reg, bus_addr_t *addrp) 318 { 319 int bus, device, function; 320 321 KASSERT(addrp != NULL); 322 323 if ((unsigned int)reg >= PCI_CONF_SIZE) 324 return -1; 325 326 /* panics if tag is not well-formed */ 327 admpci_decompose_tag(v, tag, &bus, &device, &function); 328 if (reg > __SHIFTOUT_MASK(ADMPCI_TAG_REGISTER_MASK)) 329 panic("%s: bad register", __func__); 330 331 *addrp = 0x80000000 | tag | __SHIFTIN(reg, ADMPCI_TAG_REGISTER_MASK); 332 333 return 0; 334 } 335 336 static pcireg_t 337 admpci_conf_read(void *v, pcitag_t tag, int reg) 338 { 339 int s; 340 struct admpci_softc *sc = (struct admpci_softc *)v; 341 uint32_t data; 342 bus_addr_t addr; 343 344 ADMPCI_DPRINTF("%s: sc %p tag %lx reg %d\n", __func__, (void *)sc, tag, 345 reg); 346 347 if (admpci_tag_to_addr(v, tag, reg, &addr) == -1) 348 return 0xffffffff; 349 350 ADMPCI_DPRINTF("%s: sc_addrh %lx sc_datah %lx addr %lx\n", __func__, 351 sc->sc_addrh, sc->sc_datah, addr); 352 353 s = splhigh(); 354 bus_space_write_4(sc->sc_conft, sc->sc_addrh, 0, addr); 355 data = bus_space_read_4(sc->sc_conft, sc->sc_datah, 0); 356 splx(s); 357 358 ADMPCI_DPRINTF("%s: read 0x%" PRIx32 "\n", __func__, data); 359 return data; 360 } 361 362 void 363 admpci_conf_write(void *v, pcitag_t tag, int reg, pcireg_t data) 364 { 365 int s; 366 struct admpci_softc *sc = (struct admpci_softc *)v; 367 bus_addr_t addr; 368 369 ADMPCI_DPRINTF("%s: sc %p tag %lx reg %d\n", __func__, (void *)sc, tag, 370 reg); 371 372 if (admpci_tag_to_addr(v, tag, reg, &addr) == -1) 373 return; 374 375 ADMPCI_DPRINTF("%s: sc_addrh %lx sc_datah %lx addr %lx\n", __func__, 376 sc->sc_addrh, sc->sc_datah, addr); 377 378 s = splhigh(); 379 bus_space_write_4(sc->sc_conft, sc->sc_addrh, 0, addr); 380 bus_space_write_4(sc->sc_conft, sc->sc_datah, 0, data); 381 splx(s); 382 } 383 384 const char * 385 admpci_intr_string(void *v, pci_intr_handle_t ih, char *buf, size_t len) 386 { 387 (void)snprintf(buf, len, "irq %u", (unsigned)ih); 388 return buf; 389 } 390 391 void * 392 admpci_intr_establish(void *v, pci_intr_handle_t ih, int ipl, 393 int (*handler)(void *), void *arg) 394 { 395 return adm5120_intr_establish(ih, ipl, handler, arg); 396 } 397 398 void 399 admpci_intr_disestablish(void *v, void *cookie) 400 { 401 adm5120_intr_disestablish(cookie); 402 } 403 404 void 405 admpci_conf_interrupt(void *v, int bus, int dev, int ipin, int swiz, int *iline) 406 { 407 /* 408 * We let the machdep_pci_intr_map take care of IRQ routing. 409 * On some platforms the BIOS may have handled this properly, 410 * on others it might not have. For now we avoid clobbering 411 * the settings establishsed by the BIOS, so that they will be 412 * there if the platform logic is confident that it can rely 413 * on them. 414 */ 415 } 416 417 /* 418 * Map the bus 0 device numbers 1, 2, and 3 to IRQ 6, 7, and 8, 419 * respectively. 420 * 421 * XXX How to handle bridges? 422 */ 423 static int 424 admpci_intr_map(const struct pci_attach_args *pa, pci_intr_handle_t *ihp) 425 { 426 int bus, device, function; 427 428 admpci_decompose_tag(pa->pa_pc->pc_conf_v, pa->pa_tag, 429 &bus, &device, &function); 430 431 if (bus != 0 || device > 3) 432 return -1; 433 434 *ihp = (device - 1) + 6; 435 436 return 0; 437 } 438 #endif 439
Indexes created Mon Oct 27 20:09:55 GMT 2025