| /src/sys/arch/hpcsh/dev/ |
| j6x0lcd.c | 180 uint16_t bcr, bdr; local in function:j6x0lcd_attach
202 bcr = hd64461_reg_read_2(HD64461_GPBCR_REG16);
208 bcr &= HD64461_GPBCR_J6X0_LCD_OFF_MASK;
209 bcr |= HD64461_GPBCR_J6X0_LCD_OFF_BITS; /* output mode */
227 - j6x0lcd_contrast_raw(bcr,
241 j6x0lcd_contrast_raw(bcr,
246 hd64461_reg_write_2(HD64461_GPBCR_REG16, bcr);
292 j6x0lcd_contrast_raw(uint16_t bcr, int width, const uint8_t *pin)
301 c = (bcr >> (pin[bit] << 1)) & 0x3;
317 uint16_t bcr; local in function:j6x0lcd_contrast_set
[all...] |
| /src/sys/arch/x86/pci/ |
| pci_ranges.c | 164 int bus, int dev, int fun, pcireg_t csr, pcireg_t bcr)
183 (bcr & PCI_BRIDGE_CONTROL_VGA) == 0) {
192 r[1].r_val = bcr;
433 int bus, int dev, int fun, pcireg_t csr, pcireg_t bcr)
452 (bcr & PCI_BRIDGE_CONTROL_VGA) == 0) {
461 r[1].r_val = bcr;
611 pcireg_t bcr, bhlcr, limit, mem, premem, hiprebase, hiprelimit; local in function:mmio_range_infer
649 bcr = pci_conf_read(pc, tag, PCI_BRIDGE_CONTROL_REG);
654 (bcr & CB_BCR_PREFETCH_MEMWIN0) != 0);
659 (bcr & CB_BCR_PREFETCH_MEMWIN1) != 0)
[all...] |
| /src/sys/arch/aarch64/aarch64/ |
| db_machdep.c | 652 aarch64_set_bcr_bvr(int n, uint64_t bcr, uint64_t bvr)
654 #define DBG_BCR_BVR_SET(regno, bcr, bvr) \
656 reg_dbgbcr ## regno ## _el1_write(bcr); \
661 case 0: DBG_BCR_BVR_SET(0, bcr, bvr); break;
662 case 1: DBG_BCR_BVR_SET(1, bcr, bvr); break;
663 case 2: DBG_BCR_BVR_SET(2, bcr, bvr); break;
664 case 3: DBG_BCR_BVR_SET(3, bcr, bvr); break;
665 case 4: DBG_BCR_BVR_SET(4, bcr, bvr); break;
666 case 5: DBG_BCR_BVR_SET(5, bcr, bvr); break;
667 case 6: DBG_BCR_BVR_SET(6, bcr, bvr); break
712 uint64_t bcr, bvr; local in function:aarch64_breakpoint_set
[all...] |
| /src/sys/dev/pci/ |
| pccbb.c | 715 pcireg_t bcr, bhlc, cbctl, csr, lscp, mfunc, mrburst, slotctl, sockctl, local in function:pccbb_chipinit
763 bcr = pci_conf_read(pc, tag, PCI_BRIDGE_CONTROL_REG);
764 bcr |= CB_BCR_INTR_IREQ_ENABLE; /* disable PCI Intr */
765 bcr |= CB_BCR_WRITE_POST_ENABLE; /* enable write post */
767 bcr |= PCI_BRIDGE_CONTROL_SECBR;
771 bcr |= PCI_BRIDGE_CONTROL_MABRT;
772 bcr |= PCI_BRIDGE_CONTROL_SERR;
773 bcr |= PCI_BRIDGE_CONTROL_PERE;
774 pci_conf_write(pc, tag, PCI_BRIDGE_CONTROL_REG, bcr);
1441 uint32_t bcr = pci_conf_read(sc->sc_pc, sc->sc_tag local in function:cb_reset
1674 pcireg_t bcr, cbctrl; local in function:pccbb_intr_route
3097 pcireg_t bcr = pci_conf_read(pc, tag, PCI_BRIDGE_CONTROL_REG); local in function:pccbb_winset
[all...] |
