| /src/sys/external/bsd/drm2/dist/drm/radeon/ |
| radeon_rv515.c | 305 u32 crtc_enabled, tmp, frame_count, blackout; local in function:rv515_mc_stop
351 blackout = RREG32(R700_MC_CITF_CNTL);
353 blackout = RREG32(R600_CITF_CNTL);
354 if ((blackout & R600_BLACKOUT_MASK) != R600_BLACKOUT_MASK) {
357 /* blackout the MC */
358 blackout |= R600_BLACKOUT_MASK;
360 WREG32(R700_MC_CITF_CNTL, blackout);
362 WREG32(R600_CITF_CNTL, blackout);
|
| radeon_ni.c | 647 u32 mem_type, running, blackout = 0; local in function:ni_mc_load_microcode
683 blackout = RREG32(MC_SHARED_BLACKOUT_CNTL);
714 WREG32(MC_SHARED_BLACKOUT_CNTL, blackout);
|
| radeon_evergreen.c | 2671 u32 crtc_enabled, tmp, frame_count, blackout; local in function:evergreen_mc_stop
2739 blackout = RREG32(MC_SHARED_BLACKOUT_CNTL);
2740 if ((blackout & BLACKOUT_MODE_MASK) != 1) {
2743 /* blackout the MC */
2744 blackout &= ~BLACKOUT_MODE_MASK;
2745 WREG32(MC_SHARED_BLACKOUT_CNTL, blackout | 1);
|
| /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/ |
| amdgpu_gmc_v6_0.c | 82 u32 blackout; local in function:gmc_v6_0_mc_stop
86 blackout = RREG32(mmMC_SHARED_BLACKOUT_CNTL);
87 if (REG_GET_FIELD(blackout, MC_SHARED_BLACKOUT_CNTL, BLACKOUT_MODE) != 1) {
90 /* blackout the MC */
91 blackout = REG_SET_FIELD(blackout,
93 WREG32(mmMC_SHARED_BLACKOUT_CNTL, blackout | 1);
|
| amdgpu_gmc_v7_0.c | 97 u32 blackout; local in function:gmc_v7_0_mc_stop
101 blackout = RREG32(mmMC_SHARED_BLACKOUT_CNTL);
102 if (REG_GET_FIELD(blackout, MC_SHARED_BLACKOUT_CNTL, BLACKOUT_MODE) != 1) {
105 /* blackout the MC */
106 blackout = REG_SET_FIELD(blackout,
108 WREG32(mmMC_SHARED_BLACKOUT_CNTL, blackout | 1);
|
| amdgpu_gmc_v8_0.c | 185 u32 blackout; local in function:gmc_v8_0_mc_stop
189 blackout = RREG32(mmMC_SHARED_BLACKOUT_CNTL);
190 if (REG_GET_FIELD(blackout, MC_SHARED_BLACKOUT_CNTL, BLACKOUT_MODE) != 1) {
193 /* blackout the MC */
194 blackout = REG_SET_FIELD(blackout,
196 WREG32(mmMC_SHARED_BLACKOUT_CNTL, blackout);
|
