| /src/sys/arch/arm/sunxi/ |
| sun6i_spi.c | 194 uint32_t tcr, cctl; local in function:sun6ispi_configure
228 for (cctl = 0; cctl <= __SHIFTOUT_MASK(SPI_CCTL_CDR1); cctl++) {
229 if ((sc->sc_modclkrate / (1<<cctl)) <= speed)
234 cctl = __SHIFTIN(cctl, SPI_CCTL_CDR1);
236 cctl = howmany(sc->sc_modclkrate, 2 * speed) - 1;
237 cctl = SPI_CCTL_DRS|__SHIFTIN(cctl, SPI_CCTL_CDR2)
[all...] |
| sun4i_spi.c | 162 uint32_t ctl, cctl; local in function:sun4ispi_configure
194 for (cctl = 0; cctl <= __SHIFTOUT_MASK(SPI_CCTL_CDR1); cctl++) {
195 if ((sc->sc_modclkrate / (1 << cctl)) <= speed)
200 cctl = __SHIFTIN(cctl, SPI_CCTL_CDR1);
202 cctl = howmany(sc->sc_modclkrate, 2 * speed) - 1;
203 cctl = SPI_CCTL_DRS|__SHIFTIN(cctl, SPI_CCTL_CDR2)
[all...] |
| /src/sys/dev/pci/ |
| cs428x.h | 136 uint32_t cctl; member in struct:cs428x_softc
149 uint32_t cctl; member in struct:cs428x_softc::__anonab2d7656010a::__anonab2d76560208
|
| cs4280.c | 663 uint32_t cctl, cie; local in function:cs4280_trigger_input
712 cctl = BA1READ4(sc, CS4280_CCTL) & ~CCTL_MASK;
713 cctl |= sc->cctl;
714 BA1WRITE4(sc, CS4280_CCTL, cctl);
740 sc->sc_suspend_state.cs4280.cctl = BA1READ4(sc, CS4280_CCTL);
743 DPRINTF(("cctl=0x%08x cie=0x%08x cba=0x%08x\n",
744 sc->sc_suspend_state.cs4280.cctl,
786 DPRINTF(("cctl=0x%08x cie=0x%08x cba=0x%08x\n",
787 sc->sc_suspend_state.cs4280.cctl,
[all...] |
| /src/sys/dev/ic/ |
| ninjascsi32.c | 1682 njsc32_cmd_reload(struct njsc32_softc *sc, struct njsc32_cmd *cmd, int cctl)
1704 njsc32_write_2(sc, NJSC32_REG_COMMAND_CONTROL, cctl);
1733 int cctl = 0; local in function:njsc32_msgin
2092 cctl = NJSC32_CMD_CLEAR_CDB_FIFO_PTR |
2101 cctl |= NJSC32_CMD_AUTO_MSGIN_00_04 | NJSC32_CMD_AUTO_MSGIN_02;
2104 cctl |= NJSC32_CMD_AUTO_ATN;
2110 njsc32_cmd_reload(sc, cmd, cctl);
2112 njsc32_write_2(sc, NJSC32_REG_COMMAND_CONTROL, cctl);
2127 int cctl; local in function:njsc32_msgout
2136 cctl = NJSC32_CMD_CLEAR_CDB_FIFO_PTR
[all...] |
