| /src/sys/arch/i386/i386/ |
| mtrr_k6.c | 105 uint32_t origcr0, cr0; local
110 origcr0 = cr0 = rcr0();
111 cr0 |= CR0_CD;
112 lcr0(cr0);
|
| /src/sys/arch/x86/x86/ |
| cpu_rng.c | 204 uint32_t cr0, status, nbytes; local
208 * requires the CR0 TS and CR0 EM bits to be clear. We disable
210 * interrupt handler changing CR0 while we work -- although
217 cr0 = rcr0();
218 lcr0(cr0 & ~(CR0_EM|CR0_TS));
226 /* Restore CR0 and interrupts. */
227 lcr0(cr0);
|
| via_padlock.c | 342 unsigned int cr0; local
347 cr0 = rcr0(); /* Permit access to SIMD/FPU path */
348 lcr0(cr0 & ~(CR0_EM|CR0_TS));
356 lcr0(cr0);
|
| mtrr_i686.c | 168 /* XXX cr0 is 64-bit on amd64 too, but the upper bits are
172 uint32_t cr0; local
195 * 4. Enter the no-fill cache mode (set the CD flag in CR0 to 1 and
199 origcr0 = cr0 = rcr0();
200 cr0 |= CR0_CD;
201 cr0 &= ~CR0_NW;
202 lcr0(cr0);
268 * NW flags in CR0 to 0)
|
| /src/external/cddl/osnet/dev/fbt/x86/ |
| fbt_isa.c | 184 u_long psl, cr0; local
191 cr0 = rcr0();
192 lcr0(cr0 & ~CR0_WP);
205 lcr0(cr0);
|
| /src/sys/external/mit/xen-include-public/dist/xen/include/public/hvm/ |
| hvm_vcpu.h | 40 uint32_t cr0; member in struct:vcpu_hvm_x86_32
103 uint64_t cr0; member in struct:vcpu_hvm_x86_64
|
| /src/sys/arch/arm/sa11x0/ |
| sa11x0_com.c | 842 u_int cr0; local
844 cr0 = (cflag & PARENB) ? CR0_PE : 0;
845 cr0 |= (cflag & PARODD) ? 0 : CR0_OES;
846 cr0 |= (cflag & CSTOPB) ? CR0_SBS : 0;
847 cr0 |= ((cflag & CSIZE) == CS8) ? CR0_DSS : 0;
849 return cr0;
858 u_int cr0; local
889 cr0 = cflag2cr0(t->c_cflag);
894 sc->sc_cr0 = cr0;
1429 int brd, cr0; local
[all...] |
| /src/sys/arch/powerpc/include/ |
| asm.h | 259 # define cr0 0 macro
|
| /src/sys/external/mit/xen-include-public/dist/xen/include/public/ |
| vm_event.h | 184 uint64_t cr0; member in struct:vm_event_regs_x86
|
| /src/sys/external/mit/xen-include-public/dist/xen/include/public/arch-x86/hvm/ |
| save.h | 78 uint64_t cr0; member in struct:hvm_hw_cpu
192 uint64_t cr0; member in struct:hvm_hw_cpu_compat
|
| /src/external/gpl3/gcc/dist/gcc/config/rs6000/ |
| ppc-asm.h | 62 #define cr0 0 macro
|
| /src/external/gpl3/gcc.old/dist/gcc/config/rs6000/ |
| ppc-asm.h | 62 #define cr0 0 macro
|
| /src/sys/dev/nvmm/x86/ |
| nvmm_x86_svm.c | 447 uint64_t cr0; member in struct:vmcb_state
1843 if ((vmcb->state.cr0 ^
1918 vmcb->state.cr0 = state->crs[NVMM_X64_CR_CR0];
2055 state->crs[NVMM_X64_CR_CR0] = vmcb->state.cr0;
2198 * - CR0_SPEC [CR0 writes changing other fields than CR0.TS or CR0.MP]
2237 * - WCR_SPEC(0..15) [writes of CR0-15, received after instruction]
|
| nvmm_x86_vmx.c | 1629 * fakecr0 is the value the guest believes is in %cr0. realcr0 is the
1630 * actual value in %cr0.
2551 uint64_t cr0, cr3, cr4, efer; local
2554 cr0 = vmx_vmread(VMCS_GUEST_CR0);
2555 if ((cr0 ^ state->crs[NVMM_X64_CR_CR0]) & CR0_TLB_FLUSH) {
2963 /* Set the CR0 mask. Any change of these bits causes a VMEXIT. */
3376 printf("NVMM: CR0 requirements not satisfied\n");
|
| /src/sys/lib/libkern/arch/hppa/ |
| milli.S | 171 cr0: .equ 0 label
|
