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      1 /*
      2  * Permission is hereby granted, free of charge, to any person obtaining a copy
      3  * of this software and associated documentation files (the "Software"), to
      4  * deal in the Software without restriction, including without limitation the
      5  * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
      6  * sell copies of the Software, and to permit persons to whom the Software is
      7  * furnished to do so, subject to the following conditions:
      8  *
      9  * The above copyright notice and this permission notice shall be included in
     10  * all copies or substantial portions of the Software.
     11  *
     12  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
     13  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
     14  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
     15  * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
     16  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
     17  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
     18  * DEALINGS IN THE SOFTWARE.
     19  *
     20  * Copyright (c) 2015, Roger Pau Monne <roger.pau (at) citrix.com>
     21  */
     22 
     23 #ifndef __XEN_PUBLIC_HVM_HVM_VCPU_H__
     24 #define __XEN_PUBLIC_HVM_HVM_VCPU_H__
     25 
     26 #include "../xen.h"
     27 
     28 struct vcpu_hvm_x86_32 {
     29     uint32_t eax;
     30     uint32_t ecx;
     31     uint32_t edx;
     32     uint32_t ebx;
     33     uint32_t esp;
     34     uint32_t ebp;
     35     uint32_t esi;
     36     uint32_t edi;
     37     uint32_t eip;
     38     uint32_t eflags;
     39 
     40     uint32_t cr0;
     41     uint32_t cr3;
     42     uint32_t cr4;
     43 
     44     uint32_t pad1;
     45 
     46     /*
     47      * EFER should only be used to set the NXE bit (if required)
     48      * when starting a vCPU in 32bit mode with paging enabled or
     49      * to set the LME/LMA bits in order to start the vCPU in
     50      * compatibility mode.
     51      */
     52     uint64_t efer;
     53 
     54     uint32_t cs_base;
     55     uint32_t ds_base;
     56     uint32_t ss_base;
     57     uint32_t es_base;
     58     uint32_t tr_base;
     59     uint32_t cs_limit;
     60     uint32_t ds_limit;
     61     uint32_t ss_limit;
     62     uint32_t es_limit;
     63     uint32_t tr_limit;
     64     uint16_t cs_ar;
     65     uint16_t ds_ar;
     66     uint16_t ss_ar;
     67     uint16_t es_ar;
     68     uint16_t tr_ar;
     69 
     70     uint16_t pad2[3];
     71 };
     72 
     73 /*
     74  * The layout of the _ar fields of the segment registers is the
     75  * following:
     76  *
     77  * Bits   [0,3]: type (bits 40-43).
     78  * Bit        4: s    (descriptor type, bit 44).
     79  * Bit    [5,6]: dpl  (descriptor privilege level, bits 45-46).
     80  * Bit        7: p    (segment-present, bit 47).
     81  * Bit        8: avl  (available for system software, bit 52).
     82  * Bit        9: l    (64-bit code segment, bit 53).
     83  * Bit       10: db   (meaning depends on the segment, bit 54).
     84  * Bit       11: g    (granularity, bit 55)
     85  * Bits [12,15]: unused, must be blank.
     86  *
     87  * A more complete description of the meaning of this fields can be
     88  * obtained from the Intel SDM, Volume 3, section 3.4.5.
     89  */
     90 
     91 struct vcpu_hvm_x86_64 {
     92     uint64_t rax;
     93     uint64_t rcx;
     94     uint64_t rdx;
     95     uint64_t rbx;
     96     uint64_t rsp;
     97     uint64_t rbp;
     98     uint64_t rsi;
     99     uint64_t rdi;
    100     uint64_t rip;
    101     uint64_t rflags;
    102 
    103     uint64_t cr0;
    104     uint64_t cr3;
    105     uint64_t cr4;
    106     uint64_t efer;
    107 
    108     /*
    109      * Using VCPU_HVM_MODE_64B implies that the vCPU is launched
    110      * directly in long mode, so the cached parts of the segment
    111      * registers get set to match that environment.
    112      *
    113      * If the user wants to launch the vCPU in compatibility mode
    114      * the 32-bit structure should be used instead.
    115      */
    116 };
    117 
    118 struct vcpu_hvm_context {
    119 #define VCPU_HVM_MODE_32B 0  /* 32bit fields of the structure will be used. */
    120 #define VCPU_HVM_MODE_64B 1  /* 64bit fields of the structure will be used. */
    121     uint32_t mode;
    122 
    123     uint32_t pad;
    124 
    125     /* CPU registers. */
    126     union {
    127         struct vcpu_hvm_x86_32 x86_32;
    128         struct vcpu_hvm_x86_64 x86_64;
    129     } cpu_regs;
    130 };
    131 typedef struct vcpu_hvm_context vcpu_hvm_context_t;
    132 DEFINE_XEN_GUEST_HANDLE(vcpu_hvm_context_t);
    133 
    134 #endif /* __XEN_PUBLIC_HVM_HVM_VCPU_H__ */
    135 
    136 /*
    137  * Local variables:
    138  * mode: C
    139  * c-file-style: "BSD"
    140  * c-basic-offset: 4
    141  * tab-width: 4
    142  * indent-tabs-mode: nil
    143  * End:
    144  */
    145