Home | History | Annotate | Line # | Download | only in ic 
      1 /* $NetBSD: dwc_gmac_var.h,v 1.23 2026/06/22 20:26:34 jakllsch Exp $ */
      2 
      3 /*-
      4  * Copyright (c) 2013, 2014 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * This code is derived from software contributed to The NetBSD Foundation
      8  * by Matt Thomas of 3am Software Foundry and Martin Husemann.
      9  *
     10  * Redistribution and use in source and binary forms, with or without
     11  * modification, are permitted provided that the following conditions
     12  * are met:
     13  * 1. Redistributions of source code must retain the above copyright
     14  *    notice, this list of conditions and the following disclaimer.
     15  * 2. Redistributions in binary form must reproduce the above copyright
     16  *    notice, this list of conditions and the following disclaimer in the
     17  *    documentation and/or other materials provided with the distribution.
     18  *
     19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     29  * POSSIBILITY OF SUCH DAMAGE.
     30  */
     31 
     32 #ifndef _DEV_IC_DWC_GMAC_VAR_H_
     33 #define _DEV_IC_DWC_GMAC_VAR_H_
     34 
     35 /*
     36  * Rx and Tx Ring counts that map into single 4K page with 16byte descriptor
     37  * size. For Rx a full mbuf cluster is allocated for each which consumes
     38  * around 512k Byte of RAM for mbuf clusters.
     39  * XXX Maybe fine-tune later, or reconsider unsharing of RX/TX dmamap.
     40  */
     41 #define		AWGE_RX_RING_COUNT	256
     42 #define		AWGE_TX_RING_COUNT	256
     43 #define		AWGE_TOTAL_RING_COUNT	\
     44 			(AWGE_RX_RING_COUNT + AWGE_TX_RING_COUNT)
     45 
     46 #define		AWGE_MAX_PACKET		0x7ff
     47 
     48 struct dwc_gmac_dev_dmadesc;
     49 
     50 struct dwc_gmac_desc_methods {
     51 	void (*tx_init_flags)(struct dwc_gmac_dev_dmadesc *);
     52 	void (*tx_set_owned_by_dev)(struct dwc_gmac_dev_dmadesc *);
     53 	int  (*tx_is_owned_by_dev)(struct dwc_gmac_dev_dmadesc *);
     54 	void (*tx_set_len)(struct dwc_gmac_dev_dmadesc *, int);
     55 	void (*tx_set_first_frag)(struct dwc_gmac_dev_dmadesc *);
     56 	void (*tx_set_last_frag)(struct dwc_gmac_dev_dmadesc *);
     57 
     58 	void (*rx_init_flags)(struct dwc_gmac_dev_dmadesc *);
     59 	void (*rx_set_owned_by_dev)(struct dwc_gmac_dev_dmadesc *);
     60 	int  (*rx_is_owned_by_dev)(struct dwc_gmac_dev_dmadesc *);
     61 	void (*rx_set_len)(struct dwc_gmac_dev_dmadesc *, int);
     62 	uint32_t  (*rx_get_len)(struct dwc_gmac_dev_dmadesc *);
     63 	int  (*rx_has_error)(struct dwc_gmac_dev_dmadesc *);
     64 };
     65 
     66 struct dwc_gmac_rx_data {
     67 	bus_dmamap_t	rd_map;
     68 	struct mbuf	*rd_m;
     69 };
     70 
     71 struct dwc_gmac_tx_data {
     72 	bus_dmamap_t	td_map;
     73 	bus_dmamap_t	td_active;
     74 	struct mbuf	*td_m;
     75 };
     76 
     77 struct dwc_gmac_tx_ring {
     78 	bus_addr_t			t_physaddr; /* PA of TX ring start */
     79 	struct dwc_gmac_dev_dmadesc	*t_desc;    /* VA of TX ring start */
     80 	struct dwc_gmac_tx_data	t_data[AWGE_TX_RING_COUNT];
     81 	int				t_cur, t_next, t_queued;
     82 	kmutex_t			t_mtx;
     83 };
     84 
     85 struct dwc_gmac_rx_ring {
     86 	bus_addr_t			r_physaddr; /* PA of RX ring start */
     87 	struct dwc_gmac_dev_dmadesc	*r_desc;    /* VA of RX ring start */
     88 	struct dwc_gmac_rx_data	r_data[AWGE_RX_RING_COUNT];
     89 	int				r_cur, r_next;
     90 	kmutex_t			r_mtx;
     91 };
     92 
     93 struct dwc_gmac_softc {
     94 	device_t sc_dev;
     95 	bus_space_tag_t sc_bst;
     96 	bus_space_handle_t sc_bsh;
     97 	bus_dma_tag_t sc_dmat;
     98 	uint32_t sc_flags;
     99 #define	DWC_GMAC_FORCE_THRESH_DMA_MODE	__BIT(0)/* force DMA to use threshold mode */
    100 #define	DWC_GMAC_FIXED_BURST		__BIT(1)/* fixed burst bus mode */
    101 	struct ethercom sc_ec;
    102 	struct mii_data sc_mii;
    103 	kmutex_t sc_mdio_lock;
    104 	bus_dmamap_t sc_dma_ring_map;		/* common dma memory for RX */
    105 	bus_dma_segment_t sc_dma_ring_seg;	/* and TX ring */
    106 	struct dwc_gmac_rx_ring sc_rxq;
    107 	struct dwc_gmac_tx_ring sc_txq;
    108 	const struct dwc_gmac_desc_methods *sc_descm;
    109 	u_short sc_if_flags;	/* (sc_mcastlock) if_flags cache */
    110 	uint16_t sc_mii_clk;
    111 	bool sc_txbusy;		/* (sc_txq.t_mtx) no Tx because down or busy */
    112 	bool sc_stopping;	/* (sc_intr_lock) ignore intr because down */
    113 	uint8_t sc_txpbl, sc_rxpbl;
    114 	krndsource_t rnd_source;
    115 	kmutex_t *sc_mcast_lock;	/* lock for SIOCADD/DELMULTI */
    116 	kmutex_t *sc_intr_lock;		/* lock for interrupt operations */
    117 
    118 	struct if_percpuq *sc_ipq;	/* softint-based input queues */
    119 
    120 	void (*sc_set_speed)(struct dwc_gmac_softc *, int);
    121 };
    122 
    123 int dwc_gmac_attach(struct dwc_gmac_softc *, int /*phy_id*/,
    124     uint32_t /*mii_clk*/);
    125 int dwc_gmac_intr(struct dwc_gmac_softc *);
    126 
    127 #endif /* _DEV_IC_DWC_GMAC_VAR_H_ */
    128