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      1 /*	$NetBSD: ingenic_dwctwo.c,v 1.15 2021/08/07 16:18:59 thorpej Exp $ */
      2 
      3 /*-
      4  * Copyright (c) 2014 Michael Lorenz
      5  * All rights reserved.
      6  *
      7  * Redistribution and use in source and binary forms, with or without
      8  * modification, are permitted provided that the following conditions
      9  * are met:
     10  * 1. Redistributions of source code must retain the above copyright
     11  *    notice, this list of conditions and the following disclaimer.
     12  * 2. Redistributions in binary form must reproduce the above copyright
     13  *    notice, this list of conditions and the following disclaimer in the
     14  *    documentation and/or other materials provided with the distribution.
     15  *
     16  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     17  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     18  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     19  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     20  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     21  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     22  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     23  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     24  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     25  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     26  * POSSIBILITY OF SUCH DAMAGE.
     27  */
     28 
     29 #include <sys/cdefs.h>
     30 __KERNEL_RCSID(0, "$NetBSD: ingenic_dwctwo.c,v 1.15 2021/08/07 16:18:59 thorpej Exp $");
     31 
     32 /*
     33  * adapted from bcm2835_dwctwo.c
     34  */
     35 
     36 #include <sys/param.h>
     37 #include <sys/systm.h>
     38 #include <sys/device.h>
     39 #include <sys/mutex.h>
     40 #include <sys/bus.h>
     41 #include <sys/workqueue.h>
     42 
     43 #include <mips/ingenic/ingenic_var.h>
     44 #include <mips/ingenic/ingenic_regs.h>
     45 
     46 #include <dev/usb/usb.h>
     47 #include <dev/usb/usbdi.h>
     48 #include <dev/usb/usbdivar.h>
     49 #include <dev/usb/usb_mem.h>
     50 #include <dev/usb/usbdevs.h>
     51 
     52 #include <dwc2/dwc2var.h>
     53 #include <dwc2/dwc2.h>
     54 #include "dwc2_core.h"
     55 
     56 #include "opt_ingenic.h"
     57 
     58 struct ingenic_dwc2_softc {
     59 	struct dwc2_softc	sc_dwc2;
     60 
     61 	void			*sc_ih;
     62 };
     63 
     64 static struct dwc2_core_params ingenic_dwc2_params = {
     65 	.otg_cap			= -1,	/* HNP/SRP capable */
     66 	.otg_ver			= -1,	/* 1.3 */
     67 	.dma_enable			= 1,
     68 	.dma_desc_enable		= 0,
     69 	.speed				= -1,	/* High Speed */
     70 	.enable_dynamic_fifo		= -1,
     71 	.en_multiple_tx_fifo		= -1,
     72 	.host_rx_fifo_size		= 1024,	/* 1024 DWORDs */
     73 	.host_nperio_tx_fifo_size	= 1024,	/* 1024 DWORDs */
     74 	.host_perio_tx_fifo_size	= 1024,	/* 1024 DWORDs */
     75 	.max_transfer_size		= -1,
     76 	.max_packet_count		= -1,
     77 	.host_channels			= -1,
     78 	.phy_type			= -1,	/* UTMI */
     79 	.phy_utmi_width			= -1,	/* 16 bits */
     80 	.phy_ulpi_ddr			= -1,	/* Single */
     81 	.phy_ulpi_ext_vbus		= -1,
     82 	.i2c_enable			= -1,
     83 	.ulpi_fs_ls			= -1,
     84 	.host_support_fs_ls_low_power	= -1,
     85 	.host_ls_low_power_phy_clk	= -1,	/* 48 MHz */
     86 	.ts_dline			= -1,
     87 	.reload_ctl			= -1,
     88 	.ahbcfg				= -1,
     89 	.uframe_sched			= 0,
     90 	.external_id_pin_ctl		= -1,
     91 	.hibernation			= -1,
     92 };
     93 
     94 static int ingenic_dwc2_match(device_t, struct cfdata *, void *);
     95 static void ingenic_dwc2_attach(device_t, device_t, void *);
     96 static void ingenic_dwc2_deferred(device_t);
     97 
     98 CFATTACH_DECL_NEW(ingenic_dwctwo, sizeof(struct ingenic_dwc2_softc),
     99     ingenic_dwc2_match, ingenic_dwc2_attach, NULL, NULL);
    100 
    101 /* ARGSUSED */
    102 static int
    103 ingenic_dwc2_match(device_t parent, struct cfdata *match, void *aux)
    104 {
    105 	struct apbus_attach_args *aa = aux;
    106 
    107 	if (strcmp(aa->aa_name, "dwctwo") != 0)
    108 		return 0;
    109 
    110 	return 1;
    111 }
    112 
    113 /* ARGSUSED */
    114 static void
    115 ingenic_dwc2_attach(device_t parent, device_t self, void *aux)
    116 {
    117 	struct ingenic_dwc2_softc *sc = device_private(self);
    118 	struct apbus_attach_args *aa = aux;
    119 	uint32_t reg;
    120 	int error;
    121 
    122 	sc->sc_dwc2.sc_dev = self;
    123 
    124 	sc->sc_dwc2.sc_iot = aa->aa_bst;
    125 	sc->sc_dwc2.sc_bus.ub_dmatag = aa->aa_dmat;
    126 	sc->sc_dwc2.sc_params = &ingenic_dwc2_params;
    127 
    128 	if (aa->aa_addr == 0)
    129 		aa->aa_addr = JZ_DWC2_BASE;
    130 
    131 	error = bus_space_map(aa->aa_bst, aa->aa_addr, 0x20000, 0,
    132 	    &sc->sc_dwc2.sc_ioh);
    133 	if (error) {
    134 		aprint_error_dev(self,
    135 		    "can't map registers for %s: %d\n", aa->aa_name, error);
    136 		return;
    137 	}
    138 
    139 	aprint_naive(": USB OTG controller\n");
    140 	aprint_normal(": USB OTG controller\n");
    141 
    142 	/* reset PHY, flash LED */
    143 	gpio_set(5, 15, 0);
    144 	delay(250000);
    145 	gpio_set(5, 15, 1);
    146 
    147 	reg = readreg(JZ_USBPCR);
    148 	reg |= PCR_VBUSVLDEXTSEL;
    149 	reg |= PCR_VBUSVLDEXT;
    150 	reg |= PCR_USB_MODE;
    151 	reg |= PCR_COMMONONN;
    152 	reg &= ~PCR_OTG_DISABLE;
    153 	writereg(JZ_USBPCR, reg);
    154 #ifdef INGENIC_DEBUG
    155 	printf("JZ_USBPCR  %08x\n", reg);
    156 #endif
    157 
    158 	reg = readreg(JZ_USBPCR1);
    159 #ifdef INGENIC_DEBUG
    160 	printf("JZ_USBPCR1 %08x\n", reg);
    161 #endif
    162 	reg &= ~0xf0000000;
    163 	reg |= PCR_SYNOPSYS;
    164 	reg |= PCR_REFCLK_CORE;
    165 	reg &= ~PCR_CLK_M;
    166 	reg |= PCR_CLK_48;
    167 	reg |= PCR_WORD_I_F0;
    168 	reg |= PCR_WORD_I_F1;
    169 	writereg(JZ_USBPCR1, reg);
    170 #ifdef INGENIC_DEBUG
    171 	printf("JZ_USBPCR1 %08x\n", reg);
    172 	printf("JZ_USBRDT  %08x\n", readreg(JZ_USBRDT));
    173 #endif
    174 
    175 	writereg(JZ_USBVBFIL, 0);
    176 	delay(10000);
    177 
    178 	reg = readreg(JZ_USBPCR);
    179 	reg |= PCR_POR;
    180 	writereg(JZ_USBPCR, reg);
    181 	delay(1000);
    182 	reg &= ~PCR_POR;
    183 	writereg(JZ_USBPCR, reg);
    184 
    185 	delay(10000);
    186 
    187 	/* wake up the USB part */
    188 	reg = readreg(JZ_OPCR);
    189 	reg |= OPCR_SPENDN0;
    190 	writereg(JZ_OPCR, reg);
    191 
    192 	sc->sc_ih = evbmips_intr_establish(aa->aa_irq, dwc2_intr, &sc->sc_dwc2);
    193 
    194 	if (sc->sc_ih == NULL) {
    195 		aprint_error_dev(self, "failed to establish interrupt %d\n",
    196 		     aa->aa_irq);
    197 		goto fail;
    198 	}
    199 
    200 	config_defer(self, ingenic_dwc2_deferred);
    201 
    202 	return;
    203 
    204 fail:
    205 	if (sc->sc_ih) {
    206 		evbmips_intr_disestablish(sc->sc_ih);
    207 		sc->sc_ih = NULL;
    208 	}
    209 	bus_space_unmap(sc->sc_dwc2.sc_iot, sc->sc_dwc2.sc_ioh, 0x20000);
    210 }
    211 
    212 static void
    213 ingenic_dwc2_deferred(device_t self)
    214 {
    215 	struct ingenic_dwc2_softc *sc = device_private(self);
    216 	int error;
    217 
    218 	error = dwc2_init(&sc->sc_dwc2);
    219 	if (error != 0) {
    220 		aprint_error_dev(self, "couldn't initialize host, error=%d\n",
    221 		    error);
    222 		return;
    223 	}
    224 	sc->sc_dwc2.sc_child = config_found(sc->sc_dwc2.sc_dev,
    225 	    &sc->sc_dwc2.sc_bus, usbctlprint, CFARGS_NONE);
    226 }
    227