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    Searched defs:interrupts (Results 1 - 20 of 20) sorted by relevancy

  /src/sys/arch/macppc/dev/
com_mainbus.c 87 int interrupts[8]; local
96 (void)OF_getprop(serial, "interrupts", interrupts, sizeof(interrupts));
111 intr_establish_xname(interrupts[0], IST_LEVEL, IPL_SERIAL, comintr, sc,
  /src/external/bsd/kyua-cli/dist/engine/drivers/
debug_test.cpp 42 #include "utils/signals/interrupts.hpp"
131 signals::interrupts_handler interrupts; local
run_tests.cpp 45 #include "utils/signals/interrupts.hpp"
186 signals::interrupts_handler interrupts; local
  /src/external/bsd/kyua-cli/dist/utils/signals/
interrupts_test.cpp 29 #include "utils/signals/interrupts.hpp"
98 signals::interrupts_handler interrupts; local
166 signals::interrupts_handler interrupts; local
  /src/external/gpl3/gdb/dist/sim/ppc/
interrupts.h 24 /* Interrupts:
26 The code below handles two different types of interrupts.
31 Interrupts that must immediately force either an abort or restart
34 code it may occure to you that, for some interrupts, they could
47 Interrupts such as reset or external exception are delivered using
53 /* Software generated interrupts.
126 /* Hardware generated interrupts:
128 These asynchronous hardware generated interrupts may be called at
129 any time. It is the responsibility of this (the interrupts) module
130 to ensure that interrupts are delivered correctly (when possible)
154 } interrupts; typedef in typeref:struct:_interrupts
    [all...]
  /src/external/gpl3/gdb.old/dist/sim/ppc/
interrupts.h 24 /* Interrupts:
26 The code below handles two different types of interrupts.
31 Interrupts that must immediately force either an abort or restart
34 code it may occure to you that, for some interrupts, they could
47 Interrupts such as reset or external exception are delivered using
53 /* Software generated interrupts.
126 /* Hardware generated interrupts:
128 These asynchronous hardware generated interrupts may be called at
129 any time. It is the responsibility of this (the interrupts) module
130 to ensure that interrupts are delivered correctly (when possible)
154 } interrupts; typedef in typeref:struct:_interrupts
    [all...]
  /src/external/gpl3/gdb.old/dist/sim/m68hc11/
interrupts.c 0 /* interrupts.c -- 68HC11 Interrupts Emulation
68 /* Serial interrupts. */
74 /* SPI interrupts. */
77 /* Realtime interrupts. */
81 /* Output compare interrupts. */
88 /* Input compare interrupts. */
116 '\0', NULL, "Print information about interrupts",
120 "Catch interrupts when they are raised or taken\n"
131 /* Initialize the interrupts module. *
135 struct interrupts *interrupts = &M68HC11_SIM_CPU (cpu)->cpu_interrupts; local
213 struct interrupts *interrupts; local
    [all...]
interrupts.h 0 /* interrupts.h -- 68HC11 Interrupts Emulation
23 /* Definition of 68HC11 interrupts. These enum are used as an index
84 This is used to understand in which order interrupts were
100 /* Information and control of pending interrupts. */
114 /* Management of 68HC11 interrupts:
115 - We use a table of 'interrupt_def' to describe the interrupts that must be
117 - We keep a mask of pending interrupts. This mask is refreshed by
121 first it maintains a min/max count of CPU cycles between which interrupts
122 are masked; second it checks for pending interrupts and raise one i
124 struct interrupts { struct
137 struct interrupt interrupts[M6811_INT_NUMBER]; member in struct:interrupts
    [all...]
  /src/external/gpl3/gdb/dist/sim/m68hc11/
interrupts.c 0 /* interrupts.c -- 68HC11 Interrupts Emulation
68 /* Serial interrupts. */
74 /* SPI interrupts. */
77 /* Realtime interrupts. */
81 /* Output compare interrupts. */
88 /* Input compare interrupts. */
116 '\0', NULL, "Print information about interrupts",
120 "Catch interrupts when they are raised or taken\n"
131 /* Initialize the interrupts module. *
135 struct interrupts *interrupts = &M68HC11_SIM_CPU (cpu)->cpu_interrupts; local
213 struct interrupts *interrupts; local
    [all...]
interrupts.h 0 /* interrupts.h -- 68HC11 Interrupts Emulation
23 /* Definition of 68HC11 interrupts. These enum are used as an index
84 This is used to understand in which order interrupts were
100 /* Information and control of pending interrupts. */
114 /* Management of 68HC11 interrupts:
115 - We use a table of 'interrupt_def' to describe the interrupts that must be
117 - We keep a mask of pending interrupts. This mask is refreshed by
121 first it maintains a min/max count of CPU cycles between which interrupts
122 are masked; second it checks for pending interrupts and raise one i
124 struct interrupts { struct
137 struct interrupt interrupts[M6811_INT_NUMBER]; member in struct:interrupts
    [all...]
  /src/sys/arch/arm/sunxi/
sunxi_nmi.c 373 const u_int *interrupts; local
393 interrupts = fdtbus_get_prop(phandle, "interrupts", &len);
394 if (interrupts == NULL || len != 12 ||
395 be32toh(interrupts[0]) != 0 /* GIC_SPI */ ||
396 be32toh(interrupts[2]) != 4 /* IRQ_TYPE_LEVEL_HIGH */) {
400 sc->sc_intr_nmi = be32toh(interrupts[1]);
  /src/sys/arch/sparc64/dev/
pci_machdep.c 429 * XXX: how does this deal with multiple interrupts for a device?
435 int interrupts[4], *intp, int_used; local
439 intp = &interrupts[0];
440 len = prom_getproplen(node, "interrupts");
441 if (len > sizeof(interrupts)) {
443 ("pci_intr_map: too many available interrupts\n"));
446 if (prom_getprop(node, "interrupts", len,
449 ("pci_intr_map: could not read interrupts\n"));
454 int_used = interrupts[0];
488 /* panic("can't disestablish PCI interrupts yet"); *
    [all...]
  /src/sys/external/bsd/drm2/dist/drm/i915/gt/uc/
intel_guc.h 42 } interrupts; member in struct:intel_guc
69 /* register used to send interrupts to the GuC FW */
  /src/external/gpl3/binutils/dist/opcodes/
z8k-dis.c 52 unsigned long interrupts; member in struct:__anon10964
440 instr_data->interrupts = instr_nibl & 0x3;
443 instr_data->interrupts = instr_nibl & 0x3;
478 print_intr(char *tmp_str, unsigned long interrupts)
483 if (! (interrupts & 2))
488 if (! (interrupts & 1))
577 print_intr (tmp_str, instr_data->interrupts);
  /src/external/gpl3/binutils.old/dist/opcodes/
z8k-dis.c 52 unsigned long interrupts; member in struct:__anon12411
440 instr_data->interrupts = instr_nibl & 0x3;
443 instr_data->interrupts = instr_nibl & 0x3;
478 print_intr(char *tmp_str, unsigned long interrupts)
483 if (! (interrupts & 2))
488 if (! (interrupts & 1))
577 print_intr (tmp_str, instr_data->interrupts);
  /src/external/gpl3/gdb.old/dist/opcodes/
z8k-dis.c 52 unsigned long interrupts; member in struct:__anon21828
440 instr_data->interrupts = instr_nibl & 0x3;
443 instr_data->interrupts = instr_nibl & 0x3;
478 print_intr(char *tmp_str, unsigned long interrupts)
483 if (! (interrupts & 2))
488 if (! (interrupts & 1))
577 print_intr (tmp_str, instr_data->interrupts);
  /src/external/gpl3/gdb/dist/opcodes/
z8k-dis.c 52 unsigned long interrupts; member in struct:__anon1334
440 instr_data->interrupts = instr_nibl & 0x3;
443 instr_data->interrupts = instr_nibl & 0x3;
478 print_intr(char *tmp_str, unsigned long interrupts)
483 if (! (interrupts & 2))
488 if (! (interrupts & 1))
577 print_intr (tmp_str, instr_data->interrupts);
  /src/sys/arch/arm/s3c2xx0/
s3c2800_pci.c 642 /* clear all interrupts */
686 uint32_t interrupts, errors; local
688 interrupts = bus_space_read_4(iot, ioh, PCICTL_PCIINTST);
690 if (interrupts & PCIINT_INA) {
704 interrupts &= ~PCIINT_INA;
707 errors = interrupts & (PCIINT_SER | PCIINT_TPE | PCIINT_MPE |
721 /* acknowledge interrupts */
722 bus_space_write_4(iot, ioh, PCICTL_PCIINTST, interrupts);
  /src/sys/dev/ic/
smc91cxx.c 533 /* Disable all interrupts. */
581 /* Now, enable interrupts. */
752 * Enable transmit interrupts and let the chip go. Set a watchdog
862 uint8_t mask, interrupts, status; local
880 interrupts = v & 0xff;
882 status = interrupts & mask;
888 /* It's ours; disable all interrupts while we process them. */
891 /* Receive overrun interrupts. */
897 /* Receive interrupts. */
902 /* Memory allocation interrupts. *
    [all...]
  /src/external/bsd/ntp/dist/include/
ntp_request.h 587 u_int32 interrupts; /* interrupts we've handled */ member in struct:info_io_stats

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