| /src/sys/dev/cardbus/ |
| njata_cardbus.c | 132 uint8_t latency = 0x20; local in function:njata_cardbus_attach
197 * Make sure the latency timer is set to some reasonable
201 if (PCI_LATTIMER(reg) < latency) {
203 reg |= (latency << PCI_LATTIMER_SHIFT);
|
| njs_cardbus.c | 128 u_int8_t latency = 0x20; local in function:njs_cardbus_attach
190 * Make sure the latency timer is set to some reasonable
194 if (PCI_LATTIMER(reg) < latency) {
196 reg |= (latency << PCI_LATTIMER_SHIFT);
|
| adv_cardbus.c | 112 u_int8_t latency = 0x20; local in function:adv_cardbus_attach
121 latency = 0;
126 latency = 0;
188 * Make sure the latency timer is set to some reasonable
192 if (PCI_LATTIMER(reg) < latency) {
194 reg |= (latency << PCI_LATTIMER_SHIFT);
|
| /src/sys/arch/powerpc/booke/ |
| e500_timer.c | 101 uint64_t latency = now - (ci->ci_lastintr + cpu->cpu_ticks_per_clock_intr); local in function:e500_clock_intr
103 uint64_t orig_latency = latency;
106 latency = 0;
108 nticks = 1 + latency / cpu->cpu_ticks_per_clock_intr;
109 latency %= cpu->cpu_ticks_per_clock_intr;
111 for (nticks = 1; latency >= cpu->cpu_ticks_per_clock_intr; nticks++) {
112 latency -= cpu->cpu_ticks_per_clock_intr;
125 printf("%s: nticks=%u lastintr=%#"PRIx64"(%#"PRIx64") now=%#"PRIx64" latency=%#"PRIx64" orig=%#"PRIx64"\n", __func__,
126 nticks, ci->ci_lastintr, now - latency, now, latency, orig_latency)
[all...] |
| /src/sys/dev/pci/bktr/ |
| bktr_os.c | 333 u_int latency; local in function:bktr_attach
436 * PCI latency timer. 32 is a good value for 4 bus mastering slots, if
442 latency = pci_read_config(dev, PCI_LATENCY_TIMER, 4);
443 latency = (latency >> 8) & 0xff;
445 if (latency)
446 printf("brooktree%d: PCI bus latency is", unit);
448 printf("brooktree%d: PCI bus latency was 0 changing to",
451 if (!latency) {
452 latency = BROOKTREE_DEF_LATENCY_VALUE
940 u_int latency; local in function:bktr_attach
1395 u_int latency; local in function:bktr_attach
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/amd/include/ |
| dm_pp_interface.h | 107 * Memory clock DPMS with this latency or below is allowed, DPMS with
108 * higher latency not allowed.
168 uint32_t latency[MAX_NUM_CLOCKS]; member in struct:amd_pp_clocks
|
| /src/games/adventure/ |
| init.c | 71 int saveday, savet, maxscore, latency; variable in typeref:typename:int
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce120/ |
| amdgpu_dce120_resource.c | 901 unsigned int latency; local in function:bw_calcs_data_update_from_pplib
946 latency = 45;
950 mem_clks.data[i].latency_in_us = latency;
952 latency -= 5;
|
| /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/ |
| amdgpu_vega20_ppt.c | 2097 uint32_t i, latency; local in function:vega20_apply_clocks_adjust_rules
2101 latency = smu->display_config->dce_tolerable_mclk_in_active_latency;
2155 if (smu_dpm_ctx->mclk_latency_table->entries[i].latency <= latency) {
|
| /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/ |
| amdgpu_vega12_hwmgr.c | 1766 data->mclk_latency_table.entries[i].latency =
2182 uint32_t i, latency; local in function:vega12_apply_clocks_adjust_rules
2187 latency = hwmgr->display_config->dce_tolerable_mclk_in_active_latency;
2245 if (data->mclk_latency_table.entries[i].latency <= latency) {
|
| amdgpu_vega20_hwmgr.c | 2810 data->mclk_latency_table.entries[i].latency =
3646 uint32_t i, latency; local in function:vega20_apply_clocks_adjust_rules
3651 latency = hwmgr->display_config->dce_tolerable_mclk_in_active_latency;
3709 if (data->mclk_latency_table.entries[i].latency <= latency) {
|
| smu10_hwmgr.h | 181 uint32_t latency; member in struct:smu10_mclk_latency_entries
|
| amdgpu_vega10_hwmgr.c | 3191 uint32_t latency; local in function:vega10_apply_state_adjust_rules
3293 * the tolerable latency defined in DAL
3295 latency = hwmgr->display_config->dce_tolerable_mclk_in_active_latency;
3297 if ((data->mclk_latency_table.entries[i].latency <= latency) &&
4314 data->mclk_latency_table.entries[j].latency = 25;
|
| vega10_hwmgr.h | 218 uint32_t latency; member in struct:vega10_mclk_latency_entries
|
| vega12_hwmgr.h | 209 uint32_t latency; member in struct:vega12_mclk_latency_entries
|
| vega20_hwmgr.h | 269 uint32_t latency; member in struct:vega20_mclk_latency_entries
|
| /src/sys/external/bsd/drm2/dist/drm/i915/gt/ |
| intel_engine_types.h | 127 /* A simple estimator for the round-trip latency of an engine */
344 struct ewma__engine_latency latency; member in struct:intel_engine_cs
356 * bottom-half, we reduce the latency of the first waiter by avoiding
|
| /src/sys/netbt/ |
| l2cap.h | 189 uint32_t latency; /* microseconds */ member in struct:__anon14ed532f0108
|
| /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/ |
| amdgpu_dce_v10_0.c | 887 * dce_v10_0_latency_watermark - get the latency watermark
891 * Calculate the latency watermark (CIK).
893 * Returns the latency watermark in ns
897 /* First calculate the latency in ns */
902 u32 dc_latency = 40000000 / wm->disp_clk; /* dc pipe latency */
905 u32 latency = mc_latency + other_heads_data_return_time + dc_latency; local in function:dce_v10_0_latency_watermark
939 return latency;
941 return latency + (line_fill_time - wm->active_time);
986 * dce_v10_0_check_latency_hiding - check latency hiding
990 * Check latency hiding (CIK)
[all...] |
| amdgpu_dce_v11_0.c | 913 * dce_v11_0_latency_watermark - get the latency watermark
917 * Calculate the latency watermark (CIK).
919 * Returns the latency watermark in ns
923 /* First calculate the latency in ns */
928 u32 dc_latency = 40000000 / wm->disp_clk; /* dc pipe latency */
931 u32 latency = mc_latency + other_heads_data_return_time + dc_latency; local in function:dce_v11_0_latency_watermark
965 return latency;
967 return latency + (line_fill_time - wm->active_time);
1012 * dce_v11_0_check_latency_hiding - check latency hiding
1016 * Check latency hiding (CIK)
[all...] |
| amdgpu_dce_v6_0.c | 685 * dce_v6_0_latency_watermark - get the latency watermark
689 * Calculate the latency watermark (CIK).
691 * Returns the latency watermark in ns
695 /* First calculate the latency in ns */
700 u32 dc_latency = 40000000 / wm->disp_clk; /* dc pipe latency */
703 u32 latency = mc_latency + other_heads_data_return_time + dc_latency; local in function:dce_v6_0_latency_watermark
737 return latency;
739 return latency + (line_fill_time - wm->active_time);
784 * dce_v6_0_check_latency_hiding - check latency hiding
788 * Check latency hiding (CIK)
[all...] |
| amdgpu_dce_v8_0.c | 822 * dce_v8_0_latency_watermark - get the latency watermark
826 * Calculate the latency watermark (CIK).
828 * Returns the latency watermark in ns
832 /* First calculate the latency in ns */
837 u32 dc_latency = 40000000 / wm->disp_clk; /* dc pipe latency */
840 u32 latency = mc_latency + other_heads_data_return_time + dc_latency; local in function:dce_v8_0_latency_watermark
874 return latency;
876 return latency + (line_fill_time - wm->active_time);
921 * dce_v8_0_check_latency_hiding - check latency hiding
925 * Check latency hiding (CIK)
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/radeon/ |
| radeon_evergreen.c | 2068 /* First calcualte the latency in ns */
2073 u32 dc_latency = 40000000 / wm->disp_clk; /* dc pipe latency */
2076 u32 latency = mc_latency + other_heads_data_return_time + dc_latency; local in function:evergreen_latency_watermark
2107 return latency;
2109 return latency + (line_fill_time - wm->active_time);
|
| /src/sys/external/mit/xen-include-public/dist/xen/include/public/ |
| platform.h | 407 uint32_t latency; /* worst latency (ms) to enter/exit this cstate */ member in struct:xen_processor_cx
|
| /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/inc/ |
| amdgpu_smu.h | 330 uint32_t latency; member in struct:mclk_latency_entries
|
