| /src/tests/include/sys/ |
| t_pslist.c | 49 ATF_TC(misc); variable
50 ATF_TC_HEAD(misc, tc)
54 ATF_TC_BODY(misc, tc)
129 ATF_TP_ADD_TC(tp, misc);
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| /src/sys/dev/ic/ |
| vgareg.h | 32 u_int8_t colreset, misc; member in struct:reg_vgaattr
51 u_int8_t rdplanesel, mode, misc, colorcare; member in struct:reg_vgagdc
69 /* misc output register */
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| dm9000.c | 319 uint8_t misc; local
328 misc = dme_read(sc, DM9000_GPR);
329 dme_write(sc, DM9000_GPR, misc | DM9000_GPR_PHY_PWROFF);
345 misc = dme_read(sc, DM9000_GPR);
346 dme_write(sc, DM9000_GPR, misc & ~DM9000_GPR_PHY_PWROFF);
347 misc = dme_read(sc, DM9000_GPCR);
348 dme_write(sc, DM9000_GPCR, misc | DM9000_GPCR_GPIO0_OUT);
|
| ac97.c | 2136 uint16_t misc; local
2140 ac97_read(as, AD1980_REG_MISC, &misc);
2142 misc | AD1980_MISC_LOSEL | AD1980_MISC_HPSEL);
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| /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/ |
| amdgpu_atombios_crtc.c | 204 u16 misc = 0; local
225 misc |= ATOM_VSYNC_POLARITY;
227 misc |= ATOM_HSYNC_POLARITY;
229 misc |= ATOM_COMPOSITESYNC;
231 misc |= ATOM_INTERLACE;
233 misc |= ATOM_DOUBLE_CLOCK_MODE;
235 args.susModeMiscInfo.usAccess = cpu_to_le16(misc);
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| amdgpu_atombios_encoders.c | 2011 uint16_t data_offset, misc; local
2049 misc = le16_to_cpu(lvds_info->info.sLCDTiming.susModeMiscInfo.usAccess);
2050 if (misc & ATOM_VSYNC_POLARITY)
2052 if (misc & ATOM_HSYNC_POLARITY)
2054 if (misc & ATOM_COMPOSITESYNC)
2056 if (misc & ATOM_INTERLACE)
2058 if (misc & ATOM_DOUBLE_CLOCK_MODE)
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| /src/sys/external/bsd/drm2/dist/drm/nouveau/dispnv04/ |
| nouveau_dispnv04_hw.c | 39 * misc hw access wrappers/control functions
331 uint8_t misc, gr4, gr5, gr6, seq2, seq4; local
378 misc = NVReadPRMVIO(dev, 0, NV_PRMVIO_MISC__READ);
399 NVWritePRMVIO(dev, 0, NV_PRMVIO_MISC__WRITE, misc);
|
| /src/sys/arch/arm/amlogic/ |
| meson_uart.c | 171 uint32_t misc, control; local
238 misc = bus_space_read_4(sc->sc_bst, sc->sc_bsh, UART_MISC_REG);
239 misc &= ~UART_MISC_TX_IRQ_CNT;
240 misc |= __SHIFTIN(0, UART_MISC_TX_IRQ_CNT);
241 misc &= ~UART_MISC_RX_IRQ_CNT;
242 misc |= __SHIFTIN(1, UART_MISC_RX_IRQ_CNT);
243 bus_space_write_4(sc->sc_bst, sc->sc_bsh, UART_MISC_REG, misc);
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| /src/sys/dev/pcmcia/ |
| pcmcia_cis.c | 1051 u_int power, timing, iospace, irq, memspace, misc; local
1156 misc = reg & PCMCIA_TPCE_FS_MISC;
1423 if (misc) {
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| /src/sys/arch/sparc/include/ |
| cgtworeg.h | 245 } misc; member in struct:cg2fb
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| /src/sys/arch/sun3/include/ |
| cg2reg.h | 236 } misc; member in struct:cg2fb
|
| /src/sys/dev/pci/ |
| if_nfe.c | 499 uint32_t phy, seed, misc = NFE_MISC1_MAGIC, link = NFE_MEDIA_SET; local
509 misc |= NFE_MISC1_HDX;
532 NFE_WRITE(sc, NFE_MISC1, misc);
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| pciconf.c | 1306 pcireg_t cmd, classreg, misc; local
1314 misc = pci_conf_read(pd->pc, pd->tag, PCI_BHLC_REG);
1345 misc &= ~((PCI_LATTIMER_MASK << PCI_LATTIMER_SHIFT) |
1347 misc |= (ltim & PCI_LATTIMER_MASK) << PCI_LATTIMER_SHIFT;
1348 misc |= ((pb->cacheline_size >> 2) & PCI_CACHELINE_MASK) <<
1350 pci_conf_write(pd->pc, pd->tag, PCI_BHLC_REG, misc);
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| ubsec.c | 2241 u_int32_t misc; local
2248 misc = pci_conf_read(pc, pa->pa_tag, PCI_BHLC_REG);
2249 misc = (misc & ~(PCI_CACHELINE_MASK << PCI_CACHELINE_SHIFT))
2251 pci_conf_write(pc, pa->pa_tag, PCI_BHLC_REG, misc);
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| voodoofb.c | 1420 uint8_t misc; local
1442 misc = 0x0f |
1447 misc = 0x2f;
1449 misc |= HSYNC_NEG;
1451 misc |= VSYNC_NEG;
1453 printf("misc: %02x\n", misc);
1551 vga_outb(sc, MISC_W, misc | 0x01);
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| /src/sys/dev/usb/ |
| if_ure.c | 1002 uint32_t csum, misc; local
1008 misc = le32toh(rp->ure_misc);
1026 (misc & URE_RXPKT_IP_F)))
1029 ((flags & (M_CSUM_TCPv4 | M_CSUM_TCPv6)) && (misc & URE_RXPKT_TCP_F))
1030 || ((flags & (M_CSUM_UDPv4 | M_CSUM_UDPv6)) && (misc & URE_RXPKT_UDP_F))
|
| /src/sys/arch/alpha/include/ |
| logout.h | 298 uint64_t misc; member in struct:ev6_logout_sys
|
| /src/sys/dev/scsipi/ |
| scsi_changer.h | 440 u_int8_t misc; member in struct:page_transport_geometry_parameters
|
| /src/sys/external/bsd/drm2/dist/drm/ast/ |
| ast_drv.h | 252 u8 misc; member in struct:ast_vbios_stdtable
|
| /src/sys/external/bsd/drm2/dist/drm/radeon/ |
| radeon_atombios_crtc.c | 316 u16 misc = 0; local
337 misc |= ATOM_VSYNC_POLARITY;
339 misc |= ATOM_HSYNC_POLARITY;
341 misc |= ATOM_COMPOSITESYNC;
343 misc |= ATOM_INTERLACE;
345 misc |= ATOM_DOUBLE_CLOCK_MODE;
347 misc |= ATOM_H_REPLICATIONBY2 | ATOM_V_REPLICATIONBY2;
349 args.susModeMiscInfo.usAccess = cpu_to_le16(misc);
363 u16 misc = 0; local
383 misc |= ATOM_VSYNC_POLARITY
[all...] |
| radeon_combios.c | 93 COMBIOS_ASIC_INIT_3_TABLE, /* offset from misc info */
94 COMBIOS_ASIC_INIT_4_TABLE, /* offset from misc info */
95 COMBIOS_DETECTED_MEM_TABLE, /* offset from misc info */
96 COMBIOS_ASIC_INIT_5_TABLE, /* offset from misc info */
253 case COMBIOS_ASIC_INIT_3_TABLE: /* offset from misc info */
265 case COMBIOS_ASIC_INIT_4_TABLE: /* offset from misc info */
277 case COMBIOS_DETECTED_MEM_TABLE: /* offset from misc info */
289 case COMBIOS_ASIC_INIT_5_TABLE: /* offset from misc info */
2646 u16 offset, misc, misc2 = 0; local
2749 misc = RBIOS16(offset + 0x5 + 0x0)
[all...] |
| radeon_atombios.c | 1632 uint16_t data_offset, misc; local
1670 misc = le16_to_cpu(lvds_info->info.sLCDTiming.susModeMiscInfo.usAccess);
1671 if (misc & ATOM_VSYNC_POLARITY)
1673 if (misc & ATOM_HSYNC_POLARITY)
1675 if (misc & ATOM_COMPOSITESYNC)
1677 if (misc & ATOM_INTERLACE)
1679 if (misc & ATOM_DOUBLE_CLOCK_MODE)
1805 u16 data_offset, misc; local
1830 misc = le16_to_cpu(tv_info->aModeTimings[index].susModeMiscInfo.usAccess);
1831 if (misc & ATOM_VSYNC_POLARITY
2091 u32 misc, misc2 = 0; local
2402 u32 misc = le32_to_cpu(non_clock_info->ulCapsAndSettings); local
[all...] |
| /src/sbin/ifconfig/ |
| ifconfig.c | 177 extern struct pkw cloning, silent_family, family, ifcaps, ifflags, misc;
294 , {.b_nextparser = &misc.pk_parser}
339 struct pkw misc = PKW_INITIALIZER(&misc, "misc", NULL, NULL, variable in typeref:struct:pkw
|
| /src/sys/dev/pci/qat/ |
| qat_ae.c | 421 uint32_t ctxen, misc, nmisc, savctx, ctxarbctl, ulo, uhi; local
468 qat_ae_read_4(sc, ae, AE_MISC_CONTROL, &misc);
469 if (misc & AE_MISC_CONTROL_SHARE_CS) {
475 nmisc = misc & ~AE_MISC_CONTROL_SHARE_CS;
494 qat_ae_write_4(sc, ae, AE_MISC_CONTROL, misc);
553 qat_ae_write_4(sc, ae, AE_MISC_CONTROL, misc);
1162 uint32_t misc, mask; local
1166 misc = qat_cap_global_read_4(sc, CAP_GLOBAL_CTL_MISC);
1167 if (misc & CAP_GLOBAL_CTL_MISC_TIMESTAMP_EN) {
1169 misc & (~CAP_GLOBAL_CTL_MISC_TIMESTAMP_EN))
1377 uint32_t misc, ustore_addr, ulo, uhi; local
1507 uint32_t misc, nmisc, ctxen; local
[all...] |
| /src/sys/external/bsd/drm2/dist/include/drm/ |
| drm_edid.h | 88 u8 misc; member in struct:detailed_pixel_timing
|
