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      1 /*	$NetBSD: cg2reg.h,v 1.7 2023/03/28 20:01:57 andvar Exp $ */
      2 
      3 /*
      4  * Copyright (c) 1994 Dennis Ferguson
      5  * All rights reserved.
      6  *
      7  * Redistribution and use in source and binary forms, with or without
      8  * modification, are permitted provided that the following conditions
      9  * are met:
     10  * 1. Redistributions of source code must retain the above copyright
     11  *    notice, this list of conditions and the following disclaimer.
     12  * 2. Redistributions in binary form must reproduce the above copyright
     13  *    notice, this list of conditions and the following disclaimer in the
     14  *    documentation and/or other materials provided with the distribution.
     15  *
     16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     17  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     18  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     19  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     20  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     21  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     22  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     23  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     24  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     25  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     26  */
     27 
     28 /* cg2reg.h - CG2 colour frame buffer definitions
     29  *
     30  * The mapped memory looks like:
     31  *
     32  *  offset     contents
     33  * 0x000000  bit plane map - 1st (of 8) plane used by the X server in -mono mode
     34  * 0x100000  pixel map - used by the X server in color mode
     35  * 0x200000  raster op mode memory map - unused by X server
     36  * 0x300000  random control registers (lots of spaces in between)
     37  * 0x310000  shadow colour map
     38  */
     39 
     40 /* Frame buffer memory size and depth */
     41 #define	CG2_FBSIZE	(1024 * 1024)
     42 #define	CG2_N_PLANE	8
     43 
     44 /* Screen dimensions */
     45 #define	CG2_WIDTH	1152
     46 #define	CG2_HEIGHT	900
     47 
     48 /* arrangement of bit plane mode memory */
     49 union bitplane {
     50 	u_short word[CG2_HEIGHT][CG2_WIDTH/(CG2_N_PLANE * sizeof(u_short))];
     51 	u_short plane[CG2_FBSIZE/(CG2_N_PLANE * sizeof(u_short))];
     52 };
     53 
     54 /* arrangement of pixel mode memory */
     55 union byteplane {
     56 	u_char pixel[CG2_HEIGHT][CG2_WIDTH];
     57 	u_char frame[CG2_FBSIZE];
     58 };
     59 
     60 
     61 /*
     62  * Structure describing the first two megabytes of the frame buffer.
     63  * Normal memory maps in bit plane and pixel modes
     64  */
     65 struct cg2memfb {
     66 	union bitplane memplane[CG2_N_PLANE];	/* bit plane map */
     67 	union byteplane pixplane;		/* pixel map */
     68 };
     69 
     70 
     71 /*
     72  * Control/status register.  The X server only appears to use update_cmap
     73  * and video_enab.
     74  */
     75 struct cg2statusreg {
     76 	u_int reserved : 2;	/* not used */
     77         u_int fastread : 1;	/* r/o: has some feature I don't understand */
     78         u_int id : 1;		/* r/o: ext status and ID registers exist */
     79         u_int resolution : 4;	/* screen resolution, 0 means 1152x900 */
     80         u_int retrace : 1;	/* r/o: retrace in progress */
     81         u_int inpend : 1;	/* r/o: interrupt request */
     82         u_int ropmode : 3;	/* ?? */
     83         u_int inten : 1;	/* interrupt enable (for end of retrace) */
     84         u_int update_cmap : 1;	/* copy/use shadow colour map */
     85         u_int video_enab : 1;	/* enable video */
     86 };
     87 
     88 
     89 /*
     90  * Extended status register.  Unused by X server
     91  */
     92 struct cg2_extstatus {
     93 	u_int gpintreq : 1;	/* interrupt request */
     94 	u_int gpintdis : 1;	/* interrupt disable */
     95 	u_int reserved : 13;	/* unused */
     96 	u_int gpbus : 1;	/* bus enabled */
     97 };
     98 
     99 
    100 /*
    101  * Double buffer control register.  It appears that (some of?) the
    102  * cg2 cards support a pair of memory sets, referred to as `A' and
    103  * `B', which can be swapped to allow atomic screen updates.  This
    104  * controls them.
    105  */
    106 struct dblbufreg {
    107 	u_int display_b : 1;	/* display memory B (set) or A (reset) */
    108 	u_int read_b : 1;	/* access memory B (set) or A (reset) */
    109 	u_int nowrite_b : 1;	/* when set, writes don't update memory B */
    110 	u_int nowrite_a : 1;	/* when set, writes don't update memory A */
    111 	u_int read_ecmap : 1;	/* copy from(clear)/to(set) shadow colour map */
    112 	u_int fast_read : 1;	/* fast reads, but wrong data */
    113 	u_int wait : 1;		/* when set, remains so to end up v. retrace */
    114 	u_int update_ecmap : 1;	/* copy/use shadow colour map */
    115         u_int reserved : 8;
    116 };
    117 
    118 
    119 /*
    120  * Zoom register, apparently present on Sun-2 colour boards only.  See
    121  * the Sun documentation, I don't know anyone who still has a Sun-2.
    122  */
    123 struct cg2_zoom {
    124 	union {
    125 		u_short reg;
    126 		u_char reg_pad[4096];
    127 	} wordpan;
    128 	union {
    129 		struct {
    130 			u_int unused  : 8;
    131 			u_int lineoff : 4;
    132 			u_int pixzoom : 4;
    133 		} reg;
    134 		u_short word;
    135 		u_char reg_pad[4096];
    136 	} zoom;
    137         union {
    138 		struct {
    139 			u_int unused   : 8;
    140 			u_int lorigin  : 4;
    141 			u_int pixeloff : 4;
    142 		} reg;
    143 		u_short word;
    144 		u_char reg_pad[4096];
    145 	} pixpan;
    146 	union {
    147 		u_short reg;
    148 		u_char reg_pad[4096];
    149 	} varzoom;
    150 };
    151 
    152 
    153 /*
    154  * Miscellany.  On the Sun-3 these registers exist in place of the above.
    155  */
    156 struct cg2_nozoom {
    157 	union {				/* double buffer register (see above) */
    158 		struct dblbufreg reg;
    159 		u_short word;
    160 		u_char reg_pad[4096];
    161 	} dblbuf;
    162 	union {				/* start of DMA window */
    163 		u_short reg;
    164 		u_char reg_pad[4096];
    165 	} dmabase;
    166 	union {				/* DMA window size */
    167 		u_short reg;		/* actually 8 bits.  reg*16 == size */
    168 		u_char reg_pad[4096];
    169 	} dmawidth;
    170 	union {				/* frame count */
    171 		u_short reg;		/* actually 8 bits only. r/o */
    172 		u_char reg_pad[4096];
    173 	} framecnt;
    174 };
    175 
    176 
    177 /*
    178  * Raster op control registers.  X doesn't use this, but documented here
    179  * for future reference.
    180  */
    181 struct memropc {
    182 	u_short mrc_dest;
    183 	u_short mrc_source1;
    184 	u_short mrc_source2;
    185 	u_short mrc_pattern;
    186 	u_short mrc_mask1;
    187 	u_short mrc_mask2;
    188 	u_short mrc_shift;
    189 	u_short mrc_op;
    190 	u_short mrc_width;
    191 	u_short mrc_opcount;
    192 	u_short mrc_decoderout;
    193 	u_short mrc_x11;
    194 	u_short mrc_x12;
    195 	u_short mrc_x13;
    196 	u_short mrc_x14;
    197 	u_short mrc_x15;
    198 };
    199 
    200 
    201 /*
    202  * Last chunk of the frame buffer (i.e. from offset 0x200000 and above).
    203  * Exists separately from struct cg2memfb apparently because Sun software
    204  * avoids mapping the latter, though X uses it.
    205  */
    206 struct cg2fb {
    207 
    208 #ifndef	_KERNEL	/* XXX - Hack! */
    209 	/* XXX - Don't want this permanently in the kernel mapping. */
    210 	union {			/* raster op mode frame memory */
    211 		union bitplane ropplane[CG2_N_PLANE];
    212 		union byteplane roppixel;
    213 	} ropio;
    214 #endif	/* _KERNEL	XXX - Hack! */
    215 
    216 	union {			/* raster op control unit (1 per plane) */
    217 		struct memropc ropregs;
    218 		struct {
    219 			u_char pad[2048];
    220 			struct memropc ropregs;
    221 		} prime;
    222 		u_char reg_pad[4096];
    223 	} ropcontrol[9];
    224 	union {			/* status register */
    225 		struct cg2statusreg reg;
    226 		u_short word;
    227 		u_char reg_pad[4096];
    228 	} status;
    229 	union {			/* per-plane mask register */
    230 		u_short reg;	/* 8 bit mask register - set means plane r/w */
    231 		u_char reg_pad[4096];
    232 	} ppmask;
    233 	union {			/* miscellaneous registers */
    234 		struct cg2_zoom zoom;
    235 		struct cg2_nozoom nozoom;
    236 	} misc;
    237 	union {			/* interrupt vector */
    238 		u_short reg;
    239 		u_char reg_pad[32];
    240 	} intrptvec;
    241 	union {			 /* board ID */
    242 		u_short reg;
    243 		u_char reg_pad[16];
    244 	} id;
    245 	union {			 /* extended status */
    246 		struct cg2_extstatus reg;
    247 		u_short word;
    248 		u_char reg_pad[16];
    249 	} extstatus;
    250 	union {			 /* auxiliary raster op mode register (?)*/
    251 		u_short reg;
    252 		u_char reg_pad[4032];
    253 	} ropmode;
    254 	u_short redmap[256];	/* shadow colour maps */
    255 	u_short greenmap[256];
    256 	u_short bluemap[256];
    257 };
    258