| /src/sys/dev/pci/ |
| if_bce.c | 253 uint16_t phyval; local in function:bce_attach
446 bce_mii_read(sc->bce_dev, 1, 26, &phyval);
448 phyval & 0x7fff); /* MAGIC */
450 bce_mii_read(sc->bce_dev, 1, 27, &phyval);
452 phyval | (1 << 6)); /* MAGIC */
1453 uint16_t phyval; local in function:bce_statchg
1468 bce_mii_read(sc->bce_dev, 1, 26, &phyval);
1470 phyval & 0x7fff); /* MAGIC */
1472 bce_mii_read(sc->bce_dev, 1, 27, &phyval);
1474 phyval | (1 << 6)); /* MAGIC *
[all...] |
| if_sk.c | 2440 uint16_t phyval; local in function:sk_unreset_xmac
2466 SK_PHYADDR_BCOM, 0x03, &phyval);
2467 if (phyval == 0x6041) {
|
| if_alc.c | 931 uint16_t phyval; local in function:alc_phy_reset_816x
975 alc_miidbg_readreg(sc, MII_DBG_GREENCFG2, &phyval);
976 phyval &= ~DBG_GREENCFG2_GATE_DFSE_EN;
977 alc_miidbg_writereg(sc, MII_DBG_GREENCFG2, phyval);
987 alc_miiext_readreg(sc, MII_EXT_PCS, MII_EXT_CLDCTL3, &phyval);
988 phyval |= EXT_CLDCTL3_BP_CABLE1TH_DET_GT;
989 alc_miiext_writereg(sc, MII_EXT_PCS, MII_EXT_CLDCTL3, phyval);
991 alc_miidbg_readreg(sc, MII_DBG_GREENCFG2, &phyval);
992 phyval |= DBG_GREENCFG2_BP_GREEN;
993 alc_miidbg_writereg(sc, MII_DBG_GREENCFG2, phyval);
[all...] |
| if_bge.c | 6266 uint16_t phyval; local in function:bge_link_upd
6304 BRGPHY_MII_ISR, &phyval);
|
| if_wm.c | 16941 uint16_t phyval; local in function:wm_lplu_d0_disable
16955 mii->mii_readreg(sc->sc_dev, 1, IGPHY_POWER_MGMT, &phyval);
16956 phyval &= ~PMR_D0_LPLU;
16957 mii->mii_writereg(sc->sc_dev, 1, IGPHY_POWER_MGMT, phyval);
16983 wm_gmii_hv_readreg(sc->sc_dev, 1, HV_OEM_BITS, &phyval);
16984 phyval &= ~(HV_OEM_BITS_A1KDIS | HV_OEM_BITS_LPLU);
16986 phyval |= HV_OEM_BITS_ANEGNOW;
16987 wm_gmii_hv_writereg(sc->sc_dev, 1, HV_OEM_BITS, phyval);
18161 uint16_t phyval; local in function:wm_pll_workaround_i210
18188 GS40G_PHY_PLL_FREQ_PAGE | GS40G_PHY_PLL_FREQ_REG, &phyval);
[all...] |
