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    Searched defs:prev_sclk (Results 1 - 5 of 5) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_kv_dpm.c 147 u32 prev_sclk = 0; local in function:sumo_construct_sclk_voltage_mapping_table
150 if (table[i].ulSupportedSCLK > prev_sclk) {
155 prev_sclk = table[i].ulSupportedSCLK;
amdgpu_si_dpm.c 2398 u32 prev_sclk; local in function:si_populate_power_containment_values
2427 prev_sclk = state->performance_levels[i-1].sclk;
2434 if (prev_sclk > max_sclk)
2438 (prev_sclk == max_sclk) ||
2442 min_sclk = prev_sclk;
2444 min_sclk = (prev_sclk * (u32)max_ps_percent) / 100;
  /src/sys/external/bsd/drm2/dist/drm/radeon/
radeon_sumo_dpm.c 1603 u32 prev_sclk = 0; local in function:sumo_construct_sclk_voltage_mapping_table
1606 if (table[i].ulSupportedSCLK > prev_sclk) {
1611 prev_sclk = table[i].ulSupportedSCLK;
radeon_ni_dpm.c 2462 u32 prev_sclk; local in function:ni_populate_power_containment_values
2506 prev_sclk = state->performance_levels[i-1].sclk;
2511 if (max_sclk < prev_sclk)
2514 if ((max_ps_percent == 0) || (prev_sclk == max_sclk) || eg_pi->uvd_enabled)
2517 min_sclk = prev_sclk;
2519 min_sclk = (prev_sclk * (u32)max_ps_percent) / 100;
radeon_si_dpm.c 2300 u32 prev_sclk; local in function:si_populate_power_containment_values
2329 prev_sclk = state->performance_levels[i-1].sclk;
2336 if (prev_sclk > max_sclk)
2340 (prev_sclk == max_sclk) ||
2344 min_sclk = prev_sclk;
2346 min_sclk = (prev_sclk * (u32)max_ps_percent) / 100;

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