| /src/external/gpl3/gdb.old/dist/sim/moxie/ |
| interp.c | 47 ((sim_core_read_aligned_1 (scpu, cia, read_map, addr) << 24) \ 48 + (sim_core_read_aligned_1 (scpu, cia, read_map, addr+1) << 16) \ 49 + (sim_core_read_aligned_1 (scpu, cia, read_map, addr+2) << 8) \ 50 + (sim_core_read_aligned_1 (scpu, cia, read_map, addr+3))) 55 ((sim_core_read_aligned_1 (scpu, cia, read_map, addr) << 8) \ 56 + (sim_core_read_aligned_1 (scpu, cia, read_map, addr+1))) << 16) >> 16) 149 wbat (sim_cpu *scpu, int32_t pc, int32_t x, int32_t v) 151 address_word cia = CPU_PC_GET (scpu); 153 sim_core_write_aligned_1 (scpu, cia, write_map, x, v); 159 wsat (sim_cpu *scpu, int32_t pc, int32_t x, int32_t v 247 sim_cpu *scpu = STATE_CPU (sd, 0); \/* FIXME *\/ local 1268 sim_cpu *scpu = STATE_CPU (sd, 0); \/* FIXME *\/ local 1294 sim_cpu *scpu = STATE_CPU (sd, 0); \/* FIXME *\/ local [all...] |
| /src/external/gpl3/gdb/dist/sim/moxie/ |
| interp.c | 47 ((sim_core_read_aligned_1 (scpu, cia, read_map, addr) << 24) \ 48 + (sim_core_read_aligned_1 (scpu, cia, read_map, addr+1) << 16) \ 49 + (sim_core_read_aligned_1 (scpu, cia, read_map, addr+2) << 8) \ 50 + (sim_core_read_aligned_1 (scpu, cia, read_map, addr+3))) 55 ((sim_core_read_aligned_1 (scpu, cia, read_map, addr) << 8) \ 56 + (sim_core_read_aligned_1 (scpu, cia, read_map, addr+1))) << 16) >> 16) 149 wbat (sim_cpu *scpu, int32_t pc, int32_t x, int32_t v) 151 address_word cia = CPU_PC_GET (scpu); 153 sim_core_write_aligned_1 (scpu, cia, write_map, x, v); 159 wsat (sim_cpu *scpu, int32_t pc, int32_t x, int32_t v 247 sim_cpu *scpu = STATE_CPU (sd, 0); \/* FIXME *\/ local 1268 sim_cpu *scpu = STATE_CPU (sd, 0); \/* FIXME *\/ local 1294 sim_cpu *scpu = STATE_CPU (sd, 0); \/* FIXME *\/ local [all...] |