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    Searched defs:speed_cntl (Results 1 - 10 of 10) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/radeon/
radeon_rv770.c 2032 u32 link_width_cntl, lanes, speed_cntl, tmp; local in function:rv770_pcie_gen2_enable
2071 speed_cntl = RREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL);
2072 if ((speed_cntl & LC_OTHER_SIDE_EVER_SENT_GEN2) &&
2073 (speed_cntl & LC_OTHER_SIDE_SUPPORTS_GEN2)) {
2084 speed_cntl = RREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL);
2085 speed_cntl &= ~LC_TARGET_LINK_SPEED_OVERRIDE_EN;
2086 WREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL, speed_cntl);
2088 speed_cntl = RREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL);
2089 speed_cntl |= LC_CLR_FAILED_SPD_CHANGE_CNT;
2090 WREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL, speed_cntl);
    [all...]
radeon_r600.c 4549 u32 link_width_cntl, lanes, speed_cntl, training_cntl, tmp; local in function:r600_pcie_gen2_enable
4573 speed_cntl = RREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL);
4574 if (speed_cntl & LC_CURRENT_DATA_RATE) {
4602 speed_cntl = RREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL);
4603 if ((speed_cntl & LC_OTHER_SIDE_EVER_SENT_GEN2) &&
4604 (speed_cntl & LC_OTHER_SIDE_SUPPORTS_GEN2)) {
4618 speed_cntl &= ~LC_SPEED_CHANGE_ATTEMPTS_ALLOWED_MASK;
4619 speed_cntl |= (0x3 << LC_SPEED_CHANGE_ATTEMPTS_ALLOWED_SHIFT);
4620 speed_cntl &= ~LC_VOLTAGE_TIMER_SEL_MASK;
4621 speed_cntl &= ~LC_FORCE_DIS_HW_SPEED_CHANGE
    [all...]
radeon_evergreen.c 5339 u32 link_width_cntl, speed_cntl; local in function:evergreen_pcie_gen2_enable
5358 speed_cntl = RREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL);
5359 if (speed_cntl & LC_CURRENT_DATA_RATE) {
5366 if ((speed_cntl & LC_OTHER_SIDE_EVER_SENT_GEN2) ||
5367 (speed_cntl & LC_OTHER_SIDE_SUPPORTS_GEN2)) {
5373 speed_cntl = RREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL);
5374 speed_cntl &= ~LC_TARGET_LINK_SPEED_OVERRIDE_EN;
5375 WREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL, speed_cntl);
5377 speed_cntl = RREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL);
5378 speed_cntl |= LC_CLR_FAILED_SPD_CHANGE_CNT
    [all...]
radeon_ci_dpm.c 4821 u32 speed_cntl = 0; local in function:ci_get_current_pcie_speed
4823 speed_cntl = RREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL) & LC_CURRENT_DATA_RATE_MASK;
4824 speed_cntl >>= LC_CURRENT_DATA_RATE_SHIFT;
4826 return (u16)speed_cntl;
radeon_si.c 7104 u32 speed_cntl, current_data_rate; local in function:si_pcie_gen3_enable
7128 speed_cntl = RREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL);
7129 current_data_rate = (speed_cntl & LC_CURRENT_DATA_RATE_MASK) >>
7261 speed_cntl |= LC_FORCE_EN_SW_SPEED_CHANGE | LC_FORCE_DIS_HW_SPEED_CHANGE;
7262 speed_cntl &= ~LC_FORCE_DIS_SW_SPEED_CHANGE;
7263 WREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL, speed_cntl);
7275 speed_cntl = RREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL);
7276 speed_cntl |= LC_INITIATE_LINK_SPEED_CHANGE;
7277 WREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL, speed_cntl);
7280 speed_cntl = RREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL)
    [all...]
radeon_cik.c 9569 u32 speed_cntl, current_data_rate; local in function:cik_pcie_gen3_enable
9593 speed_cntl = RREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL);
9594 current_data_rate = (speed_cntl & LC_CURRENT_DATA_RATE_MASK) >>
9725 speed_cntl |= LC_FORCE_EN_SW_SPEED_CHANGE | LC_FORCE_DIS_HW_SPEED_CHANGE;
9726 speed_cntl &= ~LC_FORCE_DIS_SW_SPEED_CHANGE;
9727 WREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL, speed_cntl);
9739 speed_cntl = RREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL);
9740 speed_cntl |= LC_INITIATE_LINK_SPEED_CHANGE;
9741 WREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL, speed_cntl);
9744 speed_cntl = RREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL)
    [all...]
radeon_si_dpm.c 5739 u32 speed_cntl; local in function:si_get_current_pcie_speed
5741 speed_cntl = RREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL) & LC_CURRENT_DATA_RATE_MASK;
5742 speed_cntl >>= LC_CURRENT_DATA_RATE_SHIFT;
5744 return (u16)speed_cntl;
  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_cik.c 1465 u32 speed_cntl, current_data_rate; local in function:cik_pcie_gen3_enable
1482 speed_cntl = RREG32_PCIE(ixPCIE_LC_SPEED_CNTL);
1483 current_data_rate = (speed_cntl & PCIE_LC_SPEED_CNTL__LC_CURRENT_DATA_RATE_MASK) >>
1620 speed_cntl |= PCIE_LC_SPEED_CNTL__LC_FORCE_EN_SW_SPEED_CHANGE_MASK |
1622 speed_cntl &= ~PCIE_LC_SPEED_CNTL__LC_FORCE_DIS_SW_SPEED_CHANGE_MASK;
1623 WREG32_PCIE(ixPCIE_LC_SPEED_CNTL, speed_cntl);
1636 speed_cntl = RREG32_PCIE(ixPCIE_LC_SPEED_CNTL);
1637 speed_cntl |= PCIE_LC_SPEED_CNTL__LC_INITIATE_LINK_SPEED_CHANGE_MASK;
1638 WREG32_PCIE(ixPCIE_LC_SPEED_CNTL, speed_cntl);
1641 speed_cntl = RREG32_PCIE(ixPCIE_LC_SPEED_CNTL)
    [all...]
amdgpu_si.c 1660 u32 speed_cntl, current_data_rate; local in function:si_pcie_gen3_enable
1677 speed_cntl = RREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL);
1678 current_data_rate = (speed_cntl & LC_CURRENT_DATA_RATE_MASK) >>
1804 speed_cntl |= LC_FORCE_EN_SW_SPEED_CHANGE | LC_FORCE_DIS_HW_SPEED_CHANGE;
1805 speed_cntl &= ~LC_FORCE_DIS_SW_SPEED_CHANGE;
1806 WREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL, speed_cntl);
1819 speed_cntl = RREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL);
1820 speed_cntl |= LC_INITIATE_LINK_SPEED_CHANGE;
1821 WREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL, speed_cntl);
1824 speed_cntl = RREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL)
    [all...]
amdgpu_si_dpm.c 6193 u32 speed_cntl; local in function:si_get_current_pcie_speed
6195 speed_cntl = RREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL) & LC_CURRENT_DATA_RATE_MASK;
6196 speed_cntl >>= LC_CURRENT_DATA_RATE_SHIFT;
6198 return (u16)speed_cntl;

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