| /src/sys/arch/ia64/ia64/ | 
| clock.c | 51 ia64_get_timecount(struct timecounter* tc) 80 	static struct timecounter tc =  {  local in function:cpu_initclocks
 95 	tc.tc_frequency = itc_frequency;
 96 	tc_init(&tc);
 
 | 
| /src/sys/arch/hppa/dev/ | 
| clock.c | 61 	static struct timecounter tc = {  local in function:cpu_initclocks 71 	tc.tc_frequency = cpu_hzticks * hz;
 77 	tc_init(&tc);
 81 get_itimer_count(struct timecounter *tc)
 
 | 
| /src/sys/arch/mips/mips/ | 
| mips3_clock.c | 111 	static struct timecounter tc =  {  local in function:mips3_init_tc 118 	tc.tc_frequency = curcpu()->ci_cpu_freq;
 120 		tc.tc_frequency /= 2;
 122 	curcpu()->ci_cctr_freq = tc.tc_frequency;
 124 	tc_init(&tc);
 
 | 
| /src/games/hack/ | 
| hack.track.c | 101 	coord           tc;  local in function:gettrack 107 		tc = utrack[i];
 108 		distsq = (x - tc.x) * (x - tc.x) + (y - tc.y) * (y - tc.y);
 
 | 
| /src/sys/arch/evbmips/ingenic/ | 
| clock.c | 51 ingenic_count_read(struct timecounter *tc) 62 	static struct timecounter tc =  {  local in function:cpu_initclocks
 70 	curcpu()->ci_cctr_freq = tc.tc_frequency;
 72 	tc_init(&tc);
 
 | 
| /src/sys/arch/hpcmips/tx/ | 
| tx39uart.c | 73 	tx_chipset_tag_t tc;  local in function:tx39uart_attach 76 	sc->sc_tc = tc = ta->ta_tc;
 
 | 
| tx39ir.c | 88 	tx_chipset_tag_t tc;  local in function:tx39ir_attach 91 	sc->sc_tc = tc = tca->tca_tc;
 97 	reg = tx_conf_read(tc, TX39_IRCTRL1_REG);
 99 	tx_conf_write(tc, TX39_IRCTRL1_REG, reg);
 102 	reg = tx_conf_read(tc, TX39_CLOCKCTRL_REG);
 104 	tx_conf_write(tc, TX39_CLOCKCTRL_REG, reg);
 110 	tx_intr_establish(tc, MAKEINTR(5, TX39_INTRSTATUS5_CARSTINT),
 112 	tx_intr_establish(tc, MAKEINTR(5, TX39_INTRSTATUS5_POSCARINT),
 114 	tx_intr_establish(tc, MAKEINTR(5, TX39_INTRSTATUS5_NEGCARINT),
 127 	tx_chipset_tag_t tc = sc->sc_tc  local in function:tx39ir_dump
 [all...]
 | 
| tx39.c | 102 	tx_chipset_tag_t tc;  local in function:tx_init 106 	tc = tx_conf_get_tag();
 130 		tc->tc_chipset = __TX391X;
 134 		rev = tx_conf_read(tc, TX3922_REVISION_REG);
 139 		tc->tc_chipset = __TX392X;
 
 | 
| tx39power.c | 100 	tx_chipset_tag_t tc;  local in function:tx39power_attach 104 	tc = sc->sc_tc = ta->ta_tc;
 105 	tx_conf_register_power(tc, self);
 111 	reg = tx_conf_read(tc, TX39_POWERCTRL_REG);
 113 	tx_conf_write(tc, TX39_POWERCTRL_REG, reg);
 116 	reg = tx_conf_read(tc, TX39_POWERCTRL_REG);
 122 	tx_conf_write(tc, TX39_POWERCTRL_REG, reg);
 126 	tx_intr_establish(tc, MAKEINTR(5, TX39_INTRSTATUS5_POSPWRINT),
 129 	tx_intr_establish(tc, MAKEINTR(5, TX39_INTRSTATUS5_NEGPWRINT),
 133 	tx_intr_establish(tc, MAKEINTR(5, TX39_INTRSTATUS5_POSPWROKINT)
 151  tx_chipset_tag_t tc = tx_conf_get_tag();  local in function:tx39power_suspend_cpu
 282  tx_chipset_tag_t tc = sc->sc_tc;  local in function:__tx39power_dump
 [all...]
 | 
| tx39spi.c | 73 	tx_chipset_tag_t tc = sc->sc_tc = ta->ta_tc;  local in function:tx39spi_attach 76 	reg = tx_conf_read(tc, TX39_SPICTRL_REG);
 78 	tx_conf_write(tc, TX39_SPICTRL_REG, reg);
 79 	tx_conf_write(tc, TX39_INTRCLEAR5_REG, TX39_INTRSTATUS5_SPIBUFAVAILINT);
 80 	tx_conf_write(tc, TX39_INTRCLEAR5_REG, TX39_INTRSTATUS5_SPIERRINT);
 81 	tx_conf_write(tc, TX39_INTRCLEAR5_REG, TX39_INTRSTATUS5_SPIRCVINT);
 82 	tx_conf_write(tc, TX39_INTRCLEAR5_REG, TX39_INTRSTATUS5_SPIEMPTYINT);
 85 	tx_intr_establish(tc, MAKEINTR(5, TX39_INTRSTATUS5_SPI),
 144 	tx_chipset_tag_t tc = sc->sc_tc;  local in function:tx39spi_put_word
 146 	while(!(tx_conf_read(tc, TX39_INTRSTATUS5_REG) & TX39_INTRSTATUS5_SPIBUFAVAILINT)
 156  tx_chipset_tag_t tc = sc->sc_tc;  local in function:tx39spi_get_word
 168  tx_chipset_tag_t tc = sc->sc_tc;  local in function:tx39spi_enable
 180  tx_chipset_tag_t tc = sc->sc_tc;  local in function:tx39spi_delayval
 188  tx_chipset_tag_t tc = sc->sc_tc;  local in function:tx39spi_baudrate
 196  tx_chipset_tag_t tc = sc->sc_tc;  local in function:tx39spi_word
 208  tx_chipset_tag_t tc = sc->sc_tc;  local in function:tx39spi_phapol
 220  tx_chipset_tag_t tc = sc->sc_tc;  local in function:tx39spi_clkpol
 232  tx_chipset_tag_t tc = sc->sc_tc;  local in function:tx39spi_lsb
 [all...]
 | 
| txcsbus.c | 250 	tx_chipset_tag_t tc = sc->sc_tc;  local in function:__txcsbus_alloc_cstag 278 			reg = tx_conf_read(tc, TX39_MEMCONFIG0_REG);
 280 			tx_conf_write(tc, TX39_MEMCONFIG0_REG, reg);
 286 			reg = tx_conf_read(tc, TX39_MEMCONFIG1_REG);
 290 			tx_conf_write(tc, TX39_MEMCONFIG1_REG, reg);
 297 			reg = tx_conf_read(tc, TX39_MEMCONFIG0_REG);
 299 			tx_conf_write(tc, TX39_MEMCONFIG0_REG, reg);
 303 			reg = tx_conf_read(tc, TX39_MEMCONFIG1_REG);
 307 			tx_conf_write(tc, TX39_MEMCONFIG1_REG, reg);
 311 			reg = tx_conf_read(tc, TX39_MEMCONFIG3_REG)
 [all...]
 | 
| tx39biu.c | 86 	tx_chipset_tag_t tc;  local in function:tx39biu_attach 91 	sc->sc_tc = tc = ta->ta_tc;
 94 	tx39biu_dump(tc);
 101 	reg = tx_conf_read(tc, TX39_MEMCONFIG4_REG);
 104 	tx_conf_write(tc, TX39_MEMCONFIG4_REG, reg);
 106 	reg = tx_conf_read(tc, TX39_MEMCONFIG4_REG);
 146 	tx_chipset_tag_t tc;  local in function:tx39biu_intr
 152 	tc = sc->sc_tc;
 154 	reg = tx_conf_read(tc, TX39_MEMCONFIG4_REG);
 156 	tx_conf_write(tc, TX39_MEMCONFIG4_REG, reg)
 [all...]
 | 
| /src/sys/dev/ic/ | 
| acpipmtimer.c | 20 	struct timecounter tc;  member in struct:hwtc 34 	struct hwtc *tc;  local in function:acpipmtimer_attach
 36 	tc = malloc(sizeof(struct hwtc), M_DEVBUF, M_WAITOK|M_ZERO);
 37 	if (tc == NULL)
 40 	tc->tc.tc_name = device_xname(dev);
 41 	tc->tc.tc_frequency = ACPI_PM_TIMER_FREQUENCY;
 43 		tc->tc.tc_counter_mask = 0xffffffff
 68  struct hwtc *tc = timer;  local in function:acpipmtimer_detach
 [all...]
 | 
| hpet.c | 82 	struct timecounter *tc;  local in function:hpet_attach_subr 87 	tc = &sc->sc_tc;
 89 	tc->tc_name = device_xname(dv);
 90 	tc->tc_get_timecount = hpet_get_timecount;
 91 	tc->tc_quality = 2000;
 93 	tc->tc_counter_mask = 0xffffffff;
 117 	tc->tc_frequency = (tmp / 2) + (tmp & 1);
 127 	tc->tc_priv = sc;
 128 	tc_init(tc);
 151 hpet_get_timecount(struct timecounter *tc)
 [all...]
 | 
| /src/sys/dev/pci/ixgbe/ | 
| ixgbe_dcb_82598.c | 56 	int tc;  local in function:ixgbe_dcb_get_tc_stats_82598 64 	for (tc = 0; tc < tc_count; tc++) {
 66 		stats->qptc[tc] += IXGBE_READ_REG(hw, IXGBE_QPTC(tc));
 68 		stats->qbtc[tc] += IXGBE_READ_REG(hw, IXGBE_QBTC(tc));
 70 		stats->qprc[tc] += IXGBE_READ_REG(hw, IXGBE_QPRC(tc));
 90  int tc;  local in function:ixgbe_dcb_get_pfc_stats_82598
 [all...]
 | 
| ixgbe_dcb_82599.c | 56 	int tc;  local in function:ixgbe_dcb_get_tc_stats_82599 64 	for (tc = 0; tc < tc_count; tc++) {
 66 		stats->qptc[tc] += IXGBE_READ_REG(hw, IXGBE_QPTC(tc));
 68 		stats->qbtc[tc] += IXGBE_READ_REG(hw, IXGBE_QBTC_L(tc));
 69 		stats->qbtc[tc] +=
 70 			(((u64)(IXGBE_READ_REG(hw, IXGBE_QBTC_H(tc)))) << 32)
 97  int tc;  local in function:ixgbe_dcb_get_pfc_stats_82599
 [all...]
 | 
| /src/sys/arch/alpha/alpha/ | 
| qemu.c | 104 qemu_get_timecount(struct timecounter * const tc __unused) 182 	struct timecounter * const tc = &sc->sc_tc;  local in function:qemu_attach
 192 	tc->tc_name = "Qemu";
 193 	tc->tc_get_timecount = qemu_get_timecount;
 194 	tc->tc_quality = 3000;
 195 	tc->tc_counter_mask = __BITS(0,31);
 196 	tc->tc_frequency = 1000000000UL;	/* nanosecond granularity */
 197 	tc->tc_priv = sc;
 198 	tc_init(tc);
 
 | 
| /src/sys/arch/riscv/riscv/ | 
| clock_machdep.c | 53 timer_get_timecount(struct timecounter *tc) 58 static struct timecounter tc =  {  variable in typeref:struct:timecounter
 107 		tc.tc_frequency = timer_frequency;
 108 		tc_init(&tc);
 
 | 
| /src/sys/arch/mipsco/obio/ | 
| rambo.c | 139 rambo_get_timecount(struct timecounter *tc) 148 	static struct timecounter tc = {  local in function:rambo_tc_init
 156 	tc_init(&tc);
 
 | 
| /src/sys/arch/hp300/hp300/ | 
| clock.c | 191 	static struct timecounter tc = {  local in function:cpu_initclocks 256 	tc_init(&tc);
 309 mc6840_counter(struct timecounter *tc)
 
 | 
| /src/sys/arch/hpcmips/dev/ | 
| ucbio.c | 126 	tx_chipset_tag_t tc = sc->sc_tc;	  local in function:betty_out 130 	reg = txsibsf0_reg_read(tc, UCB1200_IO_DATA_REG);
 135 	txsibsf0_reg_write(tc, UCB1200_IO_DATA_REG, reg);
 142 	tx_chipset_tag_t tc = sc->sc_tc;	  local in function:betty_in
 143 	txreg_t reg = txsibsf0_reg_read(tc, UCB1200_IO_DATA_REG);
 175 	tx_chipset_tag_t tc = sc->sc_tc;	  local in function:betty_update
 180 	dir = stat->dir = txsibsf0_reg_read(tc, UCB1200_IO_DIR_REG);
 181 	data = txsibsf0_reg_read(tc, UCB1200_IO_DATA_REG);
 
 | 
| /src/sys/arch/mvme68k/dev/ | 
| clock_pcc.c | 157 clock_pcc_getcount(struct timecounter *tc) 194 	uint16_t tc;  local in function:clock_pcc_profintr
 198 	tc = pcc_reg_read16(sys_pcc, PCCREG_TMR1_COUNT);
 200 	if (tc > pcc_reg_read16(sys_pcc, PCCREG_TMR1_COUNT))
 
 | 
| /src/sys/arch/pmax/pmax/ | 
| dec_maxine.c | 86 #include <dev/tc/tcvar.h> 87 #include <dev/tc/ioasicvar.h>
 88 #include <dev/tc/ioasicreg.h>
 95 #include <dev/tc/zs_ioasicvar.h>
 326 	 * non-DMA interrupts from ioctl devices or TC options.
 375 dec_maxine_get_timecount(struct timecounter *tc)
 392 	static struct timecounter tc = {  local in function:dec_maxine_tc_init
 400 	tc_init(&tc);
 
 | 
| /src/sys/compat/common/ | 
| tty_43.c | 174 		struct tchars *tc = (struct tchars *)data;  local in function:compat_43_ttioctl 176 		tc->t_intrc = tty_getctrlchar(tp, VINTR);
 177 		tc->t_quitc = tty_getctrlchar(tp, VQUIT);
 178 		tc->t_startc = tty_getctrlchar(tp, VSTART);
 179 		tc->t_stopc = tty_getctrlchar(tp, VSTOP);
 180 		tc->t_eofc = tty_getctrlchar(tp, VEOF);
 181 		tc->t_brkc = tty_getctrlchar(tp, VEOL);
 185 		struct tchars *tc = (struct tchars *)data;  local in function:compat_43_ttioctl
 187 		tty_setctrlchar(tp, VINTR, tc->t_intrc);
 188 		tty_setctrlchar(tp, VQUIT, tc->t_quitc)
 [all...]
 | 
| /src/sys/dev/mvme/ | 
| clock_pcctwo.c | 161 clock_pcctwo_getcount(struct timecounter *tc) 197 	u_int32_t tc;  local in function:clock_pcctwo_profintr
 201 	tc = pcc2_reg_read32(sys_pcctwo, PCC2REG_TIMER1_COUNTER);
 203 	if (tc > pcc2_reg_read32(sys_pcctwo, PCC2REG_TIMER1_COUNTER))
 
 |