HomeSort by: relevance | last modified time | path
    Searched hist:1.111 (Results 1 - 25 of 1185) sorted by relevancy

1 2 3 4 5 6 7 8 91011>>

  /src/lib/libc/stdio/
mkstemps.c 1.1.42.1 Sun Oct 19 09:37:13 UTC 2025 martin Pull up following revision(s) (requested by mrg in ticket #56):

tools/compat/configure.ac: revision 1.111
tools/compat/compat_defs.h: revision 1.126
tools/compat/compat_defs.h: revision 1.127
tools/compat/nbtool_config.h.in: revision 1.60
tools/compat/nbtool_config.h.in: revision 1.61
lib/libc/stdio/mkstemps.c: revision 1.2
tools/compat/configure: revision 1.108
tools/compat/configure: revision 1.109
tools/compat/nbtool_config.h.in: revision 1.59
tools/compat/Makefile: revision 1.95
tools/compat/configure.ac: revision 1.110

Add more functions needed by mandoc

regen

add vsyslog decl check

regen

Do the nbtool dance.

  /src/tests/usr.bin/xlint/lint1/
msg_345.c 1.1 Sun Jun 27 19:10:29 UTC 2021 rillig lint: require C11 for _Generic

This does not have any effect in practice since the option -g
(originally meant for GCC extensions to the C standards) implicitly
allows all features from C11, since err.c 1.111 from 2021-04-14.

Since the default lint flags for NetBSD builds include the option -g,
this allows all C11 features.

Currently it is not possible to say "allow GNU extensions but not C11".

  /src/sys/arch/usermode/target/i386/
cpu_i386.c 1.4.34.1 Sun Jan 27 18:43:08 UTC 2019 martin Pull up following revision(s) (requested by maxv in ticket #1173):
sys/arch/hppa/hppa/sig_machdep.c: revision 1.26
sys/arch/arm/arm/sig_machdep.c: revision 1.51
sys/arch/i386/i386/machdep.c: revision 1.813
sys/arch/alpha/alpha/machdep.c: revision 1.352
sys/arch/m68k/m68k/sig_machdep.c: revision 1.50
sys/arch/usermode/target/i386/cpu_i386.c: revision 1.8
sys/arch/sparc64/sparc64/machdep.c: revision 1.289
sys/arch/sparc64/sparc64/netbsd32_machdep.c: revision 1.111
sys/arch/powerpc/powerpc/sig_machdep.c: revision 1.46
sys/arch/amd64/amd64/netbsd32_machdep.c: revision 1.117
sys/arch/sh3/sh3/sh3_machdep.c: revision 1.106
sys/arch/mips/mips/netbsd32_machdep.c: revision 1.16
sys/arch/mips/mips/sig_machdep.c: revision 1.24
sys/arch/riscv/riscv/sig_machdep.c: revision 1.2
sys/arch/usermode/target/x86_64/cpu_x86_64.c: revision 1.7
sys/arch/vax/vax/sig_machdep.c: revision 1.23

Fix widespread leak in the sendsig_siginfo() functions. sigframe_siginfo
has padding, so zero it out properly. While here I'm also zeroing out some
other things in several ports, for safety. Same problem in netbsd32, so
fix that too.

I can't compile-test on each architecture, but there should be no
breakage (tm).

Overall this fixes at least 14 info leaks. Prompted by the discovery by
KLEAK of a leak in amd64's sendsig_siginfo.
1.4.28.1 Wed Jan 30 13:29:52 UTC 2019 martin Pull up following revision(s) (requested by maxv in ticket #1677):

sys/arch/hppa/hppa/sig_machdep.c: revision 1.26
sys/arch/arm/arm/sig_machdep.c: revision 1.51
sys/arch/i386/i386/machdep.c: revision 1.813
sys/arch/alpha/alpha/machdep.c: revision 1.352
sys/arch/m68k/m68k/sig_machdep.c: revision 1.50
sys/arch/usermode/target/i386/cpu_i386.c: revision 1.8
sys/arch/sparc64/sparc64/machdep.c: revision 1.289
sys/arch/sparc64/sparc64/netbsd32_machdep.c: revision 1.111
sys/arch/powerpc/powerpc/sig_machdep.c: revision 1.46
sys/arch/amd64/amd64/netbsd32_machdep.c: revision 1.117
sys/arch/sh3/sh3/sh3_machdep.c: revision 1.106
sys/arch/mips/mips/netbsd32_machdep.c: revision 1.16
sys/arch/mips/mips/sig_machdep.c: revision 1.24
sys/arch/usermode/target/x86_64/cpu_x86_64.c: revision 1.7
sys/arch/vax/vax/sig_machdep.c: revision 1.23

Fix widespread leak in the sendsig_siginfo() functions. sigframe_siginfo
has padding, so zero it out properly. While here I'm also zeroing out some
other things in several ports, for safety. Same problem in netbsd32, so
fix that too.

I can't compile-test on each architecture, but there should be no
breakage (tm).

Overall this fixes at least 14 info leaks. Prompted by the discovery by
KLEAK of a leak in amd64's sendsig_siginfo.
1.4.20.1 Wed Jan 30 13:32:57 UTC 2019 martin Pull up following revision(s) (requested by maxv in ticket #1677):

sys/arch/hppa/hppa/sig_machdep.c: revision 1.26
sys/arch/arm/arm/sig_machdep.c: revision 1.51
sys/arch/i386/i386/machdep.c: revision 1.813
sys/arch/alpha/alpha/machdep.c: revision 1.352
sys/arch/m68k/m68k/sig_machdep.c: revision 1.50
sys/arch/usermode/target/i386/cpu_i386.c: revision 1.8
sys/arch/sparc64/sparc64/machdep.c: revision 1.289
sys/arch/sparc64/sparc64/netbsd32_machdep.c: revision 1.111
sys/arch/powerpc/powerpc/sig_machdep.c: revision 1.46
sys/arch/amd64/amd64/netbsd32_machdep.c: revision 1.117
sys/arch/sh3/sh3/sh3_machdep.c: revision 1.106
sys/arch/mips/mips/netbsd32_machdep.c: revision 1.16
sys/arch/mips/mips/sig_machdep.c: revision 1.24
sys/arch/usermode/target/x86_64/cpu_x86_64.c: revision 1.7
sys/arch/vax/vax/sig_machdep.c: revision 1.23

Fix widespread leak in the sendsig_siginfo() functions. sigframe_siginfo
has padding, so zero it out properly. While here I'm also zeroing out some
other things in several ports, for safety. Same problem in netbsd32, so
fix that too.

I can't compile-test on each architecture, but there should be no
breakage (tm).

Overall this fixes at least 14 info leaks. Prompted by the discovery by
KLEAK of a leak in amd64's sendsig_siginfo.
1.4.16.1 Wed Jan 30 13:27:27 UTC 2019 martin Pull up following revision(s) (requested by maxv in ticket #1677):

sys/arch/hppa/hppa/sig_machdep.c: revision 1.26
sys/arch/arm/arm/sig_machdep.c: revision 1.51
sys/arch/i386/i386/machdep.c: revision 1.813
sys/arch/alpha/alpha/machdep.c: revision 1.352
sys/arch/m68k/m68k/sig_machdep.c: revision 1.50
sys/arch/usermode/target/i386/cpu_i386.c: revision 1.8
sys/arch/sparc64/sparc64/machdep.c: revision 1.289
sys/arch/sparc64/sparc64/netbsd32_machdep.c: revision 1.111
sys/arch/powerpc/powerpc/sig_machdep.c: revision 1.46
sys/arch/amd64/amd64/netbsd32_machdep.c: revision 1.117
sys/arch/sh3/sh3/sh3_machdep.c: revision 1.106
sys/arch/mips/mips/netbsd32_machdep.c: revision 1.16
sys/arch/mips/mips/sig_machdep.c: revision 1.24
sys/arch/usermode/target/x86_64/cpu_x86_64.c: revision 1.7
sys/arch/vax/vax/sig_machdep.c: revision 1.23

Fix widespread leak in the sendsig_siginfo() functions. sigframe_siginfo
has padding, so zero it out properly. While here I'm also zeroing out some
other things in several ports, for safety. Same problem in netbsd32, so
fix that too.

I can't compile-test on each architecture, but there should be no
breakage (tm).

Overall this fixes at least 14 info leaks. Prompted by the discovery by
KLEAK of a leak in amd64's sendsig_siginfo.
  /src/sys/arch/usermode/target/x86_64/
cpu_x86_64.c 1.2.42.1 Sun Jan 27 18:43:09 UTC 2019 martin Pull up following revision(s) (requested by maxv in ticket #1173):
sys/arch/hppa/hppa/sig_machdep.c: revision 1.26
sys/arch/arm/arm/sig_machdep.c: revision 1.51
sys/arch/i386/i386/machdep.c: revision 1.813
sys/arch/alpha/alpha/machdep.c: revision 1.352
sys/arch/m68k/m68k/sig_machdep.c: revision 1.50
sys/arch/usermode/target/i386/cpu_i386.c: revision 1.8
sys/arch/sparc64/sparc64/machdep.c: revision 1.289
sys/arch/sparc64/sparc64/netbsd32_machdep.c: revision 1.111
sys/arch/powerpc/powerpc/sig_machdep.c: revision 1.46
sys/arch/amd64/amd64/netbsd32_machdep.c: revision 1.117
sys/arch/sh3/sh3/sh3_machdep.c: revision 1.106
sys/arch/mips/mips/netbsd32_machdep.c: revision 1.16
sys/arch/mips/mips/sig_machdep.c: revision 1.24
sys/arch/riscv/riscv/sig_machdep.c: revision 1.2
sys/arch/usermode/target/x86_64/cpu_x86_64.c: revision 1.7
sys/arch/vax/vax/sig_machdep.c: revision 1.23

Fix widespread leak in the sendsig_siginfo() functions. sigframe_siginfo
has padding, so zero it out properly. While here I'm also zeroing out some
other things in several ports, for safety. Same problem in netbsd32, so
fix that too.

I can't compile-test on each architecture, but there should be no
breakage (tm).

Overall this fixes at least 14 info leaks. Prompted by the discovery by
KLEAK of a leak in amd64's sendsig_siginfo.
1.2.36.1 Wed Jan 30 13:29:52 UTC 2019 martin Pull up following revision(s) (requested by maxv in ticket #1677):

sys/arch/hppa/hppa/sig_machdep.c: revision 1.26
sys/arch/arm/arm/sig_machdep.c: revision 1.51
sys/arch/i386/i386/machdep.c: revision 1.813
sys/arch/alpha/alpha/machdep.c: revision 1.352
sys/arch/m68k/m68k/sig_machdep.c: revision 1.50
sys/arch/usermode/target/i386/cpu_i386.c: revision 1.8
sys/arch/sparc64/sparc64/machdep.c: revision 1.289
sys/arch/sparc64/sparc64/netbsd32_machdep.c: revision 1.111
sys/arch/powerpc/powerpc/sig_machdep.c: revision 1.46
sys/arch/amd64/amd64/netbsd32_machdep.c: revision 1.117
sys/arch/sh3/sh3/sh3_machdep.c: revision 1.106
sys/arch/mips/mips/netbsd32_machdep.c: revision 1.16
sys/arch/mips/mips/sig_machdep.c: revision 1.24
sys/arch/usermode/target/x86_64/cpu_x86_64.c: revision 1.7
sys/arch/vax/vax/sig_machdep.c: revision 1.23

Fix widespread leak in the sendsig_siginfo() functions. sigframe_siginfo
has padding, so zero it out properly. While here I'm also zeroing out some
other things in several ports, for safety. Same problem in netbsd32, so
fix that too.

I can't compile-test on each architecture, but there should be no
breakage (tm).

Overall this fixes at least 14 info leaks. Prompted by the discovery by
KLEAK of a leak in amd64's sendsig_siginfo.
1.2.28.1 Wed Jan 30 13:32:58 UTC 2019 martin Pull up following revision(s) (requested by maxv in ticket #1677):

sys/arch/hppa/hppa/sig_machdep.c: revision 1.26
sys/arch/arm/arm/sig_machdep.c: revision 1.51
sys/arch/i386/i386/machdep.c: revision 1.813
sys/arch/alpha/alpha/machdep.c: revision 1.352
sys/arch/m68k/m68k/sig_machdep.c: revision 1.50
sys/arch/usermode/target/i386/cpu_i386.c: revision 1.8
sys/arch/sparc64/sparc64/machdep.c: revision 1.289
sys/arch/sparc64/sparc64/netbsd32_machdep.c: revision 1.111
sys/arch/powerpc/powerpc/sig_machdep.c: revision 1.46
sys/arch/amd64/amd64/netbsd32_machdep.c: revision 1.117
sys/arch/sh3/sh3/sh3_machdep.c: revision 1.106
sys/arch/mips/mips/netbsd32_machdep.c: revision 1.16
sys/arch/mips/mips/sig_machdep.c: revision 1.24
sys/arch/usermode/target/x86_64/cpu_x86_64.c: revision 1.7
sys/arch/vax/vax/sig_machdep.c: revision 1.23

Fix widespread leak in the sendsig_siginfo() functions. sigframe_siginfo
has padding, so zero it out properly. While here I'm also zeroing out some
other things in several ports, for safety. Same problem in netbsd32, so
fix that too.

I can't compile-test on each architecture, but there should be no
breakage (tm).

Overall this fixes at least 14 info leaks. Prompted by the discovery by
KLEAK of a leak in amd64's sendsig_siginfo.
1.2.24.1 Wed Jan 30 13:27:28 UTC 2019 martin Pull up following revision(s) (requested by maxv in ticket #1677):

sys/arch/hppa/hppa/sig_machdep.c: revision 1.26
sys/arch/arm/arm/sig_machdep.c: revision 1.51
sys/arch/i386/i386/machdep.c: revision 1.813
sys/arch/alpha/alpha/machdep.c: revision 1.352
sys/arch/m68k/m68k/sig_machdep.c: revision 1.50
sys/arch/usermode/target/i386/cpu_i386.c: revision 1.8
sys/arch/sparc64/sparc64/machdep.c: revision 1.289
sys/arch/sparc64/sparc64/netbsd32_machdep.c: revision 1.111
sys/arch/powerpc/powerpc/sig_machdep.c: revision 1.46
sys/arch/amd64/amd64/netbsd32_machdep.c: revision 1.117
sys/arch/sh3/sh3/sh3_machdep.c: revision 1.106
sys/arch/mips/mips/netbsd32_machdep.c: revision 1.16
sys/arch/mips/mips/sig_machdep.c: revision 1.24
sys/arch/usermode/target/x86_64/cpu_x86_64.c: revision 1.7
sys/arch/vax/vax/sig_machdep.c: revision 1.23

Fix widespread leak in the sendsig_siginfo() functions. sigframe_siginfo
has padding, so zero it out properly. While here I'm also zeroing out some
other things in several ports, for safety. Same problem in netbsd32, so
fix that too.

I can't compile-test on each architecture, but there should be no
breakage (tm).

Overall this fixes at least 14 info leaks. Prompted by the discovery by
KLEAK of a leak in amd64's sendsig_siginfo.
  /src/sys/arch/sparc/dev/
zs.c 1.111 Fri Jun 13 13:10:18 UTC 2008 cegger branches: 1.111.2; 1.111.4; 1.111.6;
use device_lookup_private to get softc
Fri Jun 13 13:10:18 UTC 2008 cegger branches: 1.111.2; 1.111.4; 1.111.6;
use device_lookup_private to get softc
.2; 1.111.4; 1.111.6;
use device_lookup_private to get softc
.4; 1.111.6;
use device_lookup_private to get softc
1.111.6.4 Tue Mar 08 17:29:45 UTC 2011 riz Apply patches (requested by mrg in ticket #1564):
sys/arch/sparc/dev/zs.c: patch
sys/arch/sparc/include/cpu.h: patch
sys/arch/sparc/include/z8530var.h: patch
sys/arch/sparc/sparc/cpu.c: patch
sys/arch/sparc/sparc/cpuvar.h: patch
sys/arch/sparc/sparc/db_interface.c: patch
sys/arch/sparc/sparc/genassym.cf: patch
sys/arch/sparc/sparc/intr.c: patch
sys/arch/sparc/sparc/locore.s: patch
sys/arch/sparc/sparc/machdep.c: patch
sys/arch/sparc/sparc/timer.c: patch
sys/arch/sparc/sparc/timer_sun4m.c: patch
sys/arch/sparc/sparc/timervar.h: patch
sys/arch/sparc/sparc/trap.c: patch
sys/arch/sparc/sparc/vm_machdep.c: patch

- fix a panic in savefpstate. idea, and code suggestions from uwe
- convert xpmsg_lock to IPL_SCHED. the old spl/simple_lock code ran at
splsched(), and this significantly helps with stability under load when
running with multiple active CPUs
- in strayintr() don't print about stray zs inters in MP case
- fix a deadlock in xcall()
- consolidate the interrupt evcnt(9) into a full set of per-IPL per-CPU
soft/hard counters
- fix xcall() failure messages in some cases
- addd new ddb command "mach xcall"
- use schedintr() (not schedintr_4m()) on MP or single CPU configurations
- call hardclock() the same way on cpu0 in MP and !MP cases
- request the appropriate stack space for nmi_sun4m, in particular,
make sure we have space for %g2...%g5. now entering ddb via eg,
serial break no longer causes cpu1 to fault.
- give memfault_sun*() some entry points that both gdb and ddb will find.
from tsutsui:
- fix panic in interrupt handlers in zs
1.111.6.3 Sun Jan 16 00:54:42 UTC 2011 bouyer Pull up following revision(s) (requested by mrg in ticket #1526):
sys/arch/sparc/dev/zs.c: revision 1.115
sys/dev/ic/z8530sc.h: revision 1.26
sys/dev/ic/z8530sc.c: revision 1.30
sys/dev/ic/z8530tty.c: revision 1.127
sys/arch/sparc64/dev/zs.c: revision 1.68
add two new functions for z8530tty: zs_chan_lock() and zs_chan_unlock(),
and use them instead of various spl's in the zs.c's.
reviewed by ad and martin.
1.111.6.2 Tue Jun 09 17:50:34 UTC 2009 snj Pull up following revision(s) (requested by martin in ticket #800):
sys/arch/sparc/dev/zs.c: revision 1.116
Properly initialize child attach args to zero - we could end up with
various devices having different ideas about being console otherwise.
1.111.6.1 Tue Nov 18 02:34:06 UTC 2008 snj branches: 1.111.6.1.2;
Pull up following revision(s) (requested by martin in ticket #77):
sys/arch/sparc/dev/zs.c: revision 1.112
PR port-sparc/39942: ifdef ch0_is_cons declaration and all uses
consistently
.6.1 Tue Nov 18 02:34:06 UTC 2008 snj branches: 1.111.6.1.2;
Pull up following revision(s) (requested by martin in ticket #77):
sys/arch/sparc/dev/zs.c: revision 1.112
PR port-sparc/39942: ifdef ch0_is_cons declaration and all uses
consistently
1.111.6.1.2.1 Tue Jun 09 17:51:15 UTC 2009 snj branches: 1.111.6.1.2.1.2;
Pull up following revision(s) (requested by martin in ticket #800):
sys/arch/sparc/dev/zs.c: revision 1.116
Properly initialize child attach args to zero - we could end up with
various devices having different ideas about being console otherwise.
.6.1.2.1 Tue Jun 09 17:51:15 UTC 2009 snj branches: 1.111.6.1.2.1.2;
Pull up following revision(s) (requested by martin in ticket #800):
sys/arch/sparc/dev/zs.c: revision 1.116
Properly initialize child attach args to zero - we could end up with
various devices having different ideas about being console otherwise.
  /src/lib/libpthread/arch/aarch64/
pthread_md.h 1.1.36.1 Tue Aug 01 16:21:07 UTC 2023 martin Pull up following revision(s) (requested by riastradh in ticket #296):

lib/libpthread/arch/x86_64/pthread_md.h: revision 1.13
lib/libpthread/pthread_int.h: revision 1.110
lib/libpthread/pthread_int.h: revision 1.111
lib/libpthread/arch/i386/pthread_md.h: revision 1.21
lib/libpthread/arch/arm/pthread_md.h: revision 1.12
lib/libpthread/arch/arm/pthread_md.h: revision 1.13
lib/libpthread/pthread_spin.c: revision 1.11
lib/libpthread/arch/aarch64/pthread_md.h: revision 1.2

libpthread: Use __nothing, not /* nothing */, for empty macros.

No functional change intended -- just safer to do it this way in case
the macros are used in if branches or comma expressions.

PR port-arm/57437 (pthread__smt_pause/wake issue)

libpthread: New pthread__smt_wait to put CPU in low power for spin.

This is now distinct from pthread__smt_pause, which is for spin lock
backoff with no paired wakeup.

On Arm, there is a single-bit event register per CPU, and there are two
instructions to manage it:
- wfe, wait for event -- if event register is clear, enter low power
mode and wait until event register is set; then exit low power mode
and clear event register
- sev, signal event -- sets event register on all CPUs (other
circumstances like interrupts also set the event register and cause
wfe to wake)

These can be used to reduce the power consumption of spinning for a
lock, but only if they are actually paired -- if there's no sev, wfe
might hang indefinitely. Currently only pthread_spin(3) actually
pairs them; the other lock primitives (internal lock, mutex, rwlock)
do not -- they have spin lock backoff loops, but no corresponding
wakeup to cancel a wfe.

It may be worthwhile to teach the other lock primitives to pair
wfe/sev, but that requires some performance measurement to verify
it's actually worthwhile. So for now, we just make sure not to use
wfe when there's no sev, and keep everything else the same -- this
should fix severe performance degredation in libpthread on Arm
without hurting anything else.

No change in the generated code on amd64 and i386. No change in the
generated code for pthread_spin.c on arm and aarch64 -- changes only
the generated code for pthread_lock.c, pthread_mutex.c, and
pthread_rwlock.c, as intended.

PR port-arm/57437

1.1.28.1 Fri Aug 04 13:04:04 UTC 2023 martin Pull up following revision(s) (requested by riastradh in ticket #1700):

lib/libpthread/arch/x86_64/pthread_md.h: revision 1.13
lib/libpthread/pthread_int.h: revision 1.110
lib/libpthread/pthread_int.h: revision 1.111
lib/libpthread/arch/i386/pthread_md.h: revision 1.21
lib/libpthread/arch/arm/pthread_md.h: revision 1.12
lib/libpthread/arch/arm/pthread_md.h: revision 1.13
lib/libpthread/pthread_spin.c: revision 1.11
lib/libpthread/arch/aarch64/pthread_md.h: revision 1.2

libpthread: Use __nothing, not /* nothing */, for empty macros.

No functional change intended -- just safer to do it this way in case
the macros are used in if branches or comma expressions.
PR port-arm/57437 (pthread__smt_pause/wake issue)

libpthread: New pthread__smt_wait to put CPU in low power for spin.

This is now distinct from pthread__smt_pause, which is for spin lock
backoff with no paired wakeup.

On Arm, there is a single-bit event register per CPU, and there are two
instructions to manage it:
- wfe, wait for event -- if event register is clear, enter low power
mode and wait until event register is set; then exit low power mode
and clear event register
- sev, signal event -- sets event register on all CPUs (other
circumstances like interrupts also set the event register and cause
wfe to wake)

These can be used to reduce the power consumption of spinning for a
lock, but only if they are actually paired -- if there's no sev, wfe
might hang indefinitely. Currently only pthread_spin(3) actually
pairs them; the other lock primitives (internal lock, mutex, rwlock)
do not -- they have spin lock backoff loops, but no corresponding
wakeup to cancel a wfe.

It may be worthwhile to teach the other lock primitives to pair
wfe/sev, but that requires some performance measurement to verify
it's actually worthwhile. So for now, we just make sure not to use
wfe when there's no sev, and keep everything else the same -- this
should fix severe performance degredation in libpthread on Arm
without hurting anything else.

No change in the generated code on amd64 and i386. No change in the
generated code for pthread_spin.c on arm and aarch64 -- changes only
the generated code for pthread_lock.c, pthread_mutex.c, and
pthread_rwlock.c, as intended.
PR port-arm/57437

1.1.18.1 Fri Aug 04 13:06:59 UTC 2023 martin Pull up following revision(s) (requested by riastradh in ticket #1878):

lib/libpthread/arch/x86_64/pthread_md.h: revision 1.13
lib/libpthread/pthread_int.h: revision 1.110
lib/libpthread/pthread_int.h: revision 1.111
lib/libpthread/arch/i386/pthread_md.h: revision 1.21
lib/libpthread/arch/arm/pthread_md.h: revision 1.12
lib/libpthread/arch/arm/pthread_md.h: revision 1.13
lib/libpthread/pthread_spin.c: revision 1.11
lib/libpthread/arch/aarch64/pthread_md.h: revision 1.2

libpthread: Use __nothing, not /* nothing */, for empty macros.

No functional change intended -- just safer to do it this way in case
the macros are used in if branches or comma expressions.
PR port-arm/57437 (pthread__smt_pause/wake issue)

libpthread: New pthread__smt_wait to put CPU in low power for spin.

This is now distinct from pthread__smt_pause, which is for spin lock
backoff with no paired wakeup.

On Arm, there is a single-bit event register per CPU, and there are two
instructions to manage it:
- wfe, wait for event -- if event register is clear, enter low power
mode and wait until event register is set; then exit low power mode
and clear event register
- sev, signal event -- sets event register on all CPUs (other
circumstances like interrupts also set the event register and cause
wfe to wake)

These can be used to reduce the power consumption of spinning for a
lock, but only if they are actually paired -- if there's no sev, wfe
might hang indefinitely. Currently only pthread_spin(3) actually
pairs them; the other lock primitives (internal lock, mutex, rwlock)
do not -- they have spin lock backoff loops, but no corresponding
wakeup to cancel a wfe.

It may be worthwhile to teach the other lock primitives to pair
wfe/sev, but that requires some performance measurement to verify
it's actually worthwhile. So for now, we just make sure not to use
wfe when there's no sev, and keep everything else the same -- this
should fix severe performance degredation in libpthread on Arm
without hurting anything else.

No change in the generated code on amd64 and i386. No change in the
generated code for pthread_spin.c on arm and aarch64 -- changes only
the generated code for pthread_lock.c, pthread_mutex.c, and
pthread_rwlock.c, as intended.
PR port-arm/57437

  /src/lib/libc/sys/
Makefile.inc 1.111 Fri Jan 05 21:49:47 UTC 2001 jdolecek branches: 1.111.2;
add utrace(2)
Fri Jan 05 21:49:47 UTC 2001 jdolecek branches: 1.111.2;
add utrace(2)
1.111.2.19 Fri Jan 17 03:33:15 UTC 2003 thorpej Document _lwp_getprivate(2) and _lwp_setprivate(2).
1.111.2.18 Fri Jan 17 03:22:18 UTC 2003 thorpej Add _lwp_getprivate(2) and _lwp_setprivate(2).
1.111.2.17 Wed Jan 15 16:04:09 UTC 2003 wiz Correct MLINKS: _lwp_suspend should be linked to _lwp_continue, not _lwp_create.
1.111.2.16 Tue Jan 14 02:18:55 UTC 2003 thorpej Manual pages for the LWP-related system calls.

XXX Note our current implementation mis-matches these slightly (error
codes are stuff into errno, where they should simply be returned by
these calls). This will be addressed shortly.
1.111.2.15 Wed Jan 08 20:01:13 UTC 2003 thorpej Need an internal name for kill().
1.111.2.14 Mon Nov 11 22:22:58 UTC 2002 nathanw Catch up to -current
1.111.2.13 Fri Oct 18 02:16:43 UTC 2002 nathanw Catch up to -current.
1.111.2.12 Tue Sep 17 21:32:53 UTC 2002 nathanw Catch up to -current.
  /src/sys/arch/atari/stand/xxboot/ahdi-xxboot/milan/
Makefile 1.3.188.1 Tue Mar 13 13:41:13 UTC 2018 martin Pull up following revision(s) (requested by tsutsui in ticket #624):
sys/arch/atari/stand/xxboot/sdboot/milan/Makefile: revision 1.4
sys/arch/atari/dev/nvram.c: revision 1.21
sys/arch/atari/conf/MILAN.in: revision 1.28
sys/arch/atari/atari/pmap_bootstrap.c: revision 1.9
sys/dev/isa/fd.c: revision 1.111
sys/arch/atari/atari/bus.c: revision 1.60
sys/arch/atari/stand/xxboot/ahdi-xxboot/milan/Makefile: revision 1.4
sys/arch/atari/atari/locore.s: revision 1.111
sys/arch/atari/isa/isa_machdep.c: revision 1.41
distrib/sets/lists/base/md.atari: revision 1.55
sys/arch/atari/pci/pci_machdep.c: revision 1.55
sys/arch/atari/pci/pci_machdep.c: revision 1.56
sys/arch/atari/include/vmparam.h: revision 1.32
sys/arch/atari/isa/isa_milan.c: revision 1.15
sys/arch/atari/isa/isa_milan.c: revision 1.16
sys/arch/atari/atari/bus.c: revision 1.59
sys/arch/atari/atari/atari_init.c: revision 1.101
sys/arch/atari/pci/pci_milan.c: revision 1.15
Fix I/O access failures for regions allocated by bus_space_map(9) on Milan.

Passing to PMAP_WIRED against I/O spaces seems problematic,
probably after yamt-km branch merge, which was committed
between NetBSD 3.0 and NetBSD 4.0.
(i.e. ISA and PCI devices on Milan didn't work after 4.0 release)

XXX:
According to pmap(9) man page, the "flags" arg for pmap_enter(9)
doesn't take VM_PROT_READ and VM_PROT_WRITE, but pmap_enter()
implementation in sys/arch/m68k/m68k/pmap_motolora.c historically
checks them.

Fix silent hang during config_console() (before consinit()) on Milan.
config_console() was a dirty hack used by ancient m68k ports
to probe and initialize console devices before "real" configure(9),
using subset of configure(9) functions.

In that case, most device specific data (except I/O access method)
are not initialized so we must not access device specific device_t and
softc structures in config_console() cases.

Fix silent hang after isa_intr_establish() on Milan.
The problems (wrong macro replacements) were slipped in rev 1.107:
http://cvsweb.netbsd.org/bsdweb.cgi/src/sys/arch/atari/atari/locore.s#rev1.107
Handle yet another atari specific quirk in the MI ISA fdc(4)/fd(4) driver.
This makes fd(4) drive(s) (which is necessary for installation)
properly attached on Milan.
atari uses "fdcisa" and "fdisa" for ISA fdc to co-exist other fd(4)
drivers, on-board (atari/dev/fd.c) one and Hades (atari/dev/hdfd.c) one.

Use a proper PSL value to be passed to splx(9) functions.
This should have been changed on yamt-splraiseipl branch merge
back in 2006, which made MI IPL_xxx values independent from
m68k MD PSL values for the %sr register.

Restore piixide(4) for Milan and disable other pciide devices.
piixide was removed in rev 1.18 and the log message said
"because Intel IDE disk controllers only exist as part of
Intel chipsets for x86 systems" but the Milan actually has
the Intel 82371FB southbridge on its board.
Other pciide devices are unlikely necessary for the default
kernel for such a rare machine.
Also fix pasto in comment.

Skip NVRAM checksum check and re-initialization on Milan.
Milan's firmware seems to use different check method.

Ack EOI for IRQ_SLAVE of the master PIC after ack for IRQ of the slave PIC.
I'm not sure if there are possible races in the original code, but
this is what i8259_asm_ack2() in sys/arch/x86/include/i8259.h does
and it looks this change makes a Milan kernel a bit stable.
Replace CRTC register values with ones taken from sys/dev/ic/vga_subr.c.
This fixes noise around column 3 and 4 and makes screen output clearer
on Milan with S3 Trio64V.

Explicitly setup the secondary IDE interrupt of PIIX on Milan.
The secondary IDE interrupt is connected to MBIRQ0 on PIIX, but
the Milan's ROM bootloader (at least version 0.99.7) doesn't seem
to setup the MBIRQ0 register to route it to IRQ15.

On Milan, also explicitly disable MBIRQ1 on PIIX.
Milan's ROM bootloader v1.2 and v1.4 incorrectly set MBIRQ0 connected
to the secondary IDE to IRQ14 (not 15) and unused MBIRQ1 to IRQ15,
so both IDE channels don't work properly.

Add dumb memory probe routines for Milan to use all available memory.
Tested on Milan with 32Mx1, 32Mx4, 128MBx1, and 128MBx3.
(bootloader ROM fails to load TOS with 128MBx4)
No particular comment on port-atari@:
http://mail-index.netbsd.org/port-atari/2018/02/09/msg000580.html

Provide wdboot as a copy of sdboot for Milan.
It looks Milan's bootloader ROM emulates IDE disks as SCSI disks
so sdboot works for them, but atari's installboot checks a specified
device name and requires wdboot for wd(4) devices.

Fix another possible out of bounds.

Replace bus_dmamap_sync(9) op with a newer one taken from m68k/bus_dma.c.
This could fix memory corruption issue caused by PREREAD ops with regions
whose boundaries are not aligned at cacheline size.


sys/arch/atari/atari/bus.c: revision 1.60
sys/arch/atari/stand/xxboot/ahdi-xxboot/milan/Makefile: revision 1.4
sys/arch/atari/atari/locore.s: revision 1.111
sys/arch/atari/isa/isa_machdep.c: revision 1.41
distrib/sets/lists/base/md.atari: revision 1.55
sys/arch/atari/pci/pci_machdep.c: revision 1.55
sys/arch/atari/pci/pci_machdep.c: revision 1.56
sys/arch/atari/include/vmparam.h: revision 1.32
sys/arch/atari/isa/isa_milan.c: revision 1.15
sys/arch/atari/isa/isa_milan.c: revision 1.16
sys/arch/atari/atari/bus.c: revision 1.59
sys/arch/atari/atari/atari_init.c: revision 1.101
sys/arch/atari/pci/pci_milan.c: revision 1.15
Fix I/O access failures for regions allocated by bus_space_map(9) on Milan.

Passing to PMAP_WIRED against I/O spaces seems problematic,
probably after yamt-km branch merge, which was committed
between NetBSD 3.0 and NetBSD 4.0.
(i.e. ISA and PCI devices on Milan didn't work after 4.0 release)

XXX:
According to pmap(9) man page, the "flags" arg for pmap_enter(9)
doesn't take VM_PROT_READ and VM_PROT_WRITE, but pmap_enter()
implementation in sys/arch/m68k/m68k/pmap_motolora.c historically
checks them.

Fix silent hang during config_console() (before consinit()) on Milan.
config_console() was a dirty hack used by ancient m68k ports
to probe and initialize console devices before "real" configure(9),
using subset of configure(9) functions.

In that case, most device specific data (except I/O access method)
are not initialized so we must not access device specific device_t and
softc structures in config_console() cases.

Fix silent hang after isa_intr_establish() on Milan.
The problems (wrong macro replacements) were slipped in rev 1.107:
http://cvsweb.netbsd.org/bsdweb.cgi/src/sys/arch/atari/atari/locore.s#rev1.107
Handle yet another atari specific quirk in the MI ISA fdc(4)/fd(4) driver.
This makes fd(4) drive(s) (which is necessary for installation)
properly attached on Milan.
atari uses "fdcisa" and "fdisa" for ISA fdc to co-exist other fd(4)
drivers, on-board (atari/dev/fd.c) one and Hades (atari/dev/hdfd.c) one.

Use a proper PSL value to be passed to splx(9) functions.
This should have been changed on yamt-splraiseipl branch merge
back in 2006, which made MI IPL_xxx values independent from
m68k MD PSL values for the %sr register.

Restore piixide(4) for Milan and disable other pciide devices.
piixide was removed in rev 1.18 and the log message said
"because Intel IDE disk controllers only exist as part of
Intel chipsets for x86 systems" but the Milan actually has
the Intel 82371FB southbridge on its board.
Other pciide devices are unlikely necessary for the default
kernel for such a rare machine.
Also fix pasto in comment.

Skip NVRAM checksum check and re-initialization on Milan.
Milan's firmware seems to use different check method.

Ack EOI for IRQ_SLAVE of the master PIC after ack for IRQ of the slave PIC.
I'm not sure if there are possible races in the original code, but
this is what i8259_asm_ack2() in sys/arch/x86/include/i8259.h does
and it looks this change makes a Milan kernel a bit stable.
Replace CRTC register values with ones taken from sys/dev/ic/vga_subr.c.
This fixes noise around column 3 and 4 and makes screen output clearer
on Milan with S3 Trio64V.

Explicitly setup the secondary IDE interrupt of PIIX on Milan.
The secondary IDE interrupt is connected to MBIRQ0 on PIIX, but
the Milan's ROM bootloader (at least version 0.99.7) doesn't seem
to setup the MBIRQ0 register to route it to IRQ15.

On Milan, also explicitly disable MBIRQ1 on PIIX.
Milan's ROM bootloader v1.2 and v1.4 incorrectly set MBIRQ0 connected
to the secondary IDE to IRQ14 (not 15) and unused MBIRQ1 to IRQ15,
so both IDE channels don't work properly.

Add dumb memory probe routines for Milan to use all available memory.
Tested on Milan with 32Mx1, 32Mx4, 128MBx1, and 128MBx3.
(bootloader ROM fails to load TOS with 128MBx4)
No particular comment on port-atari@:
http://mail-index.netbsd.org/port-atari/2018/02/09/msg000580.html

Provide wdboot as a copy of sdboot for Milan.
It looks Milan's bootloader ROM emulates IDE disks as SCSI disks
so sdboot works for them, but atari's installboot checks a specified
device name and requires wdboot for wd(4) devices.

Fix another possible out of bounds.

Replace bus_dmamap_sync(9) op with a newer one taken from m68k/bus_dma.c.
This could fix memory corruption issue caused by PREREAD ops with regions
whose boundaries are not aligned at cacheline size.

  /src/sys/arch/atari/stand/xxboot/sdboot/milan/
Makefile 1.3.188.1 Tue Mar 13 13:41:13 UTC 2018 martin Pull up following revision(s) (requested by tsutsui in ticket #624):
sys/arch/atari/stand/xxboot/sdboot/milan/Makefile: revision 1.4
sys/arch/atari/dev/nvram.c: revision 1.21
sys/arch/atari/conf/MILAN.in: revision 1.28
sys/arch/atari/atari/pmap_bootstrap.c: revision 1.9
sys/dev/isa/fd.c: revision 1.111
sys/arch/atari/atari/bus.c: revision 1.60
sys/arch/atari/stand/xxboot/ahdi-xxboot/milan/Makefile: revision 1.4
sys/arch/atari/atari/locore.s: revision 1.111
sys/arch/atari/isa/isa_machdep.c: revision 1.41
distrib/sets/lists/base/md.atari: revision 1.55
sys/arch/atari/pci/pci_machdep.c: revision 1.55
sys/arch/atari/pci/pci_machdep.c: revision 1.56
sys/arch/atari/include/vmparam.h: revision 1.32
sys/arch/atari/isa/isa_milan.c: revision 1.15
sys/arch/atari/isa/isa_milan.c: revision 1.16
sys/arch/atari/atari/bus.c: revision 1.59
sys/arch/atari/atari/atari_init.c: revision 1.101
sys/arch/atari/pci/pci_milan.c: revision 1.15
Fix I/O access failures for regions allocated by bus_space_map(9) on Milan.

Passing to PMAP_WIRED against I/O spaces seems problematic,
probably after yamt-km branch merge, which was committed
between NetBSD 3.0 and NetBSD 4.0.
(i.e. ISA and PCI devices on Milan didn't work after 4.0 release)

XXX:
According to pmap(9) man page, the "flags" arg for pmap_enter(9)
doesn't take VM_PROT_READ and VM_PROT_WRITE, but pmap_enter()
implementation in sys/arch/m68k/m68k/pmap_motolora.c historically
checks them.

Fix silent hang during config_console() (before consinit()) on Milan.
config_console() was a dirty hack used by ancient m68k ports
to probe and initialize console devices before "real" configure(9),
using subset of configure(9) functions.

In that case, most device specific data (except I/O access method)
are not initialized so we must not access device specific device_t and
softc structures in config_console() cases.

Fix silent hang after isa_intr_establish() on Milan.
The problems (wrong macro replacements) were slipped in rev 1.107:
http://cvsweb.netbsd.org/bsdweb.cgi/src/sys/arch/atari/atari/locore.s#rev1.107
Handle yet another atari specific quirk in the MI ISA fdc(4)/fd(4) driver.
This makes fd(4) drive(s) (which is necessary for installation)
properly attached on Milan.
atari uses "fdcisa" and "fdisa" for ISA fdc to co-exist other fd(4)
drivers, on-board (atari/dev/fd.c) one and Hades (atari/dev/hdfd.c) one.

Use a proper PSL value to be passed to splx(9) functions.
This should have been changed on yamt-splraiseipl branch merge
back in 2006, which made MI IPL_xxx values independent from
m68k MD PSL values for the %sr register.

Restore piixide(4) for Milan and disable other pciide devices.
piixide was removed in rev 1.18 and the log message said
"because Intel IDE disk controllers only exist as part of
Intel chipsets for x86 systems" but the Milan actually has
the Intel 82371FB southbridge on its board.
Other pciide devices are unlikely necessary for the default
kernel for such a rare machine.
Also fix pasto in comment.

Skip NVRAM checksum check and re-initialization on Milan.
Milan's firmware seems to use different check method.

Ack EOI for IRQ_SLAVE of the master PIC after ack for IRQ of the slave PIC.
I'm not sure if there are possible races in the original code, but
this is what i8259_asm_ack2() in sys/arch/x86/include/i8259.h does
and it looks this change makes a Milan kernel a bit stable.
Replace CRTC register values with ones taken from sys/dev/ic/vga_subr.c.
This fixes noise around column 3 and 4 and makes screen output clearer
on Milan with S3 Trio64V.

Explicitly setup the secondary IDE interrupt of PIIX on Milan.
The secondary IDE interrupt is connected to MBIRQ0 on PIIX, but
the Milan's ROM bootloader (at least version 0.99.7) doesn't seem
to setup the MBIRQ0 register to route it to IRQ15.

On Milan, also explicitly disable MBIRQ1 on PIIX.
Milan's ROM bootloader v1.2 and v1.4 incorrectly set MBIRQ0 connected
to the secondary IDE to IRQ14 (not 15) and unused MBIRQ1 to IRQ15,
so both IDE channels don't work properly.

Add dumb memory probe routines for Milan to use all available memory.
Tested on Milan with 32Mx1, 32Mx4, 128MBx1, and 128MBx3.
(bootloader ROM fails to load TOS with 128MBx4)
No particular comment on port-atari@:
http://mail-index.netbsd.org/port-atari/2018/02/09/msg000580.html

Provide wdboot as a copy of sdboot for Milan.
It looks Milan's bootloader ROM emulates IDE disks as SCSI disks
so sdboot works for them, but atari's installboot checks a specified
device name and requires wdboot for wd(4) devices.

Fix another possible out of bounds.

Replace bus_dmamap_sync(9) op with a newer one taken from m68k/bus_dma.c.
This could fix memory corruption issue caused by PREREAD ops with regions
whose boundaries are not aligned at cacheline size.


sys/arch/atari/atari/bus.c: revision 1.60
sys/arch/atari/stand/xxboot/ahdi-xxboot/milan/Makefile: revision 1.4
sys/arch/atari/atari/locore.s: revision 1.111
sys/arch/atari/isa/isa_machdep.c: revision 1.41
distrib/sets/lists/base/md.atari: revision 1.55
sys/arch/atari/pci/pci_machdep.c: revision 1.55
sys/arch/atari/pci/pci_machdep.c: revision 1.56
sys/arch/atari/include/vmparam.h: revision 1.32
sys/arch/atari/isa/isa_milan.c: revision 1.15
sys/arch/atari/isa/isa_milan.c: revision 1.16
sys/arch/atari/atari/bus.c: revision 1.59
sys/arch/atari/atari/atari_init.c: revision 1.101
sys/arch/atari/pci/pci_milan.c: revision 1.15
Fix I/O access failures for regions allocated by bus_space_map(9) on Milan.

Passing to PMAP_WIRED against I/O spaces seems problematic,
probably after yamt-km branch merge, which was committed
between NetBSD 3.0 and NetBSD 4.0.
(i.e. ISA and PCI devices on Milan didn't work after 4.0 release)

XXX:
According to pmap(9) man page, the "flags" arg for pmap_enter(9)
doesn't take VM_PROT_READ and VM_PROT_WRITE, but pmap_enter()
implementation in sys/arch/m68k/m68k/pmap_motolora.c historically
checks them.

Fix silent hang during config_console() (before consinit()) on Milan.
config_console() was a dirty hack used by ancient m68k ports
to probe and initialize console devices before "real" configure(9),
using subset of configure(9) functions.

In that case, most device specific data (except I/O access method)
are not initialized so we must not access device specific device_t and
softc structures in config_console() cases.

Fix silent hang after isa_intr_establish() on Milan.
The problems (wrong macro replacements) were slipped in rev 1.107:
http://cvsweb.netbsd.org/bsdweb.cgi/src/sys/arch/atari/atari/locore.s#rev1.107
Handle yet another atari specific quirk in the MI ISA fdc(4)/fd(4) driver.
This makes fd(4) drive(s) (which is necessary for installation)
properly attached on Milan.
atari uses "fdcisa" and "fdisa" for ISA fdc to co-exist other fd(4)
drivers, on-board (atari/dev/fd.c) one and Hades (atari/dev/hdfd.c) one.

Use a proper PSL value to be passed to splx(9) functions.
This should have been changed on yamt-splraiseipl branch merge
back in 2006, which made MI IPL_xxx values independent from
m68k MD PSL values for the %sr register.

Restore piixide(4) for Milan and disable other pciide devices.
piixide was removed in rev 1.18 and the log message said
"because Intel IDE disk controllers only exist as part of
Intel chipsets for x86 systems" but the Milan actually has
the Intel 82371FB southbridge on its board.
Other pciide devices are unlikely necessary for the default
kernel for such a rare machine.
Also fix pasto in comment.

Skip NVRAM checksum check and re-initialization on Milan.
Milan's firmware seems to use different check method.

Ack EOI for IRQ_SLAVE of the master PIC after ack for IRQ of the slave PIC.
I'm not sure if there are possible races in the original code, but
this is what i8259_asm_ack2() in sys/arch/x86/include/i8259.h does
and it looks this change makes a Milan kernel a bit stable.
Replace CRTC register values with ones taken from sys/dev/ic/vga_subr.c.
This fixes noise around column 3 and 4 and makes screen output clearer
on Milan with S3 Trio64V.

Explicitly setup the secondary IDE interrupt of PIIX on Milan.
The secondary IDE interrupt is connected to MBIRQ0 on PIIX, but
the Milan's ROM bootloader (at least version 0.99.7) doesn't seem
to setup the MBIRQ0 register to route it to IRQ15.

On Milan, also explicitly disable MBIRQ1 on PIIX.
Milan's ROM bootloader v1.2 and v1.4 incorrectly set MBIRQ0 connected
to the secondary IDE to IRQ14 (not 15) and unused MBIRQ1 to IRQ15,
so both IDE channels don't work properly.

Add dumb memory probe routines for Milan to use all available memory.
Tested on Milan with 32Mx1, 32Mx4, 128MBx1, and 128MBx3.
(bootloader ROM fails to load TOS with 128MBx4)
No particular comment on port-atari@:
http://mail-index.netbsd.org/port-atari/2018/02/09/msg000580.html

Provide wdboot as a copy of sdboot for Milan.
It looks Milan's bootloader ROM emulates IDE disks as SCSI disks
so sdboot works for them, but atari's installboot checks a specified
device name and requires wdboot for wd(4) devices.

Fix another possible out of bounds.

Replace bus_dmamap_sync(9) op with a newer one taken from m68k/bus_dma.c.
This could fix memory corruption issue caused by PREREAD ops with regions
whose boundaries are not aligned at cacheline size.

  /src/sys/arch/x86/x86/
identcpu_subr.c 1.7.4.2 Wed Aug 05 15:48:53 UTC 2020 martin Pull up the following revisions, requested by msaitoh in ticket #1585:

usr.sbin/cpuctl/Makefile 1.9
usr.sbin/cpuctl/arch/cpuctl_i386.h 1.5
usr.sbin/cpuctl/arch/i386.c 1.111-1.113 via patch
usr.sbin/cpuctl/cpuctl.c 1.31
usr.sbin/cpuctl/cpuctl.h 1.7
sys/arch/x86/x86/identcpu_subr.c 1.1-1.7

- Get TSC frequency from CPUID 0x15 and/or x16 for newer Intel
processors.
- Add 0xa5 and 0xa6 for Comet Lake.
- Rename ci_cpuid_level to ci_max_cpuid and ci_cpuid_extlevel to
ci_max_ext_cpuid to match x86/include/cpu.h. No functional change.
- Sort some entries.
- Add comment.

1.7.2.2 Fri Jul 10 11:20:29 UTC 2020 martin Pull up the following revisions (all via patch) requested by msaitoh in
ticket #995:

usr.sbin/cpuctl/Makefile 1.9
usr.sbin/cpuctl/arch/cpuctl_i386.h 1.5
usr.sbin/cpuctl/arch/i386.c 1.111-1.113
usr.sbin/cpuctl/cpuctl.c 1.31
usr.sbin/cpuctl/cpuctl.h 1.7
sys/arch/x86/x86/identcpu_subr.c 1.1-1.7

- Get TSC frequency from CPUID 0x15 and/or x16 for newer Intel
processors.
- Add 0xa5 and 0xa6 for Comet Lake.
- Rename ci_cpuid_level to ci_max_cpuid and ci_cpuid_extlevel to
ci_max_ext_cpuid to match x86/include/cpu.h. No functional change.
- Sort some entries.
- Add comment.

  /src/usr.bin/netstat/
mroute6.c 1.15.18.1 Mon Sep 12 14:23:41 UTC 2022 martin Pull up the following, requested by msaitoh in ticket #1522:

usr.bin/netstat/atalk.c 1.18,1.20-1.21
usr.bin/netstat/bpf.c 1.16 via patch
usr.bin/netstat/fast_ipsec.c 1.24
usr.bin/netstat/if.c 1.97-1.99,1.101-1.104 via patch
usr.bin/netstat/inet.c 1.111,1.115-1.116 via patch
usr.bin/netstat/inet6.c 1.74-1.75,1.80-1.81 via patch
usr.bin/netstat/main.c 1.100-1.103
usr.bin/netstat/mbuf.c 1.35
usr.bin/netstat/mroute.c 1.26-1.27
usr.bin/netstat/mroute6.c 1.16
usr.bin/netstat/netstat.h 1.52-1.53
usr.bin/netstat/pfkey.c 1.4-1.5 via patch
usr.bin/netstat/pfsync.c 1.4-1.5 via patch
usr.bin/netstat/route.c 1.86-1.88
usr.bin/netstat/unix.c 1.36-1.37
usr.bin/netstat/vtw.c 1.11,1.13

- sprintf() -> snprintf(), and adjust a buffer size to avoid any
potential for overflow.
- Fix netstat -rs to print it correctly.
- Add missing {IP,IP6}_STAT_NOIPSEC to netstat.
- Don't show any of the completely and utterly undocumented VTW info
if the feature isn't enabled.
- Print oqdrops correctly.
- Remove Network ATM soft intr queue reporting, we don't have that
in the kernel anymore.
- netstat.1: Add various xrefs present in the body to "See Also".
- KNF. Style fixes.

1.15.8.1 Mon Sep 12 14:29:19 UTC 2022 martin Pull up the following, requested by msaitoh in ticket #1762:

usr.bin/netstat/atalk.c 1.18,1.20-1.21
usr.bin/netstat/bpf.c 1.16 via patch
usr.bin/netstat/fast_ipsec.c 1.24 via patch
usr.bin/netstat/if.c 1.97-1.99,1.101-1.104 via patch
usr.bin/netstat/inet.c 1.111,1.115-1.116 via patch
usr.bin/netstat/inet6.c 1.70,1.74-1.75,1.80-1.81 via patch
usr.bin/netstat/main.c 1.100,1.102-1.103
usr.bin/netstat/mbuf.c 1.34-1.35
usr.bin/netstat/mroute.c 1.26-1.27
usr.bin/netstat/mroute6.c 1.16
usr.bin/netstat/netstat.h 1.52-1.53
usr.bin/netstat/pfkey.c 1.4-1.5 via patch
usr.bin/netstat/pfsync.c 1.4-1.5 via patch
usr.bin/netstat/route.c 1.87-1.88
usr.bin/netstat/unix.c 1.36-1.37
usr.bin/netstat/vtw.c 1.11,1.13

- Add names of a few more ICMPv6 messages.
Also make the array be explicitly 256 entries long.
- sprintf() -> snprintf(), and adjust a buffer size to avoid any
potential for overflow.
- Add missing {IP,IP6}_STAT_NOIPSEC to netstat.
- Don't show any of the completely and utterly undocumented VTW info
if the feature isn't enabled.
- Print oqdrops correctly.
- netstat.1: Add various xrefs present in the body to "See Also".
- Limit maximum owner name to appease gcc.
- KNF. Style fixes.

pfkey.c 1.1.44.2 Mon Sep 12 14:23:41 UTC 2022 martin Pull up the following, requested by msaitoh in ticket #1522:

usr.bin/netstat/atalk.c 1.18,1.20-1.21
usr.bin/netstat/bpf.c 1.16 via patch
usr.bin/netstat/fast_ipsec.c 1.24
usr.bin/netstat/if.c 1.97-1.99,1.101-1.104 via patch
usr.bin/netstat/inet.c 1.111,1.115-1.116 via patch
usr.bin/netstat/inet6.c 1.74-1.75,1.80-1.81 via patch
usr.bin/netstat/main.c 1.100-1.103
usr.bin/netstat/mbuf.c 1.35
usr.bin/netstat/mroute.c 1.26-1.27
usr.bin/netstat/mroute6.c 1.16
usr.bin/netstat/netstat.h 1.52-1.53
usr.bin/netstat/pfkey.c 1.4-1.5 via patch
usr.bin/netstat/pfsync.c 1.4-1.5 via patch
usr.bin/netstat/route.c 1.86-1.88
usr.bin/netstat/unix.c 1.36-1.37
usr.bin/netstat/vtw.c 1.11,1.13

- sprintf() -> snprintf(), and adjust a buffer size to avoid any
potential for overflow.
- Fix netstat -rs to print it correctly.
- Add missing {IP,IP6}_STAT_NOIPSEC to netstat.
- Don't show any of the completely and utterly undocumented VTW info
if the feature isn't enabled.
- Print oqdrops correctly.
- Remove Network ATM soft intr queue reporting, we don't have that
in the kernel anymore.
- netstat.1: Add various xrefs present in the body to "See Also".
- KNF. Style fixes.

1.1.34.1 Mon Sep 12 14:29:19 UTC 2022 martin Pull up the following, requested by msaitoh in ticket #1762:

usr.bin/netstat/atalk.c 1.18,1.20-1.21
usr.bin/netstat/bpf.c 1.16 via patch
usr.bin/netstat/fast_ipsec.c 1.24 via patch
usr.bin/netstat/if.c 1.97-1.99,1.101-1.104 via patch
usr.bin/netstat/inet.c 1.111,1.115-1.116 via patch
usr.bin/netstat/inet6.c 1.70,1.74-1.75,1.80-1.81 via patch
usr.bin/netstat/main.c 1.100,1.102-1.103
usr.bin/netstat/mbuf.c 1.34-1.35
usr.bin/netstat/mroute.c 1.26-1.27
usr.bin/netstat/mroute6.c 1.16
usr.bin/netstat/netstat.h 1.52-1.53
usr.bin/netstat/pfkey.c 1.4-1.5 via patch
usr.bin/netstat/pfsync.c 1.4-1.5 via patch
usr.bin/netstat/route.c 1.87-1.88
usr.bin/netstat/unix.c 1.36-1.37
usr.bin/netstat/vtw.c 1.11,1.13

- Add names of a few more ICMPv6 messages.
Also make the array be explicitly 256 entries long.
- sprintf() -> snprintf(), and adjust a buffer size to avoid any
potential for overflow.
- Add missing {IP,IP6}_STAT_NOIPSEC to netstat.
- Don't show any of the completely and utterly undocumented VTW info
if the feature isn't enabled.
- Print oqdrops correctly.
- netstat.1: Add various xrefs present in the body to "See Also".
- Limit maximum owner name to appease gcc.
- KNF. Style fixes.

pfsync.c 1.1.48.2 Mon Sep 12 14:23:41 UTC 2022 martin Pull up the following, requested by msaitoh in ticket #1522:

usr.bin/netstat/atalk.c 1.18,1.20-1.21
usr.bin/netstat/bpf.c 1.16 via patch
usr.bin/netstat/fast_ipsec.c 1.24
usr.bin/netstat/if.c 1.97-1.99,1.101-1.104 via patch
usr.bin/netstat/inet.c 1.111,1.115-1.116 via patch
usr.bin/netstat/inet6.c 1.74-1.75,1.80-1.81 via patch
usr.bin/netstat/main.c 1.100-1.103
usr.bin/netstat/mbuf.c 1.35
usr.bin/netstat/mroute.c 1.26-1.27
usr.bin/netstat/mroute6.c 1.16
usr.bin/netstat/netstat.h 1.52-1.53
usr.bin/netstat/pfkey.c 1.4-1.5 via patch
usr.bin/netstat/pfsync.c 1.4-1.5 via patch
usr.bin/netstat/route.c 1.86-1.88
usr.bin/netstat/unix.c 1.36-1.37
usr.bin/netstat/vtw.c 1.11,1.13

- sprintf() -> snprintf(), and adjust a buffer size to avoid any
potential for overflow.
- Fix netstat -rs to print it correctly.
- Add missing {IP,IP6}_STAT_NOIPSEC to netstat.
- Don't show any of the completely and utterly undocumented VTW info
if the feature isn't enabled.
- Print oqdrops correctly.
- Remove Network ATM soft intr queue reporting, we don't have that
in the kernel anymore.
- netstat.1: Add various xrefs present in the body to "See Also".
- KNF. Style fixes.

1.1.38.1 Mon Sep 12 14:29:19 UTC 2022 martin Pull up the following, requested by msaitoh in ticket #1762:

usr.bin/netstat/atalk.c 1.18,1.20-1.21
usr.bin/netstat/bpf.c 1.16 via patch
usr.bin/netstat/fast_ipsec.c 1.24 via patch
usr.bin/netstat/if.c 1.97-1.99,1.101-1.104 via patch
usr.bin/netstat/inet.c 1.111,1.115-1.116 via patch
usr.bin/netstat/inet6.c 1.70,1.74-1.75,1.80-1.81 via patch
usr.bin/netstat/main.c 1.100,1.102-1.103
usr.bin/netstat/mbuf.c 1.34-1.35
usr.bin/netstat/mroute.c 1.26-1.27
usr.bin/netstat/mroute6.c 1.16
usr.bin/netstat/netstat.h 1.52-1.53
usr.bin/netstat/pfkey.c 1.4-1.5 via patch
usr.bin/netstat/pfsync.c 1.4-1.5 via patch
usr.bin/netstat/route.c 1.87-1.88
usr.bin/netstat/unix.c 1.36-1.37
usr.bin/netstat/vtw.c 1.11,1.13

- Add names of a few more ICMPv6 messages.
Also make the array be explicitly 256 entries long.
- sprintf() -> snprintf(), and adjust a buffer size to avoid any
potential for overflow.
- Add missing {IP,IP6}_STAT_NOIPSEC to netstat.
- Don't show any of the completely and utterly undocumented VTW info
if the feature isn't enabled.
- Print oqdrops correctly.
- netstat.1: Add various xrefs present in the body to "See Also".
- Limit maximum owner name to appease gcc.
- KNF. Style fixes.

  /src/usr.sbin/cpuctl/
Makefile 1.8.18.1 Fri Jul 10 11:20:29 UTC 2020 martin Pull up the following revisions (all via patch) requested by msaitoh in
ticket #995:

usr.sbin/cpuctl/Makefile 1.9
usr.sbin/cpuctl/arch/cpuctl_i386.h 1.5
usr.sbin/cpuctl/arch/i386.c 1.111-1.113
usr.sbin/cpuctl/cpuctl.c 1.31
usr.sbin/cpuctl/cpuctl.h 1.7
sys/arch/x86/x86/identcpu_subr.c 1.1-1.7

- Get TSC frequency from CPUID 0x15 and/or x16 for newer Intel
processors.
- Add 0xa5 and 0xa6 for Comet Lake.
- Rename ci_cpuid_level to ci_max_cpuid and ci_cpuid_extlevel to
ci_max_ext_cpuid to match x86/include/cpu.h. No functional change.
- Sort some entries.
- Add comment.

1.8.8.1 Wed Aug 05 15:48:53 UTC 2020 martin Pull up the following revisions, requested by msaitoh in ticket #1585:

usr.sbin/cpuctl/Makefile 1.9
usr.sbin/cpuctl/arch/cpuctl_i386.h 1.5
usr.sbin/cpuctl/arch/i386.c 1.111-1.113 via patch
usr.sbin/cpuctl/cpuctl.c 1.31
usr.sbin/cpuctl/cpuctl.h 1.7
sys/arch/x86/x86/identcpu_subr.c 1.1-1.7

- Get TSC frequency from CPUID 0x15 and/or x16 for newer Intel
processors.
- Add 0xa5 and 0xa6 for Comet Lake.
- Rename ci_cpuid_level to ci_max_cpuid and ci_cpuid_extlevel to
ci_max_ext_cpuid to match x86/include/cpu.h. No functional change.
- Sort some entries.
- Add comment.

  /src/sys/arch/vax/conf/
files.vax 1.111 Tue Mar 11 05:34:02 UTC 2008 matt branches: 1.111.4; 1.111.6; 1.111.10;
Rototill the vax code. Switch to devicet/PRIV_ALLOC. Cleanup vax autoconf
code. Move to prototype definitions. staticfy, constify, avoid casting.
Use device_* accessors.
Tue Mar 11 05:34:02 UTC 2008 matt branches: 1.111.4; 1.111.6; 1.111.10;
Rototill the vax code. Switch to devicet/PRIV_ALLOC. Cleanup vax autoconf
code. Move to prototype definitions. staticfy, constify, avoid casting.
Use device_* accessors.
.4; 1.111.6; 1.111.10;
Rototill the vax code. Switch to devicet/PRIV_ALLOC. Cleanup vax autoconf
code. Move to prototype definitions. staticfy, constify, avoid casting.
Use device_* accessors.
.6; 1.111.10;
Rototill the vax code. Switch to devicet/PRIV_ALLOC. Cleanup vax autoconf
code. Move to prototype definitions. staticfy, constify, avoid casting.
Use device_* accessors.
1.111.10.2 Sat Dec 13 01:13:33 UTC 2008 haad Update haad-dm branch to haad-dm-base2.
1.111.10.1 Sun Oct 19 22:16:06 UTC 2008 haad Sync with HEAD.
1.111.6.1 Thu Sep 18 04:33:36 UTC 2008 wrstuden Sync with wrstuden-revivesa-base-2.
1.111.4.2 Wed Aug 11 22:52:51 UTC 2010 yamt sync with head.
1.111.4.1 Mon May 04 08:12:03 UTC 2009 yamt sync with head.
  /src/lib/libpthread/arch/arm/
pthread_md.h 1.9.18.1 Fri Aug 04 13:06:59 UTC 2023 martin Pull up following revision(s) (requested by riastradh in ticket #1878):

lib/libpthread/arch/x86_64/pthread_md.h: revision 1.13
lib/libpthread/pthread_int.h: revision 1.110
lib/libpthread/pthread_int.h: revision 1.111
lib/libpthread/arch/i386/pthread_md.h: revision 1.21
lib/libpthread/arch/arm/pthread_md.h: revision 1.12
lib/libpthread/arch/arm/pthread_md.h: revision 1.13
lib/libpthread/pthread_spin.c: revision 1.11
lib/libpthread/arch/aarch64/pthread_md.h: revision 1.2

libpthread: Use __nothing, not /* nothing */, for empty macros.

No functional change intended -- just safer to do it this way in case
the macros are used in if branches or comma expressions.
PR port-arm/57437 (pthread__smt_pause/wake issue)

libpthread: New pthread__smt_wait to put CPU in low power for spin.

This is now distinct from pthread__smt_pause, which is for spin lock
backoff with no paired wakeup.

On Arm, there is a single-bit event register per CPU, and there are two
instructions to manage it:
- wfe, wait for event -- if event register is clear, enter low power
mode and wait until event register is set; then exit low power mode
and clear event register
- sev, signal event -- sets event register on all CPUs (other
circumstances like interrupts also set the event register and cause
wfe to wake)

These can be used to reduce the power consumption of spinning for a
lock, but only if they are actually paired -- if there's no sev, wfe
might hang indefinitely. Currently only pthread_spin(3) actually
pairs them; the other lock primitives (internal lock, mutex, rwlock)
do not -- they have spin lock backoff loops, but no corresponding
wakeup to cancel a wfe.

It may be worthwhile to teach the other lock primitives to pair
wfe/sev, but that requires some performance measurement to verify
it's actually worthwhile. So for now, we just make sure not to use
wfe when there's no sev, and keep everything else the same -- this
should fix severe performance degredation in libpthread on Arm
without hurting anything else.

No change in the generated code on amd64 and i386. No change in the
generated code for pthread_spin.c on arm and aarch64 -- changes only
the generated code for pthread_lock.c, pthread_mutex.c, and
pthread_rwlock.c, as intended.
PR port-arm/57437

1.11.10.1 Tue Aug 01 16:21:07 UTC 2023 martin Pull up following revision(s) (requested by riastradh in ticket #296):

lib/libpthread/arch/x86_64/pthread_md.h: revision 1.13
lib/libpthread/pthread_int.h: revision 1.110
lib/libpthread/pthread_int.h: revision 1.111
lib/libpthread/arch/i386/pthread_md.h: revision 1.21
lib/libpthread/arch/arm/pthread_md.h: revision 1.12
lib/libpthread/arch/arm/pthread_md.h: revision 1.13
lib/libpthread/pthread_spin.c: revision 1.11
lib/libpthread/arch/aarch64/pthread_md.h: revision 1.2

libpthread: Use __nothing, not /* nothing */, for empty macros.

No functional change intended -- just safer to do it this way in case
the macros are used in if branches or comma expressions.

PR port-arm/57437 (pthread__smt_pause/wake issue)

libpthread: New pthread__smt_wait to put CPU in low power for spin.

This is now distinct from pthread__smt_pause, which is for spin lock
backoff with no paired wakeup.

On Arm, there is a single-bit event register per CPU, and there are two
instructions to manage it:
- wfe, wait for event -- if event register is clear, enter low power
mode and wait until event register is set; then exit low power mode
and clear event register
- sev, signal event -- sets event register on all CPUs (other
circumstances like interrupts also set the event register and cause
wfe to wake)

These can be used to reduce the power consumption of spinning for a
lock, but only if they are actually paired -- if there's no sev, wfe
might hang indefinitely. Currently only pthread_spin(3) actually
pairs them; the other lock primitives (internal lock, mutex, rwlock)
do not -- they have spin lock backoff loops, but no corresponding
wakeup to cancel a wfe.

It may be worthwhile to teach the other lock primitives to pair
wfe/sev, but that requires some performance measurement to verify
it's actually worthwhile. So for now, we just make sure not to use
wfe when there's no sev, and keep everything else the same -- this
should fix severe performance degredation in libpthread on Arm
without hurting anything else.

No change in the generated code on amd64 and i386. No change in the
generated code for pthread_spin.c on arm and aarch64 -- changes only
the generated code for pthread_lock.c, pthread_mutex.c, and
pthread_rwlock.c, as intended.

PR port-arm/57437

1.11.2.1 Fri Aug 04 13:04:04 UTC 2023 martin Pull up following revision(s) (requested by riastradh in ticket #1700):

lib/libpthread/arch/x86_64/pthread_md.h: revision 1.13
lib/libpthread/pthread_int.h: revision 1.110
lib/libpthread/pthread_int.h: revision 1.111
lib/libpthread/arch/i386/pthread_md.h: revision 1.21
lib/libpthread/arch/arm/pthread_md.h: revision 1.12
lib/libpthread/arch/arm/pthread_md.h: revision 1.13
lib/libpthread/pthread_spin.c: revision 1.11
lib/libpthread/arch/aarch64/pthread_md.h: revision 1.2

libpthread: Use __nothing, not /* nothing */, for empty macros.

No functional change intended -- just safer to do it this way in case
the macros are used in if branches or comma expressions.
PR port-arm/57437 (pthread__smt_pause/wake issue)

libpthread: New pthread__smt_wait to put CPU in low power for spin.

This is now distinct from pthread__smt_pause, which is for spin lock
backoff with no paired wakeup.

On Arm, there is a single-bit event register per CPU, and there are two
instructions to manage it:
- wfe, wait for event -- if event register is clear, enter low power
mode and wait until event register is set; then exit low power mode
and clear event register
- sev, signal event -- sets event register on all CPUs (other
circumstances like interrupts also set the event register and cause
wfe to wake)

These can be used to reduce the power consumption of spinning for a
lock, but only if they are actually paired -- if there's no sev, wfe
might hang indefinitely. Currently only pthread_spin(3) actually
pairs them; the other lock primitives (internal lock, mutex, rwlock)
do not -- they have spin lock backoff loops, but no corresponding
wakeup to cancel a wfe.

It may be worthwhile to teach the other lock primitives to pair
wfe/sev, but that requires some performance measurement to verify
it's actually worthwhile. So for now, we just make sure not to use
wfe when there's no sev, and keep everything else the same -- this
should fix severe performance degredation in libpthread on Arm
without hurting anything else.

No change in the generated code on amd64 and i386. No change in the
generated code for pthread_spin.c on arm and aarch64 -- changes only
the generated code for pthread_lock.c, pthread_mutex.c, and
pthread_rwlock.c, as intended.
PR port-arm/57437

  /src/lib/libpthread/arch/x86_64/
pthread_md.h 1.12.54.1 Tue Aug 01 16:21:07 UTC 2023 martin Pull up following revision(s) (requested by riastradh in ticket #296):

lib/libpthread/arch/x86_64/pthread_md.h: revision 1.13
lib/libpthread/pthread_int.h: revision 1.110
lib/libpthread/pthread_int.h: revision 1.111
lib/libpthread/arch/i386/pthread_md.h: revision 1.21
lib/libpthread/arch/arm/pthread_md.h: revision 1.12
lib/libpthread/arch/arm/pthread_md.h: revision 1.13
lib/libpthread/pthread_spin.c: revision 1.11
lib/libpthread/arch/aarch64/pthread_md.h: revision 1.2

libpthread: Use __nothing, not /* nothing */, for empty macros.

No functional change intended -- just safer to do it this way in case
the macros are used in if branches or comma expressions.

PR port-arm/57437 (pthread__smt_pause/wake issue)

libpthread: New pthread__smt_wait to put CPU in low power for spin.

This is now distinct from pthread__smt_pause, which is for spin lock
backoff with no paired wakeup.

On Arm, there is a single-bit event register per CPU, and there are two
instructions to manage it:
- wfe, wait for event -- if event register is clear, enter low power
mode and wait until event register is set; then exit low power mode
and clear event register
- sev, signal event -- sets event register on all CPUs (other
circumstances like interrupts also set the event register and cause
wfe to wake)

These can be used to reduce the power consumption of spinning for a
lock, but only if they are actually paired -- if there's no sev, wfe
might hang indefinitely. Currently only pthread_spin(3) actually
pairs them; the other lock primitives (internal lock, mutex, rwlock)
do not -- they have spin lock backoff loops, but no corresponding
wakeup to cancel a wfe.

It may be worthwhile to teach the other lock primitives to pair
wfe/sev, but that requires some performance measurement to verify
it's actually worthwhile. So for now, we just make sure not to use
wfe when there's no sev, and keep everything else the same -- this
should fix severe performance degredation in libpthread on Arm
without hurting anything else.

No change in the generated code on amd64 and i386. No change in the
generated code for pthread_spin.c on arm and aarch64 -- changes only
the generated code for pthread_lock.c, pthread_mutex.c, and
pthread_rwlock.c, as intended.

PR port-arm/57437

1.12.46.1 Fri Aug 04 13:04:03 UTC 2023 martin Pull up following revision(s) (requested by riastradh in ticket #1700):

lib/libpthread/arch/x86_64/pthread_md.h: revision 1.13
lib/libpthread/pthread_int.h: revision 1.110
lib/libpthread/pthread_int.h: revision 1.111
lib/libpthread/arch/i386/pthread_md.h: revision 1.21
lib/libpthread/arch/arm/pthread_md.h: revision 1.12
lib/libpthread/arch/arm/pthread_md.h: revision 1.13
lib/libpthread/pthread_spin.c: revision 1.11
lib/libpthread/arch/aarch64/pthread_md.h: revision 1.2

libpthread: Use __nothing, not /* nothing */, for empty macros.

No functional change intended -- just safer to do it this way in case
the macros are used in if branches or comma expressions.
PR port-arm/57437 (pthread__smt_pause/wake issue)

libpthread: New pthread__smt_wait to put CPU in low power for spin.

This is now distinct from pthread__smt_pause, which is for spin lock
backoff with no paired wakeup.

On Arm, there is a single-bit event register per CPU, and there are two
instructions to manage it:
- wfe, wait for event -- if event register is clear, enter low power
mode and wait until event register is set; then exit low power mode
and clear event register
- sev, signal event -- sets event register on all CPUs (other
circumstances like interrupts also set the event register and cause
wfe to wake)

These can be used to reduce the power consumption of spinning for a
lock, but only if they are actually paired -- if there's no sev, wfe
might hang indefinitely. Currently only pthread_spin(3) actually
pairs them; the other lock primitives (internal lock, mutex, rwlock)
do not -- they have spin lock backoff loops, but no corresponding
wakeup to cancel a wfe.

It may be worthwhile to teach the other lock primitives to pair
wfe/sev, but that requires some performance measurement to verify
it's actually worthwhile. So for now, we just make sure not to use
wfe when there's no sev, and keep everything else the same -- this
should fix severe performance degredation in libpthread on Arm
without hurting anything else.

No change in the generated code on amd64 and i386. No change in the
generated code for pthread_spin.c on arm and aarch64 -- changes only
the generated code for pthread_lock.c, pthread_mutex.c, and
pthread_rwlock.c, as intended.
PR port-arm/57437

1.12.36.1 Fri Aug 04 13:06:58 UTC 2023 martin Pull up following revision(s) (requested by riastradh in ticket #1878):

lib/libpthread/arch/x86_64/pthread_md.h: revision 1.13
lib/libpthread/pthread_int.h: revision 1.110
lib/libpthread/pthread_int.h: revision 1.111
lib/libpthread/arch/i386/pthread_md.h: revision 1.21
lib/libpthread/arch/arm/pthread_md.h: revision 1.12
lib/libpthread/arch/arm/pthread_md.h: revision 1.13
lib/libpthread/pthread_spin.c: revision 1.11
lib/libpthread/arch/aarch64/pthread_md.h: revision 1.2

libpthread: Use __nothing, not /* nothing */, for empty macros.

No functional change intended -- just safer to do it this way in case
the macros are used in if branches or comma expressions.
PR port-arm/57437 (pthread__smt_pause/wake issue)

libpthread: New pthread__smt_wait to put CPU in low power for spin.

This is now distinct from pthread__smt_pause, which is for spin lock
backoff with no paired wakeup.

On Arm, there is a single-bit event register per CPU, and there are two
instructions to manage it:
- wfe, wait for event -- if event register is clear, enter low power
mode and wait until event register is set; then exit low power mode
and clear event register
- sev, signal event -- sets event register on all CPUs (other
circumstances like interrupts also set the event register and cause
wfe to wake)

These can be used to reduce the power consumption of spinning for a
lock, but only if they are actually paired -- if there's no sev, wfe
might hang indefinitely. Currently only pthread_spin(3) actually
pairs them; the other lock primitives (internal lock, mutex, rwlock)
do not -- they have spin lock backoff loops, but no corresponding
wakeup to cancel a wfe.

It may be worthwhile to teach the other lock primitives to pair
wfe/sev, but that requires some performance measurement to verify
it's actually worthwhile. So for now, we just make sure not to use
wfe when there's no sev, and keep everything else the same -- this
should fix severe performance degredation in libpthread on Arm
without hurting anything else.

No change in the generated code on amd64 and i386. No change in the
generated code for pthread_spin.c on arm and aarch64 -- changes only
the generated code for pthread_lock.c, pthread_mutex.c, and
pthread_rwlock.c, as intended.
PR port-arm/57437

  /src/lib/libpthread/
pthread_spin.c 1.6.34.1 Fri Aug 04 13:04:03 UTC 2023 martin Pull up following revision(s) (requested by riastradh in ticket #1700):

lib/libpthread/arch/x86_64/pthread_md.h: revision 1.13
lib/libpthread/pthread_int.h: revision 1.110
lib/libpthread/pthread_int.h: revision 1.111
lib/libpthread/arch/i386/pthread_md.h: revision 1.21
lib/libpthread/arch/arm/pthread_md.h: revision 1.12
lib/libpthread/arch/arm/pthread_md.h: revision 1.13
lib/libpthread/pthread_spin.c: revision 1.11
lib/libpthread/arch/aarch64/pthread_md.h: revision 1.2

libpthread: Use __nothing, not /* nothing */, for empty macros.

No functional change intended -- just safer to do it this way in case
the macros are used in if branches or comma expressions.
PR port-arm/57437 (pthread__smt_pause/wake issue)

libpthread: New pthread__smt_wait to put CPU in low power for spin.

This is now distinct from pthread__smt_pause, which is for spin lock
backoff with no paired wakeup.

On Arm, there is a single-bit event register per CPU, and there are two
instructions to manage it:
- wfe, wait for event -- if event register is clear, enter low power
mode and wait until event register is set; then exit low power mode
and clear event register
- sev, signal event -- sets event register on all CPUs (other
circumstances like interrupts also set the event register and cause
wfe to wake)

These can be used to reduce the power consumption of spinning for a
lock, but only if they are actually paired -- if there's no sev, wfe
might hang indefinitely. Currently only pthread_spin(3) actually
pairs them; the other lock primitives (internal lock, mutex, rwlock)
do not -- they have spin lock backoff loops, but no corresponding
wakeup to cancel a wfe.

It may be worthwhile to teach the other lock primitives to pair
wfe/sev, but that requires some performance measurement to verify
it's actually worthwhile. So for now, we just make sure not to use
wfe when there's no sev, and keep everything else the same -- this
should fix severe performance degredation in libpthread on Arm
without hurting anything else.

No change in the generated code on amd64 and i386. No change in the
generated code for pthread_spin.c on arm and aarch64 -- changes only
the generated code for pthread_lock.c, pthread_mutex.c, and
pthread_rwlock.c, as intended.
PR port-arm/57437

1.6.24.1 Fri Aug 04 13:06:59 UTC 2023 martin Pull up following revision(s) (requested by riastradh in ticket #1878):

lib/libpthread/arch/x86_64/pthread_md.h: revision 1.13
lib/libpthread/pthread_int.h: revision 1.110
lib/libpthread/pthread_int.h: revision 1.111
lib/libpthread/arch/i386/pthread_md.h: revision 1.21
lib/libpthread/arch/arm/pthread_md.h: revision 1.12
lib/libpthread/arch/arm/pthread_md.h: revision 1.13
lib/libpthread/pthread_spin.c: revision 1.11
lib/libpthread/arch/aarch64/pthread_md.h: revision 1.2

libpthread: Use __nothing, not /* nothing */, for empty macros.

No functional change intended -- just safer to do it this way in case
the macros are used in if branches or comma expressions.
PR port-arm/57437 (pthread__smt_pause/wake issue)

libpthread: New pthread__smt_wait to put CPU in low power for spin.

This is now distinct from pthread__smt_pause, which is for spin lock
backoff with no paired wakeup.

On Arm, there is a single-bit event register per CPU, and there are two
instructions to manage it:
- wfe, wait for event -- if event register is clear, enter low power
mode and wait until event register is set; then exit low power mode
and clear event register
- sev, signal event -- sets event register on all CPUs (other
circumstances like interrupts also set the event register and cause
wfe to wake)

These can be used to reduce the power consumption of spinning for a
lock, but only if they are actually paired -- if there's no sev, wfe
might hang indefinitely. Currently only pthread_spin(3) actually
pairs them; the other lock primitives (internal lock, mutex, rwlock)
do not -- they have spin lock backoff loops, but no corresponding
wakeup to cancel a wfe.

It may be worthwhile to teach the other lock primitives to pair
wfe/sev, but that requires some performance measurement to verify
it's actually worthwhile. So for now, we just make sure not to use
wfe when there's no sev, and keep everything else the same -- this
should fix severe performance degredation in libpthread on Arm
without hurting anything else.

No change in the generated code on amd64 and i386. No change in the
generated code for pthread_spin.c on arm and aarch64 -- changes only
the generated code for pthread_lock.c, pthread_mutex.c, and
pthread_rwlock.c, as intended.
PR port-arm/57437

1.10.2.1 Tue Aug 01 16:21:07 UTC 2023 martin Pull up following revision(s) (requested by riastradh in ticket #296):

lib/libpthread/arch/x86_64/pthread_md.h: revision 1.13
lib/libpthread/pthread_int.h: revision 1.110
lib/libpthread/pthread_int.h: revision 1.111
lib/libpthread/arch/i386/pthread_md.h: revision 1.21
lib/libpthread/arch/arm/pthread_md.h: revision 1.12
lib/libpthread/arch/arm/pthread_md.h: revision 1.13
lib/libpthread/pthread_spin.c: revision 1.11
lib/libpthread/arch/aarch64/pthread_md.h: revision 1.2

libpthread: Use __nothing, not /* nothing */, for empty macros.

No functional change intended -- just safer to do it this way in case
the macros are used in if branches or comma expressions.

PR port-arm/57437 (pthread__smt_pause/wake issue)

libpthread: New pthread__smt_wait to put CPU in low power for spin.

This is now distinct from pthread__smt_pause, which is for spin lock
backoff with no paired wakeup.

On Arm, there is a single-bit event register per CPU, and there are two
instructions to manage it:
- wfe, wait for event -- if event register is clear, enter low power
mode and wait until event register is set; then exit low power mode
and clear event register
- sev, signal event -- sets event register on all CPUs (other
circumstances like interrupts also set the event register and cause
wfe to wake)

These can be used to reduce the power consumption of spinning for a
lock, but only if they are actually paired -- if there's no sev, wfe
might hang indefinitely. Currently only pthread_spin(3) actually
pairs them; the other lock primitives (internal lock, mutex, rwlock)
do not -- they have spin lock backoff loops, but no corresponding
wakeup to cancel a wfe.

It may be worthwhile to teach the other lock primitives to pair
wfe/sev, but that requires some performance measurement to verify
it's actually worthwhile. So for now, we just make sure not to use
wfe when there's no sev, and keep everything else the same -- this
should fix severe performance degredation in libpthread on Arm
without hurting anything else.

No change in the generated code on amd64 and i386. No change in the
generated code for pthread_spin.c on arm and aarch64 -- changes only
the generated code for pthread_lock.c, pthread_mutex.c, and
pthread_rwlock.c, as intended.

PR port-arm/57437

  /src/sys/arch/atari/include/
pte.h 1.7.88.1 Thu Jan 08 22:45:30 UTC 2009 snj Pull up following revision(s) (requested by tsutsui in ticket #230):
sys/arch/atari/atari/atari_init.c: revision 1.69
sys/arch/atari/atari/pmap.c: revision 1.111 via patch
sys/arch/atari/atari/pmap_bootstrap.c: revision 1.1
sys/arch/atari/conf/files.atari: revision 1.113
sys/arch/atari/include/pcb.h: revision 1.9
sys/arch/atari/include/pmap.h: revision 1.39 via patch
sys/arch/atari/include/pte.h: revision 1.8
sys/arch/atari/include/vmparam.h: revision 1.22
Pull the following amiga's pmap changes to atari:
arch/amiga/amiga/amiga_init.c 1.95-1.97, 1.100-1.102
arch/amiga/amiga/pmap.c 1.123, 1.126-1.131, 1.142, 1.145
arch/amiga/amiga/pmap_bootstrap.c 1.1, 1.2, 1.3, 1.4
arch/amiga/conf/files.amiga 1.137
arch/amiga/include/pcb.h 1.16
arch/amiga/include/pmap.h 1.44
arch/amiga/include/pte.h 1.19
arch/amiga/include/vmparam.h 1.35
- change kernel address space layout (i.e. move Sysmap to the end of KVA)
to match other m68k ports, which should be done on yamt-km merge
- rework pmap_zero_page(), pmap_copy_page() and some more other functions
to make them compatible with m68k/pmap_motorola.c
- move pmap_bootstrap() into a separate file to allow using either
the atari pmap.c or the m68k common pmap_motorola.c
- use common m68k include files, pcb.h, pmap_motorola.h, and
pte_motorola.h
- misc style and cosmetic changes
Most merge work is done by Tuomo Makinen, and
miscellaneous fixes and cleanups are done by me.
Tested on Falcon with both 68030 and 68060 by Tuomo, and
also tested on TT030 by David Ross on port-atari.
Should be pulled up to netbsd-4 (it requires at least Sysmap changes)
and netbsd-5.
1.7.24.2 Thu Jan 15 22:48:48 UTC 2009 bouyer Pull up following revision(s) (requested by tsutsui in ticket #1258):
sys/arch/atari/atari/atari_init.c: revision 1.68, 1.69, 1.70
sys/arch/atari/atari/pmap_bootstrap.c: revision 1.1
sys/arch/atari/include/pte.h: revision 1.8
sys/arch/atari/include/vmparam.h: revision 1.22
sys/arch/atari/include/pmap.h: revision 1.35, 1.37, 1.39 (via patch)
sys/arch/atari/atari/pmap.c: revision 1.106, 1.111 (via patch)
sys/arch/atari/atari/genassym.cf: revision 1.28
sys/arch/atari/conf/files.atari: revision 1.113
sys/arch/atari/include/pcb.h: revision 1.7, 1.8, 1.9
Replace the Mach-derived boolean_t type with the C99 bool type. A
future commit will replace use of TRUE and FALSE with true and false.
Kill caddr_t; there will be some MI fallout, but it will be fixed shortly.
Remove bogus DEBUG uvm_map() calls - (sync with amiga pmap). From Tuomo
Remove quite obsolete pcb_cmap2.
Pull the following amiga's pmap changes to atari:
arch/amiga/amiga/amiga_init.c 1.95-1.97, 1.100-1.102
arch/amiga/amiga/pmap.c 1.123, 1.126-1.131, 1.142, 1.145
arch/amiga/amiga/pmap_bootstrap.c 1.1, 1.2, 1.3, 1.4
arch/amiga/conf/files.amiga 1.137
arch/amiga/include/pcb.h 1.16
arch/amiga/include/pmap.h 1.44
arch/amiga/include/pte.h 1.19
arch/amiga/include/vmparam.h 1.35
- change kernel address space layout (i.e. move Sysmap to the end of KVA)
to match other m68k ports, which should be done on yamt-km merge
- rework pmap_zero_page(), pmap_copy_page() and some more other functions
to make them compatible with m68k/pmap_motorola.c
- move pmap_bootstrap() into a separate file to allow using either
the atari pmap.c or the m68k common pmap_motorola.c
- use common m68k include files, pcb.h, pmap_motorola.h, and pte_motorola.h
- misc style and cosmetic changes
Most merge work is done by Tuomo Makinen, and
miscellaneous fixes and cleanups are done by me.
Tested on Falcon with both 68030 and 68060 by Tuomo, and
also tested on TT030 by David Ross on port-atari.
Should be pulled up to netbsd-4 (it requires at least Sysmap changes)
and netbsd-5.
Update one more comment which was missed in previous.
1.7.24.1 Thu Jan 15 22:40:54 UTC 2009 bouyer Pull up following revision(s) (requested by tsutsui in ticket #1258):
sys/arch/atari/atari/atari_init.c: revision 1.68, 1.69, 1.70
sys/arch/atari/atari/pmap_bootstrap.c: revision 1.1
sys/arch/atari/include/pte.h: revision 1.8
sys/arch/atari/include/vmparam.h: revision 1.22
sys/arch/atari/include/pmap.h: revision 1.35, 1.37, 1.39 (via patch)
sys/arch/atari/atari/pmap.c: revision 1.106, 1.111 (via patch)
sys/arch/atari/atari/genassym.cf: revision 1.28
sys/arch/atari/conf/files.atari: revision 1.113
sys/arch/atari/include/pcb.h: revision 1.7, 1.8, 1.9
Replace the Mach-derived boolean_t type with the C99 bool type. A
future commit will replace use of TRUE and FALSE with true and false.
Kill caddr_t; there will be some MI fallout, but it will be fixed shortly.
Remove bogus DEBUG uvm_map() calls - (sync with amiga pmap). From Tuomo
Remove quite obsolete pcb_cmap2.
Pull the following amiga's pmap changes to atari:
arch/amiga/amiga/amiga_init.c 1.95-1.97, 1.100-1.102
arch/amiga/amiga/pmap.c 1.123, 1.126-1.131, 1.142, 1.145
arch/amiga/amiga/pmap_bootstrap.c 1.1, 1.2, 1.3, 1.4
arch/amiga/conf/files.amiga 1.137
arch/amiga/include/pcb.h 1.16
arch/amiga/include/pmap.h 1.44
arch/amiga/include/pte.h 1.19
arch/amiga/include/vmparam.h 1.35
- change kernel address space layout (i.e. move Sysmap to the end of KVA)
to match other m68k ports, which should be done on yamt-km merge
- rework pmap_zero_page(), pmap_copy_page() and some more other functions
to make them compatible with m68k/pmap_motorola.c
- move pmap_bootstrap() into a separate file to allow using either
the atari pmap.c or the m68k common pmap_motorola.c
- use common m68k include files, pcb.h, pmap_motorola.h, and pte_motorola.h
- misc style and cosmetic changes
Most merge work is done by Tuomo Makinen, and
miscellaneous fixes and cleanups are done by me.
Tested on Falcon with both 68030 and 68060 by Tuomo, and
also tested on TT030 by David Ross on port-atari.
Should be pulled up to netbsd-4 (it requires at least Sysmap changes)
and netbsd-5.
Update one more comment which was missed in previous.
  /src/lib/npf/ext_log/
shlib_version 1.1.4.2 Sun Nov 18 22:38:29 UTC 2012 riz Pull up following revision(s) (requested by rmind in ticket #693):
lib/npf/ext_normalise/shlib_version: revision 1.1
lib/libnpf/npf.c: revision 1.13
distrib/sets/lists/modules/mi: revision 1.48
sys/net/npf/npf_rproc.c: revision 1.3
sys/net/npf/npf_rproc.c: revision 1.4
sys/modules/npf/Makefile: revision 1.11
usr.sbin/npf/npfctl/npfctl.h: revision 1.20
lib/npf/ext_log/npfext_log.c: revision 1.1
lib/libnpf/npf.h: revision 1.11
sys/net/npf/npf_inet.c: revision 1.17
sys/net/npf/npf_log.c: file removal
sys/net/npf/npf_handler.c: revision 1.22
distrib/sets/lists/base/shl.mi: revision 1.636
sys/net/npf/npf_impl.h: revision 1.23
usr.sbin/npf/npfctl/Makefile: revision 1.8
lib/npf/Makefile: revision 1.1
lib/npf/ext_log/shlib_version: revision 1.1
lib/Makefile: revision 1.189
distrib/sets/lists/comp/shl.mi: revision 1.236
usr.sbin/npf/npfctl/npf_build.c: revision 1.14
distrib/sets/lists/base/mi: revision 1.1007
usr.sbin/npf/npfctl/npf_scan.l: revision 1.6
distrib/sets/lists/base/mi: revision 1.1009
sys/net/npf/npf.h: revision 1.21
lib/npf/ext_normalise/npfext_normalise.c: revision 1.1
etc/mtree/NetBSD.dist.base: revision 1.105
lib/libnpf/Makefile: revision 1.3
etc/mtree/NetBSD.dist.base: revision 1.106
usr.sbin/npf/npfctl/npf_extmod.c: revision 1.1
sys/net/npf/npf_ctl.c: revision 1.18
lib/npf/ext_log/Makefile: revision 1.1
distrib/sets/lists/comp/mi: revision 1.1781
usr.sbin/npf/npfctl/npf_var.h: revision 1.4
sys/net/npf/npf.c: revision 1.13
sys/modules/Makefile: revision 1.111
sys/net/npf/npf_ext_log.c: revision 1.1
lib/npf/Makefile.inc: revision 1.1
sys/net/npf/npf_ext_normalise.c: revision 1.1
sys/net/npf/files.npf: revision 1.8
sys/rump/net/lib/libnpf/Makefile: revision 1.2
sys/modules/npf_ext_log/Makefile: revision 1.1
lib/npf/ext_normalise/Makefile: revision 1.1
usr.sbin/npf/npfctl/npfctl.c: revision 1.20
usr.sbin/npf/npfctl/npf_parse.y: revision 1.13
sys/modules/npf_ext_normalise/Makefile: revision 1.1
Implement dynamic NPF extensions interface. An extension consists of
dynamically loaded module (.so) supplementing npfctl(8) and a kernel
module. Move normalisation and logging functionality into their own
extensions. More improvements to come.
Add /usr/lib/npf.
Add ./usr/libdata/debug/usr/lib/npf for rmind
Fix MKDEBUG set lists
ext_ops does not change during the life cycle and can be fetched without
the mutex held. This avoids confusion in the compiler about an uninitialized
variable ext_ops.
ok rmind@

  /src/share/man/man4/man4.sparc64/
Makefile 1.4.18.1 Fri Oct 16 11:56:10 UTC 2009 sborrill Pull up the following revisions(s) (requested by nakayama in ticket #1064):
distrib/sets/lists/man/mi: revision 1.1161
share/man/man4/man4.sparc64/Makefile: revision 1.5
share/man/man4/man4.sparc64/lom.4: revision 1.1-1.2
sys/arch/sparc64/conf/GENERIC: revision 1.111
sys/arch/sparc64/conf/files.sparc64: revision 1.121
sys/arch/sparc64/dev/lom.c: revision 1.1
sys/dev/DEVNAMES: revision 1.252

Add a driver for LOMlite lights out management hardware monitor and watchdog
timer.
lom.4 1.2.2.2 Fri Oct 16 11:56:10 UTC 2009 sborrill Pull up the following revisions(s) (requested by nakayama in ticket #1064):
distrib/sets/lists/man/mi: revision 1.1161
share/man/man4/man4.sparc64/Makefile: revision 1.5
share/man/man4/man4.sparc64/lom.4: revision 1.1-1.2
sys/arch/sparc64/conf/GENERIC: revision 1.111
sys/arch/sparc64/conf/files.sparc64: revision 1.121
sys/arch/sparc64/dev/lom.c: revision 1.1
sys/dev/DEVNAMES: revision 1.252

Add a driver for LOMlite lights out management hardware monitor and watchdog
timer.

  /src/sys/arch/hppa/hppa/
sig_machdep.c 1.25.48.1 Sun Jan 27 18:43:08 UTC 2019 martin Pull up following revision(s) (requested by maxv in ticket #1173):
sys/arch/hppa/hppa/sig_machdep.c: revision 1.26
sys/arch/arm/arm/sig_machdep.c: revision 1.51
sys/arch/i386/i386/machdep.c: revision 1.813
sys/arch/alpha/alpha/machdep.c: revision 1.352
sys/arch/m68k/m68k/sig_machdep.c: revision 1.50
sys/arch/usermode/target/i386/cpu_i386.c: revision 1.8
sys/arch/sparc64/sparc64/machdep.c: revision 1.289
sys/arch/sparc64/sparc64/netbsd32_machdep.c: revision 1.111
sys/arch/powerpc/powerpc/sig_machdep.c: revision 1.46
sys/arch/amd64/amd64/netbsd32_machdep.c: revision 1.117
sys/arch/sh3/sh3/sh3_machdep.c: revision 1.106
sys/arch/mips/mips/netbsd32_machdep.c: revision 1.16
sys/arch/mips/mips/sig_machdep.c: revision 1.24
sys/arch/riscv/riscv/sig_machdep.c: revision 1.2
sys/arch/usermode/target/x86_64/cpu_x86_64.c: revision 1.7
sys/arch/vax/vax/sig_machdep.c: revision 1.23

Fix widespread leak in the sendsig_siginfo() functions. sigframe_siginfo
has padding, so zero it out properly. While here I'm also zeroing out some
other things in several ports, for safety. Same problem in netbsd32, so
fix that too.

I can't compile-test on each architecture, but there should be no
breakage (tm).

Overall this fixes at least 14 info leaks. Prompted by the discovery by
KLEAK of a leak in amd64's sendsig_siginfo.

1.25.42.1 Wed Jan 30 13:29:51 UTC 2019 martin Pull up following revision(s) (requested by maxv in ticket #1677):

sys/arch/hppa/hppa/sig_machdep.c: revision 1.26
sys/arch/arm/arm/sig_machdep.c: revision 1.51
sys/arch/i386/i386/machdep.c: revision 1.813
sys/arch/alpha/alpha/machdep.c: revision 1.352
sys/arch/m68k/m68k/sig_machdep.c: revision 1.50
sys/arch/usermode/target/i386/cpu_i386.c: revision 1.8
sys/arch/sparc64/sparc64/machdep.c: revision 1.289
sys/arch/sparc64/sparc64/netbsd32_machdep.c: revision 1.111
sys/arch/powerpc/powerpc/sig_machdep.c: revision 1.46
sys/arch/amd64/amd64/netbsd32_machdep.c: revision 1.117
sys/arch/sh3/sh3/sh3_machdep.c: revision 1.106
sys/arch/mips/mips/netbsd32_machdep.c: revision 1.16
sys/arch/mips/mips/sig_machdep.c: revision 1.24
sys/arch/usermode/target/x86_64/cpu_x86_64.c: revision 1.7
sys/arch/vax/vax/sig_machdep.c: revision 1.23

Fix widespread leak in the sendsig_siginfo() functions. sigframe_siginfo
has padding, so zero it out properly. While here I'm also zeroing out some
other things in several ports, for safety. Same problem in netbsd32, so
fix that too.

I can't compile-test on each architecture, but there should be no
breakage (tm).

Overall this fixes at least 14 info leaks. Prompted by the discovery by
KLEAK of a leak in amd64's sendsig_siginfo.

1.25.34.1 Wed Jan 30 13:32:56 UTC 2019 martin Pull up following revision(s) (requested by maxv in ticket #1677):

sys/arch/hppa/hppa/sig_machdep.c: revision 1.26
sys/arch/arm/arm/sig_machdep.c: revision 1.51
sys/arch/i386/i386/machdep.c: revision 1.813
sys/arch/alpha/alpha/machdep.c: revision 1.352
sys/arch/m68k/m68k/sig_machdep.c: revision 1.50
sys/arch/usermode/target/i386/cpu_i386.c: revision 1.8
sys/arch/sparc64/sparc64/machdep.c: revision 1.289
sys/arch/sparc64/sparc64/netbsd32_machdep.c: revision 1.111
sys/arch/powerpc/powerpc/sig_machdep.c: revision 1.46
sys/arch/amd64/amd64/netbsd32_machdep.c: revision 1.117
sys/arch/sh3/sh3/sh3_machdep.c: revision 1.106
sys/arch/mips/mips/netbsd32_machdep.c: revision 1.16
sys/arch/mips/mips/sig_machdep.c: revision 1.24
sys/arch/usermode/target/x86_64/cpu_x86_64.c: revision 1.7
sys/arch/vax/vax/sig_machdep.c: revision 1.23

Fix widespread leak in the sendsig_siginfo() functions. sigframe_siginfo
has padding, so zero it out properly. While here I'm also zeroing out some
other things in several ports, for safety. Same problem in netbsd32, so
fix that too.

I can't compile-test on each architecture, but there should be no
breakage (tm).

Overall this fixes at least 14 info leaks. Prompted by the discovery by
KLEAK of a leak in amd64's sendsig_siginfo.

1.25.30.1 Wed Jan 30 13:27:27 UTC 2019 martin Pull up following revision(s) (requested by maxv in ticket #1677):

sys/arch/hppa/hppa/sig_machdep.c: revision 1.26
sys/arch/arm/arm/sig_machdep.c: revision 1.51
sys/arch/i386/i386/machdep.c: revision 1.813
sys/arch/alpha/alpha/machdep.c: revision 1.352
sys/arch/m68k/m68k/sig_machdep.c: revision 1.50
sys/arch/usermode/target/i386/cpu_i386.c: revision 1.8
sys/arch/sparc64/sparc64/machdep.c: revision 1.289
sys/arch/sparc64/sparc64/netbsd32_machdep.c: revision 1.111
sys/arch/powerpc/powerpc/sig_machdep.c: revision 1.46
sys/arch/amd64/amd64/netbsd32_machdep.c: revision 1.117
sys/arch/sh3/sh3/sh3_machdep.c: revision 1.106
sys/arch/mips/mips/netbsd32_machdep.c: revision 1.16
sys/arch/mips/mips/sig_machdep.c: revision 1.24
sys/arch/usermode/target/x86_64/cpu_x86_64.c: revision 1.7
sys/arch/vax/vax/sig_machdep.c: revision 1.23

Fix widespread leak in the sendsig_siginfo() functions. sigframe_siginfo
has padding, so zero it out properly. While here I'm also zeroing out some
other things in several ports, for safety. Same problem in netbsd32, so
fix that too.

I can't compile-test on each architecture, but there should be no
breakage (tm).

Overall this fixes at least 14 info leaks. Prompted by the discovery by
KLEAK of a leak in amd64's sendsig_siginfo.

  /src/sys/arch/riscv/riscv/
sig_machdep.c 1.1.12.1 Sun Jan 27 18:43:09 UTC 2019 martin Pull up following revision(s) (requested by maxv in ticket #1173):
sys/arch/hppa/hppa/sig_machdep.c: revision 1.26
sys/arch/arm/arm/sig_machdep.c: revision 1.51
sys/arch/i386/i386/machdep.c: revision 1.813
sys/arch/alpha/alpha/machdep.c: revision 1.352
sys/arch/m68k/m68k/sig_machdep.c: revision 1.50
sys/arch/usermode/target/i386/cpu_i386.c: revision 1.8
sys/arch/sparc64/sparc64/machdep.c: revision 1.289
sys/arch/sparc64/sparc64/netbsd32_machdep.c: revision 1.111
sys/arch/powerpc/powerpc/sig_machdep.c: revision 1.46
sys/arch/amd64/amd64/netbsd32_machdep.c: revision 1.117
sys/arch/sh3/sh3/sh3_machdep.c: revision 1.106
sys/arch/mips/mips/netbsd32_machdep.c: revision 1.16
sys/arch/mips/mips/sig_machdep.c: revision 1.24
sys/arch/riscv/riscv/sig_machdep.c: revision 1.2
sys/arch/usermode/target/x86_64/cpu_x86_64.c: revision 1.7
sys/arch/vax/vax/sig_machdep.c: revision 1.23

Fix widespread leak in the sendsig_siginfo() functions. sigframe_siginfo
has padding, so zero it out properly. While here I'm also zeroing out some
other things in several ports, for safety. Same problem in netbsd32, so
fix that too.

I can't compile-test on each architecture, but there should be no
breakage (tm).

Overall this fixes at least 14 info leaks. Prompted by the discovery by
KLEAK of a leak in amd64's sendsig_siginfo.

  /src/sys/arch/vax/vax/
sig_machdep.c 1.21.40.1 Wed Jan 30 13:29:52 UTC 2019 martin Pull up following revision(s) (requested by maxv in ticket #1677):

sys/arch/hppa/hppa/sig_machdep.c: revision 1.26
sys/arch/arm/arm/sig_machdep.c: revision 1.51
sys/arch/i386/i386/machdep.c: revision 1.813
sys/arch/alpha/alpha/machdep.c: revision 1.352
sys/arch/m68k/m68k/sig_machdep.c: revision 1.50
sys/arch/usermode/target/i386/cpu_i386.c: revision 1.8
sys/arch/sparc64/sparc64/machdep.c: revision 1.289
sys/arch/sparc64/sparc64/netbsd32_machdep.c: revision 1.111
sys/arch/powerpc/powerpc/sig_machdep.c: revision 1.46
sys/arch/amd64/amd64/netbsd32_machdep.c: revision 1.117
sys/arch/sh3/sh3/sh3_machdep.c: revision 1.106
sys/arch/mips/mips/netbsd32_machdep.c: revision 1.16
sys/arch/mips/mips/sig_machdep.c: revision 1.24
sys/arch/usermode/target/x86_64/cpu_x86_64.c: revision 1.7
sys/arch/vax/vax/sig_machdep.c: revision 1.23

Fix widespread leak in the sendsig_siginfo() functions. sigframe_siginfo
has padding, so zero it out properly. While here I'm also zeroing out some
other things in several ports, for safety. Same problem in netbsd32, so
fix that too.

I can't compile-test on each architecture, but there should be no
breakage (tm).

Overall this fixes at least 14 info leaks. Prompted by the discovery by
KLEAK of a leak in amd64's sendsig_siginfo.
1.21.32.1 Wed Jan 30 13:32:58 UTC 2019 martin Pull up following revision(s) (requested by maxv in ticket #1677):

sys/arch/hppa/hppa/sig_machdep.c: revision 1.26
sys/arch/arm/arm/sig_machdep.c: revision 1.51
sys/arch/i386/i386/machdep.c: revision 1.813
sys/arch/alpha/alpha/machdep.c: revision 1.352
sys/arch/m68k/m68k/sig_machdep.c: revision 1.50
sys/arch/usermode/target/i386/cpu_i386.c: revision 1.8
sys/arch/sparc64/sparc64/machdep.c: revision 1.289
sys/arch/sparc64/sparc64/netbsd32_machdep.c: revision 1.111
sys/arch/powerpc/powerpc/sig_machdep.c: revision 1.46
sys/arch/amd64/amd64/netbsd32_machdep.c: revision 1.117
sys/arch/sh3/sh3/sh3_machdep.c: revision 1.106
sys/arch/mips/mips/netbsd32_machdep.c: revision 1.16
sys/arch/mips/mips/sig_machdep.c: revision 1.24
sys/arch/usermode/target/x86_64/cpu_x86_64.c: revision 1.7
sys/arch/vax/vax/sig_machdep.c: revision 1.23

Fix widespread leak in the sendsig_siginfo() functions. sigframe_siginfo
has padding, so zero it out properly. While here I'm also zeroing out some
other things in several ports, for safety. Same problem in netbsd32, so
fix that too.

I can't compile-test on each architecture, but there should be no
breakage (tm).

Overall this fixes at least 14 info leaks. Prompted by the discovery by
KLEAK of a leak in amd64's sendsig_siginfo.
1.21.28.1 Wed Jan 30 13:27:28 UTC 2019 martin Pull up following revision(s) (requested by maxv in ticket #1677):

sys/arch/hppa/hppa/sig_machdep.c: revision 1.26
sys/arch/arm/arm/sig_machdep.c: revision 1.51
sys/arch/i386/i386/machdep.c: revision 1.813
sys/arch/alpha/alpha/machdep.c: revision 1.352
sys/arch/m68k/m68k/sig_machdep.c: revision 1.50
sys/arch/usermode/target/i386/cpu_i386.c: revision 1.8
sys/arch/sparc64/sparc64/machdep.c: revision 1.289
sys/arch/sparc64/sparc64/netbsd32_machdep.c: revision 1.111
sys/arch/powerpc/powerpc/sig_machdep.c: revision 1.46
sys/arch/amd64/amd64/netbsd32_machdep.c: revision 1.117
sys/arch/sh3/sh3/sh3_machdep.c: revision 1.106
sys/arch/mips/mips/netbsd32_machdep.c: revision 1.16
sys/arch/mips/mips/sig_machdep.c: revision 1.24
sys/arch/usermode/target/x86_64/cpu_x86_64.c: revision 1.7
sys/arch/vax/vax/sig_machdep.c: revision 1.23

Fix widespread leak in the sendsig_siginfo() functions. sigframe_siginfo
has padding, so zero it out properly. While here I'm also zeroing out some
other things in several ports, for safety. Same problem in netbsd32, so
fix that too.

I can't compile-test on each architecture, but there should be no
breakage (tm).

Overall this fixes at least 14 info leaks. Prompted by the discovery by
KLEAK of a leak in amd64's sendsig_siginfo.
1.22.2.1 Sun Jan 27 18:43:09 UTC 2019 martin Pull up following revision(s) (requested by maxv in ticket #1173):
sys/arch/hppa/hppa/sig_machdep.c: revision 1.26
sys/arch/arm/arm/sig_machdep.c: revision 1.51
sys/arch/i386/i386/machdep.c: revision 1.813
sys/arch/alpha/alpha/machdep.c: revision 1.352
sys/arch/m68k/m68k/sig_machdep.c: revision 1.50
sys/arch/usermode/target/i386/cpu_i386.c: revision 1.8
sys/arch/sparc64/sparc64/machdep.c: revision 1.289
sys/arch/sparc64/sparc64/netbsd32_machdep.c: revision 1.111
sys/arch/powerpc/powerpc/sig_machdep.c: revision 1.46
sys/arch/amd64/amd64/netbsd32_machdep.c: revision 1.117
sys/arch/sh3/sh3/sh3_machdep.c: revision 1.106
sys/arch/mips/mips/netbsd32_machdep.c: revision 1.16
sys/arch/mips/mips/sig_machdep.c: revision 1.24
sys/arch/riscv/riscv/sig_machdep.c: revision 1.2
sys/arch/usermode/target/x86_64/cpu_x86_64.c: revision 1.7
sys/arch/vax/vax/sig_machdep.c: revision 1.23

Fix widespread leak in the sendsig_siginfo() functions. sigframe_siginfo
has padding, so zero it out properly. While here I'm also zeroing out some
other things in several ports, for safety. Same problem in netbsd32, so
fix that too.

I can't compile-test on each architecture, but there should be no
breakage (tm).

Overall this fixes at least 14 info leaks. Prompted by the discovery by
KLEAK of a leak in amd64's sendsig_siginfo.

Completed in 408 milliseconds

1 2 3 4 5 6 7 8 91011>>