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  /src/libexec/ld.elf_so/
hash.c 1.1.6.2 Fri Aug 11 00:13:10 UTC 2023 sborrill Pull up the following revisions(s) (requested by riastradh in ticket #1712):
distrib/sets/lists/debug/mi: revision 1.409 via patch
distrib/sets/lists/tests/mi: revision 1.1280 via patch
libexec/ld.elf_so/Makefile: revision 1.145-1.147 via patch
libexec/ld.elf_so/hash.c: revision 1.1 via patch
libexec/ld.elf_so/hash.h: revision 1.1 via patch
libexec/ld.elf_so/symbol.c: revision 1.74-1.76 via patch
tests/libexec/ld.elf_so/Makefile: revision 1.21 via patch
tests/libexec/ld.elf_so/t_hash.c: revision 1.1 via patch

ld.elf_so: Fix sysv elf hash on edge cases like `ZZZZZW9p' on LP64
platforms where long is 64-bit.

1.1.4.2 Wed Aug 09 16:16:40 UTC 2023 martin Pull up following revision(s) (requested by riastradh in ticket #1886):

distrib/sets/lists/debug/mi 1.409 (patch)
distrib/sets/lists/tests/mi 1.1280 (patch)
libexec/ld.elf_so/Makefile 1.145-1.147 (patch)
libexec/ld.elf_so/hash.c 1.1
libexec/ld.elf_so/hash.h 1.1
libexec/ld.elf_so/reloc.c 1.118 (patch)
libexec/ld.elf_so/rtld.c 1.215 (patch)
libexec/ld.elf_so/rtld.h 1.145,1.147 (patch)
libexec/ld.elf_so/symbol.c 1.74-1.76 (patch)
tests/libexec/ld.elf_so/Makefile 1.21 (patch)
tests/libexec/ld.elf_so/t_hash.c 1.1

The SysV ABI specifies that the symbol hash function should return only 32
bits of hash. Unfortunately due to an implementation bu and the fact that
the return type is unsigned long which is 64 bits in LP64, this can fail
in some cases: "\xff\x0f\x0f\x0f\x0f\x0f\x12". See:
https://maskray.me/blog/2023-04-12-elf-hash-function

From Ed Maste @ FreeBSD:
https://cgit.freebsd.org/src/commit/?id=29e3a06510823edbb91667d21f530d3ec778116d

Need to write Unit Tests for this.

Oops wrong mask.

ld.elf_so: Split SRCS onto multiple lines.
Makes updates easier.
No functional change intended.

ld.elf_so: Sort SRCS.
No functional change intended.

ld.elf_so: Split hash functions into a separate file.
This way we can test them in isolation.
No functional change intended.

ld.elf_so: Add some known-answer tests for hash functions.

Make sure the testing mechanism detects the traditional overflow bug.

-1.147 (patch)
libexec/ld.elf_so/hash.c 1.1
libexec/ld.elf_so/hash.h 1.1
libexec/ld.elf_so/reloc.c 1.118 (patch)
libexec/ld.elf_so/rtld.c 1.215 (patch)
libexec/ld.elf_so/rtld.h 1.145,1.147 (patch)
libexec/ld.elf_so/symbol.c 1.74-1.76 (patch)
tests/libexec/ld.elf_so/Makefile 1.21 (patch)
tests/libexec/ld.elf_so/t_hash.c 1.1

The SysV ABI specifies that the symbol hash function should return only 32
bits of hash. Unfortunately due to an implementation bu and the fact that
the return type is unsigned long which is 64 bits in LP64, this can fail
in some cases: "\xff\x0f\x0f\x0f\x0f\x0f\x12". See:
https://maskray.me/blog/2023-04-12-elf-hash-function

From Ed Maste @ FreeBSD:
https://cgit.freebsd.org/src/commit/?id=29e3a06510823edbb91667d21f530d3ec778116d

Need to write Unit Tests for this.

Oops wrong mask.

ld.elf_so: Split SRCS onto multiple lines.
Makes updates easier.
No functional change intended.

ld.elf_so: Sort SRCS.
No functional change intended.

ld.elf_so: Split hash functions into a separate file.
This way we can test them in isolation.
No functional change intended.

ld.elf_so: Add some known-answer tests for hash functions.

Make sure the testing mechanism detects the traditional overflow bug.

1.1.2.2 Tue Aug 01 17:03:53 UTC 2023 martin Pull up following revision(s) (requested by riastradh in ticket #300):

libexec/ld.elf_so/rtld.h: revision 1.145
libexec/ld.elf_so/symbol.c: revision 1.74
libexec/ld.elf_so/rtld.h: revision 1.147
libexec/ld.elf_so/symbol.c: revision 1.75
libexec/ld.elf_so/symbol.c: revision 1.76
tests/libexec/ld.elf_so/t_hash.c: revision 1.1
libexec/ld.elf_so/Makefile: revision 1.145
libexec/ld.elf_so/Makefile: revision 1.146
libexec/ld.elf_so/Makefile: revision 1.147
libexec/ld.elf_so/reloc.c: revision 1.118
distrib/sets/lists/tests/mi: revision 1.1280
libexec/ld.elf_so/rtld.c: revision 1.215
tests/libexec/ld.elf_so/Makefile: revision 1.21
libexec/ld.elf_so/hash.c: revision 1.1
libexec/ld.elf_so/hash.h: revision 1.1
distrib/sets/lists/debug/mi: revision 1.409

The SysV ABI specifies that the symbol hash function should return only 32
bits of hash. Unfortunately due to an implementation bug and the fact that
the return type is unsigned long which is 64 bits in LP64, this can fail
in some cases: "\xff\x0f\x0f\x0f\x0f\x0f\x12". See:
"https://maskray.me/blog/2023-04-12-elf-hash-function
From Ed Maste @ FreeBSD:
https://cgit.freebsd.org/src/commit/?id=29e3a06510823edbb91667d21f530d3ec778116d

Need to write Unit Tests for this.

Oops wrong mask.

ld.elf_so: Split SRCS onto multiple lines.
Makes updates easier.
No functional change intended.

ld.elf_so: Sort SRCS.
No functional change intended.

ld.elf_so: Split hash functions into a separate file.
This way we can test them in isolation.
No functional change intended.

ld.elf_so: Add some known-answer tests for hash functions.

Make sure the testing mechanism detects the traditional overflow bug.


libexec/ld.elf_so/symbol.c: revision 1.74
libexec/ld.elf_so/rtld.h: revision 1.147
libexec/ld.elf_so/symbol.c: revision 1.75
libexec/ld.elf_so/symbol.c: revision 1.76
tests/libexec/ld.elf_so/t_hash.c: revision 1.1
libexec/ld.elf_so/Makefile: revision 1.145
libexec/ld.elf_so/Makefile: revision 1.146
libexec/ld.elf_so/Makefile: revision 1.147
libexec/ld.elf_so/reloc.c: revision 1.118
distrib/sets/lists/tests/mi: revision 1.1280
libexec/ld.elf_so/rtld.c: revision 1.215
tests/libexec/ld.elf_so/Makefile: revision 1.21
libexec/ld.elf_so/hash.c: revision 1.1
libexec/ld.elf_so/hash.h: revision 1.1
distrib/sets/lists/debug/mi: revision 1.409

The SysV ABI specifies that the symbol hash function should return only 32
bits of hash. Unfortunately due to an implementation bug and the fact that
the return type is unsigned long which is 64 bits in LP64, this can fail
in some cases: "\xff\x0f\x0f\x0f\x0f\x0f\x12". See:
"https://maskray.me/blog/2023-04-12-elf-hash-function
From Ed Maste @ FreeBSD:
https://cgit.freebsd.org/src/commit/?id=29e3a06510823edbb91667d21f530d3ec778116d

Need to write Unit Tests for this.

Oops wrong mask.

ld.elf_so: Split SRCS onto multiple lines.
Makes updates easier.
No functional change intended.

ld.elf_so: Sort SRCS.
No functional change intended.

ld.elf_so: Split hash functions into a separate file.
This way we can test them in isolation.
No functional change intended.

ld.elf_so: Add some known-answer tests for hash functions.

Make sure the testing mechanism detects the traditional overflow bug.

hash.h 1.1.6.2 Fri Aug 11 00:13:10 UTC 2023 sborrill Pull up the following revisions(s) (requested by riastradh in ticket #1712):
distrib/sets/lists/debug/mi: revision 1.409 via patch
distrib/sets/lists/tests/mi: revision 1.1280 via patch
libexec/ld.elf_so/Makefile: revision 1.145-1.147 via patch
libexec/ld.elf_so/hash.c: revision 1.1 via patch
libexec/ld.elf_so/hash.h: revision 1.1 via patch
libexec/ld.elf_so/symbol.c: revision 1.74-1.76 via patch
tests/libexec/ld.elf_so/Makefile: revision 1.21 via patch
tests/libexec/ld.elf_so/t_hash.c: revision 1.1 via patch

ld.elf_so: Fix sysv elf hash on edge cases like `ZZZZZW9p' on LP64
platforms where long is 64-bit.
1.1.4.2 Wed Aug 09 16:16:40 UTC 2023 martin Pull up following revision(s) (requested by riastradh in ticket #1886):

distrib/sets/lists/debug/mi 1.409 (patch)
distrib/sets/lists/tests/mi 1.1280 (patch)
libexec/ld.elf_so/Makefile 1.145-1.147 (patch)
libexec/ld.elf_so/hash.c 1.1
libexec/ld.elf_so/hash.h 1.1
libexec/ld.elf_so/reloc.c 1.118 (patch)
libexec/ld.elf_so/rtld.c 1.215 (patch)
libexec/ld.elf_so/rtld.h 1.145,1.147 (patch)
libexec/ld.elf_so/symbol.c 1.74-1.76 (patch)
tests/libexec/ld.elf_so/Makefile 1.21 (patch)
tests/libexec/ld.elf_so/t_hash.c 1.1

The SysV ABI specifies that the symbol hash function should return only 32
bits of hash. Unfortunately due to an implementation bu and the fact that
the return type is unsigned long which is 64 bits in LP64, this can fail
in some cases: "\xff\x0f\x0f\x0f\x0f\x0f\x12". See:
https://maskray.me/blog/2023-04-12-elf-hash-function

From Ed Maste @ FreeBSD:
https://cgit.freebsd.org/src/commit/?id=29e3a06510823edbb91667d21f530d3ec778116d

Need to write Unit Tests for this.

Oops wrong mask.

ld.elf_so: Split SRCS onto multiple lines.
Makes updates easier.
No functional change intended.

ld.elf_so: Sort SRCS.
No functional change intended.

ld.elf_so: Split hash functions into a separate file.
This way we can test them in isolation.
No functional change intended.

ld.elf_so: Add some known-answer tests for hash functions.

Make sure the testing mechanism detects the traditional overflow bug.
-1.147 (patch)
libexec/ld.elf_so/hash.c 1.1
libexec/ld.elf_so/hash.h 1.1
libexec/ld.elf_so/reloc.c 1.118 (patch)
libexec/ld.elf_so/rtld.c 1.215 (patch)
libexec/ld.elf_so/rtld.h 1.145,1.147 (patch)
libexec/ld.elf_so/symbol.c 1.74-1.76 (patch)
tests/libexec/ld.elf_so/Makefile 1.21 (patch)
tests/libexec/ld.elf_so/t_hash.c 1.1

The SysV ABI specifies that the symbol hash function should return only 32
bits of hash. Unfortunately due to an implementation bu and the fact that
the return type is unsigned long which is 64 bits in LP64, this can fail
in some cases: "\xff\x0f\x0f\x0f\x0f\x0f\x12". See:
https://maskray.me/blog/2023-04-12-elf-hash-function

From Ed Maste @ FreeBSD:
https://cgit.freebsd.org/src/commit/?id=29e3a06510823edbb91667d21f530d3ec778116d

Need to write Unit Tests for this.

Oops wrong mask.

ld.elf_so: Split SRCS onto multiple lines.
Makes updates easier.
No functional change intended.

ld.elf_so: Sort SRCS.
No functional change intended.

ld.elf_so: Split hash functions into a separate file.
This way we can test them in isolation.
No functional change intended.

ld.elf_so: Add some known-answer tests for hash functions.

Make sure the testing mechanism detects the traditional overflow bug.
1.1.2.2 Tue Aug 01 17:03:53 UTC 2023 martin Pull up following revision(s) (requested by riastradh in ticket #300):

libexec/ld.elf_so/rtld.h: revision 1.145
libexec/ld.elf_so/symbol.c: revision 1.74
libexec/ld.elf_so/rtld.h: revision 1.147
libexec/ld.elf_so/symbol.c: revision 1.75
libexec/ld.elf_so/symbol.c: revision 1.76
tests/libexec/ld.elf_so/t_hash.c: revision 1.1
libexec/ld.elf_so/Makefile: revision 1.145
libexec/ld.elf_so/Makefile: revision 1.146
libexec/ld.elf_so/Makefile: revision 1.147
libexec/ld.elf_so/reloc.c: revision 1.118
distrib/sets/lists/tests/mi: revision 1.1280
libexec/ld.elf_so/rtld.c: revision 1.215
tests/libexec/ld.elf_so/Makefile: revision 1.21
libexec/ld.elf_so/hash.c: revision 1.1
libexec/ld.elf_so/hash.h: revision 1.1
distrib/sets/lists/debug/mi: revision 1.409

The SysV ABI specifies that the symbol hash function should return only 32
bits of hash. Unfortunately due to an implementation bug and the fact that
the return type is unsigned long which is 64 bits in LP64, this can fail
in some cases: "\xff\x0f\x0f\x0f\x0f\x0f\x12". See:
"https://maskray.me/blog/2023-04-12-elf-hash-function
From Ed Maste @ FreeBSD:
https://cgit.freebsd.org/src/commit/?id=29e3a06510823edbb91667d21f530d3ec778116d

Need to write Unit Tests for this.

Oops wrong mask.

ld.elf_so: Split SRCS onto multiple lines.
Makes updates easier.
No functional change intended.

ld.elf_so: Sort SRCS.
No functional change intended.

ld.elf_so: Split hash functions into a separate file.
This way we can test them in isolation.
No functional change intended.

ld.elf_so: Add some known-answer tests for hash functions.

Make sure the testing mechanism detects the traditional overflow bug.

libexec/ld.elf_so/symbol.c: revision 1.74
libexec/ld.elf_so/rtld.h: revision 1.147
libexec/ld.elf_so/symbol.c: revision 1.75
libexec/ld.elf_so/symbol.c: revision 1.76
tests/libexec/ld.elf_so/t_hash.c: revision 1.1
libexec/ld.elf_so/Makefile: revision 1.145
libexec/ld.elf_so/Makefile: revision 1.146
libexec/ld.elf_so/Makefile: revision 1.147
libexec/ld.elf_so/reloc.c: revision 1.118
distrib/sets/lists/tests/mi: revision 1.1280
libexec/ld.elf_so/rtld.c: revision 1.215
tests/libexec/ld.elf_so/Makefile: revision 1.21
libexec/ld.elf_so/hash.c: revision 1.1
libexec/ld.elf_so/hash.h: revision 1.1
distrib/sets/lists/debug/mi: revision 1.409

The SysV ABI specifies that the symbol hash function should return only 32
bits of hash. Unfortunately due to an implementation bug and the fact that
the return type is unsigned long which is 64 bits in LP64, this can fail
in some cases: "\xff\x0f\x0f\x0f\x0f\x0f\x12". See:
"https://maskray.me/blog/2023-04-12-elf-hash-function
From Ed Maste @ FreeBSD:
https://cgit.freebsd.org/src/commit/?id=29e3a06510823edbb91667d21f530d3ec778116d

Need to write Unit Tests for this.

Oops wrong mask.

ld.elf_so: Split SRCS onto multiple lines.
Makes updates easier.
No functional change intended.

ld.elf_so: Sort SRCS.
No functional change intended.

ld.elf_so: Split hash functions into a separate file.
This way we can test them in isolation.
No functional change intended.

ld.elf_so: Add some known-answer tests for hash functions.

Make sure the testing mechanism detects the traditional overflow bug.
  /src/tests/libexec/ld.elf_so/
t_hash.c 1.1.6.2 Fri Aug 11 00:13:10 UTC 2023 sborrill Pull up the following revisions(s) (requested by riastradh in ticket #1712):
distrib/sets/lists/debug/mi: revision 1.409 via patch
distrib/sets/lists/tests/mi: revision 1.1280 via patch
libexec/ld.elf_so/Makefile: revision 1.145-1.147 via patch
libexec/ld.elf_so/hash.c: revision 1.1 via patch
libexec/ld.elf_so/hash.h: revision 1.1 via patch
libexec/ld.elf_so/symbol.c: revision 1.74-1.76 via patch
tests/libexec/ld.elf_so/Makefile: revision 1.21 via patch
tests/libexec/ld.elf_so/t_hash.c: revision 1.1 via patch

ld.elf_so: Fix sysv elf hash on edge cases like `ZZZZZW9p' on LP64
platforms where long is 64-bit.

1.1.4.2 Wed Aug 09 16:16:40 UTC 2023 martin Pull up following revision(s) (requested by riastradh in ticket #1886):

distrib/sets/lists/debug/mi 1.409 (patch)
distrib/sets/lists/tests/mi 1.1280 (patch)
libexec/ld.elf_so/Makefile 1.145-1.147 (patch)
libexec/ld.elf_so/hash.c 1.1
libexec/ld.elf_so/hash.h 1.1
libexec/ld.elf_so/reloc.c 1.118 (patch)
libexec/ld.elf_so/rtld.c 1.215 (patch)
libexec/ld.elf_so/rtld.h 1.145,1.147 (patch)
libexec/ld.elf_so/symbol.c 1.74-1.76 (patch)
tests/libexec/ld.elf_so/Makefile 1.21 (patch)
tests/libexec/ld.elf_so/t_hash.c 1.1

The SysV ABI specifies that the symbol hash function should return only 32
bits of hash. Unfortunately due to an implementation bu and the fact that
the return type is unsigned long which is 64 bits in LP64, this can fail
in some cases: "\xff\x0f\x0f\x0f\x0f\x0f\x12". See:
https://maskray.me/blog/2023-04-12-elf-hash-function

From Ed Maste @ FreeBSD:
https://cgit.freebsd.org/src/commit/?id=29e3a06510823edbb91667d21f530d3ec778116d

Need to write Unit Tests for this.

Oops wrong mask.

ld.elf_so: Split SRCS onto multiple lines.
Makes updates easier.
No functional change intended.

ld.elf_so: Sort SRCS.
No functional change intended.

ld.elf_so: Split hash functions into a separate file.
This way we can test them in isolation.
No functional change intended.

ld.elf_so: Add some known-answer tests for hash functions.

Make sure the testing mechanism detects the traditional overflow bug.

-1.147 (patch)
libexec/ld.elf_so/hash.c 1.1
libexec/ld.elf_so/hash.h 1.1
libexec/ld.elf_so/reloc.c 1.118 (patch)
libexec/ld.elf_so/rtld.c 1.215 (patch)
libexec/ld.elf_so/rtld.h 1.145,1.147 (patch)
libexec/ld.elf_so/symbol.c 1.74-1.76 (patch)
tests/libexec/ld.elf_so/Makefile 1.21 (patch)
tests/libexec/ld.elf_so/t_hash.c 1.1

The SysV ABI specifies that the symbol hash function should return only 32
bits of hash. Unfortunately due to an implementation bu and the fact that
the return type is unsigned long which is 64 bits in LP64, this can fail
in some cases: "\xff\x0f\x0f\x0f\x0f\x0f\x12". See:
https://maskray.me/blog/2023-04-12-elf-hash-function

From Ed Maste @ FreeBSD:
https://cgit.freebsd.org/src/commit/?id=29e3a06510823edbb91667d21f530d3ec778116d

Need to write Unit Tests for this.

Oops wrong mask.

ld.elf_so: Split SRCS onto multiple lines.
Makes updates easier.
No functional change intended.

ld.elf_so: Sort SRCS.
No functional change intended.

ld.elf_so: Split hash functions into a separate file.
This way we can test them in isolation.
No functional change intended.

ld.elf_so: Add some known-answer tests for hash functions.

Make sure the testing mechanism detects the traditional overflow bug.

1.1.2.2 Tue Aug 01 17:03:53 UTC 2023 martin Pull up following revision(s) (requested by riastradh in ticket #300):

libexec/ld.elf_so/rtld.h: revision 1.145
libexec/ld.elf_so/symbol.c: revision 1.74
libexec/ld.elf_so/rtld.h: revision 1.147
libexec/ld.elf_so/symbol.c: revision 1.75
libexec/ld.elf_so/symbol.c: revision 1.76
tests/libexec/ld.elf_so/t_hash.c: revision 1.1
libexec/ld.elf_so/Makefile: revision 1.145
libexec/ld.elf_so/Makefile: revision 1.146
libexec/ld.elf_so/Makefile: revision 1.147
libexec/ld.elf_so/reloc.c: revision 1.118
distrib/sets/lists/tests/mi: revision 1.1280
libexec/ld.elf_so/rtld.c: revision 1.215
tests/libexec/ld.elf_so/Makefile: revision 1.21
libexec/ld.elf_so/hash.c: revision 1.1
libexec/ld.elf_so/hash.h: revision 1.1
distrib/sets/lists/debug/mi: revision 1.409

The SysV ABI specifies that the symbol hash function should return only 32
bits of hash. Unfortunately due to an implementation bug and the fact that
the return type is unsigned long which is 64 bits in LP64, this can fail
in some cases: "\xff\x0f\x0f\x0f\x0f\x0f\x12". See:
"https://maskray.me/blog/2023-04-12-elf-hash-function
From Ed Maste @ FreeBSD:
https://cgit.freebsd.org/src/commit/?id=29e3a06510823edbb91667d21f530d3ec778116d

Need to write Unit Tests for this.

Oops wrong mask.

ld.elf_so: Split SRCS onto multiple lines.
Makes updates easier.
No functional change intended.

ld.elf_so: Sort SRCS.
No functional change intended.

ld.elf_so: Split hash functions into a separate file.
This way we can test them in isolation.
No functional change intended.

ld.elf_so: Add some known-answer tests for hash functions.

Make sure the testing mechanism detects the traditional overflow bug.


libexec/ld.elf_so/symbol.c: revision 1.74
libexec/ld.elf_so/rtld.h: revision 1.147
libexec/ld.elf_so/symbol.c: revision 1.75
libexec/ld.elf_so/symbol.c: revision 1.76
tests/libexec/ld.elf_so/t_hash.c: revision 1.1
libexec/ld.elf_so/Makefile: revision 1.145
libexec/ld.elf_so/Makefile: revision 1.146
libexec/ld.elf_so/Makefile: revision 1.147
libexec/ld.elf_so/reloc.c: revision 1.118
distrib/sets/lists/tests/mi: revision 1.1280
libexec/ld.elf_so/rtld.c: revision 1.215
tests/libexec/ld.elf_so/Makefile: revision 1.21
libexec/ld.elf_so/hash.c: revision 1.1
libexec/ld.elf_so/hash.h: revision 1.1
distrib/sets/lists/debug/mi: revision 1.409

The SysV ABI specifies that the symbol hash function should return only 32
bits of hash. Unfortunately due to an implementation bug and the fact that
the return type is unsigned long which is 64 bits in LP64, this can fail
in some cases: "\xff\x0f\x0f\x0f\x0f\x0f\x12". See:
"https://maskray.me/blog/2023-04-12-elf-hash-function
From Ed Maste @ FreeBSD:
https://cgit.freebsd.org/src/commit/?id=29e3a06510823edbb91667d21f530d3ec778116d

Need to write Unit Tests for this.

Oops wrong mask.

ld.elf_so: Split SRCS onto multiple lines.
Makes updates easier.
No functional change intended.

ld.elf_so: Sort SRCS.
No functional change intended.

ld.elf_so: Split hash functions into a separate file.
This way we can test them in isolation.
No functional change intended.

ld.elf_so: Add some known-answer tests for hash functions.

Make sure the testing mechanism detects the traditional overflow bug.

  /src/sbin/route/
prog_ops.h 1.2.24.1 Thu Jan 08 11:01:01 UTC 2015 martin Pull up following revision(s) (requested by prlw1 in ticket #390):
usr.bin/netstat/mroute.c: revision 1.25
usr.bin/netstat/Makefile: revision 1.40
sbin/route/prog_ops.h: revision 1.3
sbin/route/rtutil.c: revision 1.1
sbin/route/rtutil.h: revision 1.1
usr.bin/netstat/mroute6.c: revision 1.15
sbin/route/extern.h: revision 1.15
usr.bin/netstat/show.c: file removal
usr.bin/netstat/main.c: revision 1.93
usr.bin/netstat/route.c: revision 1.83
usr.bin/netstat/netstat.h: revision 1.51
distrib/utils/x_route/Makefile: revision 1.18
sbin/route/show.c: revision 1.46
usr.bin/netstat/if.c: revision 1.80
sbin/route/route.c: revision 1.145
sbin/route/Makefile: revision 1.26
Factor out the netstat route printing code and use it here. There is no
point in having 2 different copies; fixes PR/49371

rtutil.h 1.3.2.2 Thu Jan 08 11:01:01 UTC 2015 martin Pull up following revision(s) (requested by prlw1 in ticket #390):
usr.bin/netstat/mroute.c: revision 1.25
usr.bin/netstat/Makefile: revision 1.40
sbin/route/prog_ops.h: revision 1.3
sbin/route/rtutil.c: revision 1.1
sbin/route/rtutil.h: revision 1.1
usr.bin/netstat/mroute6.c: revision 1.15
sbin/route/extern.h: revision 1.15
usr.bin/netstat/show.c: file removal
usr.bin/netstat/main.c: revision 1.93
usr.bin/netstat/route.c: revision 1.83
usr.bin/netstat/netstat.h: revision 1.51
distrib/utils/x_route/Makefile: revision 1.18
sbin/route/show.c: revision 1.46
usr.bin/netstat/if.c: revision 1.80
sbin/route/route.c: revision 1.145
sbin/route/Makefile: revision 1.26
Factor out the netstat route printing code and use it here. There is no
point in having 2 different copies; fixes PR/49371

  /src/tests/kernel/kqueue/read/
t_ttypty.c 1.2.6.1 Fri Mar 01 18:59:58 UTC 2019 martin Pull up following revision(s) (requested by kamil in ticket #1201):

tests/kernel/kqueue/read/t_ttypty.c: revision 1.3
sys/kern/tty_pty.c: revision 1.145

Fix reporting EOF via kevent and add a test case

Fix the kernel pty driver to report closed slave via master's kevent
EVFILT_READ. This behavior matches the behavior for pipes, is
consistent with how FreeBSD implements it and is relied upon by LLDB's
main loop implementation.

Includes feedback by kre and kamil (from tech-kern), commit approved
by kamil.

  /src/share/man/man9/
paravirt_membar_sync.9 1.1.6.2 Sun Oct 19 10:44:31 UTC 2025 martin Pull up following revision(s) (requested by riastradh in ticket #60):

sys/arch/sparc/sparc/locore.s: revision 1.287
share/man/man9/Makefile: revision 1.475
sys/arch/mips/mips/cpu_subr.c: revision 1.65
sys/arch/mips/mips/cpu_subr.c: revision 1.66
sys/arch/amd64/amd64/cpufunc.S: revision 1.70
sys/arch/hppa/hppa/support.S: revision 1.9
sys/arch/alpha/alpha/locore.s: revision 1.145
share/man/man9/paravirt_membar_sync.9: revision 1.1
sys/arch/sparc64/sparc64/locore.s: revision 1.436
distrib/sets/lists/comp/mi: revision 1.2499
sys/arch/i386/i386/cpufunc.S: revision 1.54
sys/sys/paravirt_membar.h: revision 1.1
sys/arch/arm/arm/cpu_subr.c: revision 1.6
(all via patch)

paravirt_membar_sync(9): New memory barrier.

For use in paravirtualized drivers which require store-before-load
ordering -- irrespective of whether the kernel is built for a single
processor, or whether the (virtual) machine is booted with a single
processor.

This is even required on architectures that don't even have a
store-before-load ordering barrier, like m68k; adding, e.g., a virtio
bus is _as if_ the architecture has been extended with relaxed memory
ordering when talking with that new bus. Such architectures need
some way to request the hypervisor enforce that ordering -- on m68k,
that's done by issuing a CASL instruction, which qemu maps to an
atomic r/m/w with sequential consistency ordering in the host.

PR kern/59618: occasional virtio block device lock ups/hangs

mips: Fix asm arch options in new paravirt_membar_sync.
Need to explicitly enable mips2 (MIPS-II) instructions in order to
use sync. Fixes:
/tmp/ccxgOmXc.s: Assembler messages:
/tmp/ccxgOmXc.s:3576: Error: opcode not supported on this processor: mips1 (mips1) `sync'
--- cpu_subr.o ---
*** Failed target: cpu_subr.o

PR kern/59618: occasional virtio block device lock ups/hangs

1.1.4.2 Sun Oct 19 10:34:41 UTC 2025 martin Pull up following revision(s) (requested by riastradh in ticket #60):

sys/arch/sparc/sparc/locore.s: revision 1.287
share/man/man9/Makefile: revision 1.475
sys/arch/mips/mips/cpu_subr.c: revision 1.65
sys/arch/mips/mips/cpu_subr.c: revision 1.66
sys/arch/amd64/amd64/cpufunc.S: revision 1.70
common/lib/libc/arch/i386/atomic/atomic.S: revision 1.38
common/lib/libc/arch/sparc/atomic/membar_ops.S: revision 1.9
sys/arch/hppa/hppa/support.S: revision 1.9
sys/arch/alpha/alpha/locore.s: revision 1.145
share/man/man9/paravirt_membar_sync.9: revision 1.1
sys/arch/sparc64/sparc64/locore.s: revision 1.436
distrib/sets/lists/comp/mi: revision 1.2499
sys/arch/i386/i386/cpufunc.S: revision 1.54
common/lib/libc/arch/sparc64/atomic/membar_ops.S: revision 1.10
sys/sys/paravirt_membar.h: revision 1.1
sys/arch/arm/arm/cpu_subr.c: revision 1.6
common/lib/libc/arch/x86_64/atomic/atomic.S: revision 1.32
(all via patch)

paravirt_membar_sync(9): New memory barrier.

For use in paravirtualized drivers which require store-before-load
ordering -- irrespective of whether the kernel is built for a single
processor, or whether the (virtual) machine is booted with a single
processor.

This is even required on architectures that don't even have a
store-before-load ordering barrier, like m68k; adding, e.g., a virtio
bus is _as if_ the architecture has been extended with relaxed memory
ordering when talking with that new bus. Such architectures need
some way to request the hypervisor enforce that ordering -- on m68k,
that's done by issuing a CASL instruction, which qemu maps to an
atomic r/m/w with sequential consistency ordering in the host.

PR kern/59618: occasional virtio block device lock ups/hangs

mips: Fix asm arch options in new paravirt_membar_sync.
Need to explicitly enable mips2 (MIPS-II) instructions in order to
use sync. Fixes:
/tmp/ccxgOmXc.s: Assembler messages:
/tmp/ccxgOmXc.s:3576: Error: opcode not supported on this processor: mips1 (mips1) `sync'
--- cpu_subr.o ---
*** Failed target: cpu_subr.o

PR kern/59618: occasional virtio block device lock ups/hangs

1.1.2.2 Sun Oct 19 10:29:19 UTC 2025 martin Pull up following revision(s) (requested by riastradh in ticket #60):

sys/arch/sparc/sparc/locore.s: revision 1.287
share/man/man9/Makefile: revision 1.475
sys/arch/mips/mips/cpu_subr.c: revision 1.65
sys/arch/riscv/riscv/cpu_subr.c: revision 1.6
sys/arch/mips/mips/cpu_subr.c: revision 1.66
sys/arch/amd64/amd64/cpufunc.S: revision 1.70
common/lib/libc/arch/i386/atomic/atomic.S: revision 1.38
common/lib/libc/arch/sparc/atomic/membar_ops.S: revision 1.9
sys/arch/hppa/hppa/support.S: revision 1.9
sys/arch/alpha/alpha/locore.s: revision 1.145
share/man/man9/paravirt_membar_sync.9: revision 1.1
sys/arch/sparc64/sparc64/locore.s: revision 1.436
distrib/sets/lists/comp/mi: revision 1.2499
sys/arch/i386/i386/cpufunc.S: revision 1.54
common/lib/libc/arch/sparc64/atomic/membar_ops.S: revision 1.10
sys/sys/paravirt_membar.h: revision 1.1
sys/arch/arm/arm/cpu_subr.c: revision 1.6
sys/arch/virt68k/virt68k/locore.s: revision 1.17
common/lib/libc/arch/x86_64/atomic/atomic.S: revision 1.32

paravirt_membar_sync(9): New memory barrier.

For use in paravirtualized drivers which require store-before-load
ordering -- irrespective of whether the kernel is built for a single
processor, or whether the (virtual) machine is booted with a single
processor.

This is even required on architectures that don't even have a
store-before-load ordering barrier, like m68k; adding, e.g., a virtio
bus is _as if_ the architecture has been extended with relaxed memory
ordering when talking with that new bus. Such architectures need
some way to request the hypervisor enforce that ordering -- on m68k,
that's done by issuing a CASL instruction, which qemu maps to an
atomic r/m/w with sequential consistency ordering in the host.

PR kern/59618: occasional virtio block device lock ups/hangs

mips: Fix asm arch options in new paravirt_membar_sync.
Need to explicitly enable mips2 (MIPS-II) instructions in order to
use sync. Fixes:
/tmp/ccxgOmXc.s: Assembler messages:
/tmp/ccxgOmXc.s:3576: Error: opcode not supported on this processor: mips1 (mips1) `sync'
--- cpu_subr.o ---
*** Failed target: cpu_subr.o

PR kern/59618: occasional virtio block device lock ups/hangs

  /src/sys/arch/atari/include/
pcb.h 1.9 Thu Jan 01 04:10:25 UTC 2009 tsutsui Pull the following amiga's pmap changes to atari:
arch/amiga/amiga/amiga_init.c 1.95-1.97, 1.100-1.102
arch/amiga/amiga/pmap.c 1.123, 1.126-1.131, 1.142, 1.145
arch/amiga/amiga/pmap_bootstrap.c 1.1, 1.2, 1.3, 1.4
arch/amiga/conf/files.amiga 1.137
arch/amiga/include/pcb.h 1.16
arch/amiga/include/pmap.h 1.44
arch/amiga/include/pte.h 1.19
arch/amiga/include/vmparam.h 1.35

- change kernel address space layout (i.e. move Sysmap to the end of KVA)
to match other m68k ports, which should be done on yamt-km merge
- rework pmap_zero_page(), pmap_copy_page() and some more other functions
to make them compatible with m68k/pmap_motorola.c
- move pmap_bootstrap() into a separate file to allow using either
the atari pmap.c or the m68k common pmap_motorola.c
- use common m68k include files, pcb.h, pmap_motorola.h, and pte_motorola.h
- misc style and cosmetic changes

Most merge work is done by Tuomo Makinen, and
miscellaneous fixes and cleanups are done by me.

Tested on Falcon with both 68030 and 68060 by Tuomo, and
also tested on TT030 by David Ross on port-atari.

Should be pulled up to netbsd-4 (it requires at least Sysmap changes)
and netbsd-5.
1.6.24.1 Thu Jan 15 22:40:55 UTC 2009 bouyer Pull up following revision(s) (requested by tsutsui in ticket #1258):
sys/arch/atari/atari/atari_init.c: revision 1.68, 1.69, 1.70
sys/arch/atari/atari/pmap_bootstrap.c: revision 1.1
sys/arch/atari/include/pte.h: revision 1.8
sys/arch/atari/include/vmparam.h: revision 1.22
sys/arch/atari/include/pmap.h: revision 1.35, 1.37, 1.39 (via patch)
sys/arch/atari/atari/pmap.c: revision 1.106, 1.111 (via patch)
sys/arch/atari/atari/genassym.cf: revision 1.28
sys/arch/atari/conf/files.atari: revision 1.113
sys/arch/atari/include/pcb.h: revision 1.7, 1.8, 1.9
Replace the Mach-derived boolean_t type with the C99 bool type. A
future commit will replace use of TRUE and FALSE with true and false.
Kill caddr_t; there will be some MI fallout, but it will be fixed shortly.
Remove bogus DEBUG uvm_map() calls - (sync with amiga pmap). From Tuomo
Remove quite obsolete pcb_cmap2.
Pull the following amiga's pmap changes to atari:
arch/amiga/amiga/amiga_init.c 1.95-1.97, 1.100-1.102
arch/amiga/amiga/pmap.c 1.123, 1.126-1.131, 1.142, 1.145
arch/amiga/amiga/pmap_bootstrap.c 1.1, 1.2, 1.3, 1.4
arch/amiga/conf/files.amiga 1.137
arch/amiga/include/pcb.h 1.16
arch/amiga/include/pmap.h 1.44
arch/amiga/include/pte.h 1.19
arch/amiga/include/vmparam.h 1.35
- change kernel address space layout (i.e. move Sysmap to the end of KVA)
to match other m68k ports, which should be done on yamt-km merge
- rework pmap_zero_page(), pmap_copy_page() and some more other functions
to make them compatible with m68k/pmap_motorola.c
- move pmap_bootstrap() into a separate file to allow using either
the atari pmap.c or the m68k common pmap_motorola.c
- use common m68k include files, pcb.h, pmap_motorola.h, and pte_motorola.h
- misc style and cosmetic changes
Most merge work is done by Tuomo Makinen, and
miscellaneous fixes and cleanups are done by me.
Tested on Falcon with both 68030 and 68060 by Tuomo, and
also tested on TT030 by David Ross on port-atari.
Should be pulled up to netbsd-4 (it requires at least Sysmap changes)
and netbsd-5.
Update one more comment which was missed in previous.
1.7.54.2 Thu Jan 08 22:45:30 UTC 2009 snj Pull up following revision(s) (requested by tsutsui in ticket #230):
sys/arch/atari/atari/atari_init.c: revision 1.69
sys/arch/atari/atari/pmap.c: revision 1.111 via patch
sys/arch/atari/atari/pmap_bootstrap.c: revision 1.1
sys/arch/atari/conf/files.atari: revision 1.113
sys/arch/atari/include/pcb.h: revision 1.9
sys/arch/atari/include/pmap.h: revision 1.39 via patch
sys/arch/atari/include/pte.h: revision 1.8
sys/arch/atari/include/vmparam.h: revision 1.22
Pull the following amiga's pmap changes to atari:
arch/amiga/amiga/amiga_init.c 1.95-1.97, 1.100-1.102
arch/amiga/amiga/pmap.c 1.123, 1.126-1.131, 1.142, 1.145
arch/amiga/amiga/pmap_bootstrap.c 1.1, 1.2, 1.3, 1.4
arch/amiga/conf/files.amiga 1.137
arch/amiga/include/pcb.h 1.16
arch/amiga/include/pmap.h 1.44
arch/amiga/include/pte.h 1.19
arch/amiga/include/vmparam.h 1.35
- change kernel address space layout (i.e. move Sysmap to the end of KVA)
to match other m68k ports, which should be done on yamt-km merge
- rework pmap_zero_page(), pmap_copy_page() and some more other functions
to make them compatible with m68k/pmap_motorola.c
- move pmap_bootstrap() into a separate file to allow using either
the atari pmap.c or the m68k common pmap_motorola.c
- use common m68k include files, pcb.h, pmap_motorola.h, and
pte_motorola.h
- misc style and cosmetic changes
Most merge work is done by Tuomo Makinen, and
miscellaneous fixes and cleanups are done by me.
Tested on Falcon with both 68030 and 68060 by Tuomo, and
also tested on TT030 by David Ross on port-atari.
Should be pulled up to netbsd-4 (it requires at least Sysmap changes)
and netbsd-5.
pte.h 1.8 Thu Jan 01 04:10:25 UTC 2009 tsutsui Pull the following amiga's pmap changes to atari:
arch/amiga/amiga/amiga_init.c 1.95-1.97, 1.100-1.102
arch/amiga/amiga/pmap.c 1.123, 1.126-1.131, 1.142, 1.145
arch/amiga/amiga/pmap_bootstrap.c 1.1, 1.2, 1.3, 1.4
arch/amiga/conf/files.amiga 1.137
arch/amiga/include/pcb.h 1.16
arch/amiga/include/pmap.h 1.44
arch/amiga/include/pte.h 1.19
arch/amiga/include/vmparam.h 1.35

- change kernel address space layout (i.e. move Sysmap to the end of KVA)
to match other m68k ports, which should be done on yamt-km merge
- rework pmap_zero_page(), pmap_copy_page() and some more other functions
to make them compatible with m68k/pmap_motorola.c
- move pmap_bootstrap() into a separate file to allow using either
the atari pmap.c or the m68k common pmap_motorola.c
- use common m68k include files, pcb.h, pmap_motorola.h, and pte_motorola.h
- misc style and cosmetic changes

Most merge work is done by Tuomo Makinen, and
miscellaneous fixes and cleanups are done by me.

Tested on Falcon with both 68030 and 68060 by Tuomo, and
also tested on TT030 by David Ross on port-atari.

Should be pulled up to netbsd-4 (it requires at least Sysmap changes)
and netbsd-5.
1.7.88.1 Thu Jan 08 22:45:30 UTC 2009 snj Pull up following revision(s) (requested by tsutsui in ticket #230):
sys/arch/atari/atari/atari_init.c: revision 1.69
sys/arch/atari/atari/pmap.c: revision 1.111 via patch
sys/arch/atari/atari/pmap_bootstrap.c: revision 1.1
sys/arch/atari/conf/files.atari: revision 1.113
sys/arch/atari/include/pcb.h: revision 1.9
sys/arch/atari/include/pmap.h: revision 1.39 via patch
sys/arch/atari/include/pte.h: revision 1.8
sys/arch/atari/include/vmparam.h: revision 1.22
Pull the following amiga's pmap changes to atari:
arch/amiga/amiga/amiga_init.c 1.95-1.97, 1.100-1.102
arch/amiga/amiga/pmap.c 1.123, 1.126-1.131, 1.142, 1.145
arch/amiga/amiga/pmap_bootstrap.c 1.1, 1.2, 1.3, 1.4
arch/amiga/conf/files.amiga 1.137
arch/amiga/include/pcb.h 1.16
arch/amiga/include/pmap.h 1.44
arch/amiga/include/pte.h 1.19
arch/amiga/include/vmparam.h 1.35
- change kernel address space layout (i.e. move Sysmap to the end of KVA)
to match other m68k ports, which should be done on yamt-km merge
- rework pmap_zero_page(), pmap_copy_page() and some more other functions
to make them compatible with m68k/pmap_motorola.c
- move pmap_bootstrap() into a separate file to allow using either
the atari pmap.c or the m68k common pmap_motorola.c
- use common m68k include files, pcb.h, pmap_motorola.h, and
pte_motorola.h
- misc style and cosmetic changes
Most merge work is done by Tuomo Makinen, and
miscellaneous fixes and cleanups are done by me.
Tested on Falcon with both 68030 and 68060 by Tuomo, and
also tested on TT030 by David Ross on port-atari.
Should be pulled up to netbsd-4 (it requires at least Sysmap changes)
and netbsd-5.
1.7.24.2 Thu Jan 15 22:48:48 UTC 2009 bouyer Pull up following revision(s) (requested by tsutsui in ticket #1258):
sys/arch/atari/atari/atari_init.c: revision 1.68, 1.69, 1.70
sys/arch/atari/atari/pmap_bootstrap.c: revision 1.1
sys/arch/atari/include/pte.h: revision 1.8
sys/arch/atari/include/vmparam.h: revision 1.22
sys/arch/atari/include/pmap.h: revision 1.35, 1.37, 1.39 (via patch)
sys/arch/atari/atari/pmap.c: revision 1.106, 1.111 (via patch)
sys/arch/atari/atari/genassym.cf: revision 1.28
sys/arch/atari/conf/files.atari: revision 1.113
sys/arch/atari/include/pcb.h: revision 1.7, 1.8, 1.9
Replace the Mach-derived boolean_t type with the C99 bool type. A
future commit will replace use of TRUE and FALSE with true and false.
Kill caddr_t; there will be some MI fallout, but it will be fixed shortly.
Remove bogus DEBUG uvm_map() calls - (sync with amiga pmap). From Tuomo
Remove quite obsolete pcb_cmap2.
Pull the following amiga's pmap changes to atari:
arch/amiga/amiga/amiga_init.c 1.95-1.97, 1.100-1.102
arch/amiga/amiga/pmap.c 1.123, 1.126-1.131, 1.142, 1.145
arch/amiga/amiga/pmap_bootstrap.c 1.1, 1.2, 1.3, 1.4
arch/amiga/conf/files.amiga 1.137
arch/amiga/include/pcb.h 1.16
arch/amiga/include/pmap.h 1.44
arch/amiga/include/pte.h 1.19
arch/amiga/include/vmparam.h 1.35
- change kernel address space layout (i.e. move Sysmap to the end of KVA)
to match other m68k ports, which should be done on yamt-km merge
- rework pmap_zero_page(), pmap_copy_page() and some more other functions
to make them compatible with m68k/pmap_motorola.c
- move pmap_bootstrap() into a separate file to allow using either
the atari pmap.c or the m68k common pmap_motorola.c
- use common m68k include files, pcb.h, pmap_motorola.h, and pte_motorola.h
- misc style and cosmetic changes
Most merge work is done by Tuomo Makinen, and
miscellaneous fixes and cleanups are done by me.
Tested on Falcon with both 68030 and 68060 by Tuomo, and
also tested on TT030 by David Ross on port-atari.
Should be pulled up to netbsd-4 (it requires at least Sysmap changes)
and netbsd-5.
Update one more comment which was missed in previous.
1.7.24.1 Thu Jan 15 22:40:54 UTC 2009 bouyer Pull up following revision(s) (requested by tsutsui in ticket #1258):
sys/arch/atari/atari/atari_init.c: revision 1.68, 1.69, 1.70
sys/arch/atari/atari/pmap_bootstrap.c: revision 1.1
sys/arch/atari/include/pte.h: revision 1.8
sys/arch/atari/include/vmparam.h: revision 1.22
sys/arch/atari/include/pmap.h: revision 1.35, 1.37, 1.39 (via patch)
sys/arch/atari/atari/pmap.c: revision 1.106, 1.111 (via patch)
sys/arch/atari/atari/genassym.cf: revision 1.28
sys/arch/atari/conf/files.atari: revision 1.113
sys/arch/atari/include/pcb.h: revision 1.7, 1.8, 1.9
Replace the Mach-derived boolean_t type with the C99 bool type. A
future commit will replace use of TRUE and FALSE with true and false.
Kill caddr_t; there will be some MI fallout, but it will be fixed shortly.
Remove bogus DEBUG uvm_map() calls - (sync with amiga pmap). From Tuomo
Remove quite obsolete pcb_cmap2.
Pull the following amiga's pmap changes to atari:
arch/amiga/amiga/amiga_init.c 1.95-1.97, 1.100-1.102
arch/amiga/amiga/pmap.c 1.123, 1.126-1.131, 1.142, 1.145
arch/amiga/amiga/pmap_bootstrap.c 1.1, 1.2, 1.3, 1.4
arch/amiga/conf/files.amiga 1.137
arch/amiga/include/pcb.h 1.16
arch/amiga/include/pmap.h 1.44
arch/amiga/include/pte.h 1.19
arch/amiga/include/vmparam.h 1.35
- change kernel address space layout (i.e. move Sysmap to the end of KVA)
to match other m68k ports, which should be done on yamt-km merge
- rework pmap_zero_page(), pmap_copy_page() and some more other functions
to make them compatible with m68k/pmap_motorola.c
- move pmap_bootstrap() into a separate file to allow using either
the atari pmap.c or the m68k common pmap_motorola.c
- use common m68k include files, pcb.h, pmap_motorola.h, and pte_motorola.h
- misc style and cosmetic changes
Most merge work is done by Tuomo Makinen, and
miscellaneous fixes and cleanups are done by me.
Tested on Falcon with both 68030 and 68060 by Tuomo, and
also tested on TT030 by David Ross on port-atari.
Should be pulled up to netbsd-4 (it requires at least Sysmap changes)
and netbsd-5.
Update one more comment which was missed in previous.
pmap.h 1.39 Thu Jan 01 04:10:25 UTC 2009 tsutsui branches: 1.39.2;
Pull the following amiga's pmap changes to atari:
arch/amiga/amiga/amiga_init.c 1.95-1.97, 1.100-1.102
arch/amiga/amiga/pmap.c 1.123, 1.126-1.131, 1.142, 1.145
arch/amiga/amiga/pmap_bootstrap.c 1.1, 1.2, 1.3, 1.4
arch/amiga/conf/files.amiga 1.137
arch/amiga/include/pcb.h 1.16
arch/amiga/include/pmap.h 1.44
arch/amiga/include/pte.h 1.19
arch/amiga/include/vmparam.h 1.35

- change kernel address space layout (i.e. move Sysmap to the end of KVA)
to match other m68k ports, which should be done on yamt-km merge
- rework pmap_zero_page(), pmap_copy_page() and some more other functions
to make them compatible with m68k/pmap_motorola.c
- move pmap_bootstrap() into a separate file to allow using either
the atari pmap.c or the m68k common pmap_motorola.c
- use common m68k include files, pcb.h, pmap_motorola.h, and pte_motorola.h
- misc style and cosmetic changes

Most merge work is done by Tuomo Makinen, and
miscellaneous fixes and cleanups are done by me.

Tested on Falcon with both 68030 and 68060 by Tuomo, and
also tested on TT030 by David Ross on port-atari.

Should be pulled up to netbsd-4 (it requires at least Sysmap changes)
and netbsd-5.

1.34.18.1 Thu Jan 15 22:40:55 UTC 2009 bouyer Pull up following revision(s) (requested by tsutsui in ticket #1258):
sys/arch/atari/atari/atari_init.c: revision 1.68, 1.69, 1.70
sys/arch/atari/atari/pmap_bootstrap.c: revision 1.1
sys/arch/atari/include/pte.h: revision 1.8
sys/arch/atari/include/vmparam.h: revision 1.22
sys/arch/atari/include/pmap.h: revision 1.35, 1.37, 1.39 (via patch)
sys/arch/atari/atari/pmap.c: revision 1.106, 1.111 (via patch)
sys/arch/atari/atari/genassym.cf: revision 1.28
sys/arch/atari/conf/files.atari: revision 1.113
sys/arch/atari/include/pcb.h: revision 1.7, 1.8, 1.9
Replace the Mach-derived boolean_t type with the C99 bool type. A
future commit will replace use of TRUE and FALSE with true and false.
Kill caddr_t; there will be some MI fallout, but it will be fixed shortly.
Remove bogus DEBUG uvm_map() calls - (sync with amiga pmap). From Tuomo
Remove quite obsolete pcb_cmap2.
Pull the following amiga's pmap changes to atari:
arch/amiga/amiga/amiga_init.c 1.95-1.97, 1.100-1.102
arch/amiga/amiga/pmap.c 1.123, 1.126-1.131, 1.142, 1.145
arch/amiga/amiga/pmap_bootstrap.c 1.1, 1.2, 1.3, 1.4
arch/amiga/conf/files.amiga 1.137
arch/amiga/include/pcb.h 1.16
arch/amiga/include/pmap.h 1.44
arch/amiga/include/pte.h 1.19
arch/amiga/include/vmparam.h 1.35
- change kernel address space layout (i.e. move Sysmap to the end of KVA)
to match other m68k ports, which should be done on yamt-km merge
- rework pmap_zero_page(), pmap_copy_page() and some more other functions
to make them compatible with m68k/pmap_motorola.c
- move pmap_bootstrap() into a separate file to allow using either
the atari pmap.c or the m68k common pmap_motorola.c
- use common m68k include files, pcb.h, pmap_motorola.h, and pte_motorola.h
- misc style and cosmetic changes
Most merge work is done by Tuomo Makinen, and
miscellaneous fixes and cleanups are done by me.
Tested on Falcon with both 68030 and 68060 by Tuomo, and
also tested on TT030 by David Ross on port-atari.
Should be pulled up to netbsd-4 (it requires at least Sysmap changes)
and netbsd-5.
Update one more comment which was missed in previous.

1.36.20.2 Thu Jan 08 22:45:30 UTC 2009 snj Pull up following revision(s) (requested by tsutsui in ticket #230):
sys/arch/atari/atari/atari_init.c: revision 1.69
sys/arch/atari/atari/pmap.c: revision 1.111 via patch
sys/arch/atari/atari/pmap_bootstrap.c: revision 1.1
sys/arch/atari/conf/files.atari: revision 1.113
sys/arch/atari/include/pcb.h: revision 1.9
sys/arch/atari/include/pmap.h: revision 1.39 via patch
sys/arch/atari/include/pte.h: revision 1.8
sys/arch/atari/include/vmparam.h: revision 1.22
Pull the following amiga's pmap changes to atari:
arch/amiga/amiga/amiga_init.c 1.95-1.97, 1.100-1.102
arch/amiga/amiga/pmap.c 1.123, 1.126-1.131, 1.142, 1.145
arch/amiga/amiga/pmap_bootstrap.c 1.1, 1.2, 1.3, 1.4
arch/amiga/conf/files.amiga 1.137
arch/amiga/include/pcb.h 1.16
arch/amiga/include/pmap.h 1.44
arch/amiga/include/pte.h 1.19
arch/amiga/include/vmparam.h 1.35
- change kernel address space layout (i.e. move Sysmap to the end of KVA)
to match other m68k ports, which should be done on yamt-km merge
- rework pmap_zero_page(), pmap_copy_page() and some more other functions
to make them compatible with m68k/pmap_motorola.c
- move pmap_bootstrap() into a separate file to allow using either
the atari pmap.c or the m68k common pmap_motorola.c
- use common m68k include files, pcb.h, pmap_motorola.h, and
pte_motorola.h
- misc style and cosmetic changes
Most merge work is done by Tuomo Makinen, and
miscellaneous fixes and cleanups are done by me.
Tested on Falcon with both 68030 and 68060 by Tuomo, and
also tested on TT030 by David Ross on port-atari.
Should be pulled up to netbsd-4 (it requires at least Sysmap changes)
and netbsd-5.

  /src/sys/sys/
paravirt_membar.h 1.1.6.2 Sun Oct 19 10:44:33 UTC 2025 martin Pull up following revision(s) (requested by riastradh in ticket #60):

sys/arch/sparc/sparc/locore.s: revision 1.287
share/man/man9/Makefile: revision 1.475
sys/arch/mips/mips/cpu_subr.c: revision 1.65
sys/arch/mips/mips/cpu_subr.c: revision 1.66
sys/arch/amd64/amd64/cpufunc.S: revision 1.70
sys/arch/hppa/hppa/support.S: revision 1.9
sys/arch/alpha/alpha/locore.s: revision 1.145
share/man/man9/paravirt_membar_sync.9: revision 1.1
sys/arch/sparc64/sparc64/locore.s: revision 1.436
distrib/sets/lists/comp/mi: revision 1.2499
sys/arch/i386/i386/cpufunc.S: revision 1.54
sys/sys/paravirt_membar.h: revision 1.1
sys/arch/arm/arm/cpu_subr.c: revision 1.6
(all via patch)

paravirt_membar_sync(9): New memory barrier.

For use in paravirtualized drivers which require store-before-load
ordering -- irrespective of whether the kernel is built for a single
processor, or whether the (virtual) machine is booted with a single
processor.

This is even required on architectures that don't even have a
store-before-load ordering barrier, like m68k; adding, e.g., a virtio
bus is _as if_ the architecture has been extended with relaxed memory
ordering when talking with that new bus. Such architectures need
some way to request the hypervisor enforce that ordering -- on m68k,
that's done by issuing a CASL instruction, which qemu maps to an
atomic r/m/w with sequential consistency ordering in the host.

PR kern/59618: occasional virtio block device lock ups/hangs

mips: Fix asm arch options in new paravirt_membar_sync.
Need to explicitly enable mips2 (MIPS-II) instructions in order to
use sync. Fixes:
/tmp/ccxgOmXc.s: Assembler messages:
/tmp/ccxgOmXc.s:3576: Error: opcode not supported on this processor: mips1 (mips1) `sync'
--- cpu_subr.o ---
*** Failed target: cpu_subr.o

PR kern/59618: occasional virtio block device lock ups/hangs

1.1.4.2 Sun Oct 19 10:34:43 UTC 2025 martin Pull up following revision(s) (requested by riastradh in ticket #60):

sys/arch/sparc/sparc/locore.s: revision 1.287
share/man/man9/Makefile: revision 1.475
sys/arch/mips/mips/cpu_subr.c: revision 1.65
sys/arch/mips/mips/cpu_subr.c: revision 1.66
sys/arch/amd64/amd64/cpufunc.S: revision 1.70
common/lib/libc/arch/i386/atomic/atomic.S: revision 1.38
common/lib/libc/arch/sparc/atomic/membar_ops.S: revision 1.9
sys/arch/hppa/hppa/support.S: revision 1.9
sys/arch/alpha/alpha/locore.s: revision 1.145
share/man/man9/paravirt_membar_sync.9: revision 1.1
sys/arch/sparc64/sparc64/locore.s: revision 1.436
distrib/sets/lists/comp/mi: revision 1.2499
sys/arch/i386/i386/cpufunc.S: revision 1.54
common/lib/libc/arch/sparc64/atomic/membar_ops.S: revision 1.10
sys/sys/paravirt_membar.h: revision 1.1
sys/arch/arm/arm/cpu_subr.c: revision 1.6
common/lib/libc/arch/x86_64/atomic/atomic.S: revision 1.32
(all via patch)

paravirt_membar_sync(9): New memory barrier.

For use in paravirtualized drivers which require store-before-load
ordering -- irrespective of whether the kernel is built for a single
processor, or whether the (virtual) machine is booted with a single
processor.

This is even required on architectures that don't even have a
store-before-load ordering barrier, like m68k; adding, e.g., a virtio
bus is _as if_ the architecture has been extended with relaxed memory
ordering when talking with that new bus. Such architectures need
some way to request the hypervisor enforce that ordering -- on m68k,
that's done by issuing a CASL instruction, which qemu maps to an
atomic r/m/w with sequential consistency ordering in the host.

PR kern/59618: occasional virtio block device lock ups/hangs

mips: Fix asm arch options in new paravirt_membar_sync.
Need to explicitly enable mips2 (MIPS-II) instructions in order to
use sync. Fixes:
/tmp/ccxgOmXc.s: Assembler messages:
/tmp/ccxgOmXc.s:3576: Error: opcode not supported on this processor: mips1 (mips1) `sync'
--- cpu_subr.o ---
*** Failed target: cpu_subr.o

PR kern/59618: occasional virtio block device lock ups/hangs

1.1.2.2 Sun Oct 19 10:29:21 UTC 2025 martin Pull up following revision(s) (requested by riastradh in ticket #60):

sys/arch/sparc/sparc/locore.s: revision 1.287
share/man/man9/Makefile: revision 1.475
sys/arch/mips/mips/cpu_subr.c: revision 1.65
sys/arch/riscv/riscv/cpu_subr.c: revision 1.6
sys/arch/mips/mips/cpu_subr.c: revision 1.66
sys/arch/amd64/amd64/cpufunc.S: revision 1.70
common/lib/libc/arch/i386/atomic/atomic.S: revision 1.38
common/lib/libc/arch/sparc/atomic/membar_ops.S: revision 1.9
sys/arch/hppa/hppa/support.S: revision 1.9
sys/arch/alpha/alpha/locore.s: revision 1.145
share/man/man9/paravirt_membar_sync.9: revision 1.1
sys/arch/sparc64/sparc64/locore.s: revision 1.436
distrib/sets/lists/comp/mi: revision 1.2499
sys/arch/i386/i386/cpufunc.S: revision 1.54
common/lib/libc/arch/sparc64/atomic/membar_ops.S: revision 1.10
sys/sys/paravirt_membar.h: revision 1.1
sys/arch/arm/arm/cpu_subr.c: revision 1.6
sys/arch/virt68k/virt68k/locore.s: revision 1.17
common/lib/libc/arch/x86_64/atomic/atomic.S: revision 1.32

paravirt_membar_sync(9): New memory barrier.

For use in paravirtualized drivers which require store-before-load
ordering -- irrespective of whether the kernel is built for a single
processor, or whether the (virtual) machine is booted with a single
processor.

This is even required on architectures that don't even have a
store-before-load ordering barrier, like m68k; adding, e.g., a virtio
bus is _as if_ the architecture has been extended with relaxed memory
ordering when talking with that new bus. Such architectures need
some way to request the hypervisor enforce that ordering -- on m68k,
that's done by issuing a CASL instruction, which qemu maps to an
atomic r/m/w with sequential consistency ordering in the host.

PR kern/59618: occasional virtio block device lock ups/hangs

mips: Fix asm arch options in new paravirt_membar_sync.
Need to explicitly enable mips2 (MIPS-II) instructions in order to
use sync. Fixes:
/tmp/ccxgOmXc.s: Assembler messages:
/tmp/ccxgOmXc.s:3576: Error: opcode not supported on this processor: mips1 (mips1) `sync'
--- cpu_subr.o ---
*** Failed target: cpu_subr.o

PR kern/59618: occasional virtio block device lock ups/hangs

  /src/share/man/man4/
ug.4 1.3.2.2 Fri Jan 12 23:16:49 UTC 2007 bouyer Pull up following revision(s) (requested by xtraeme in ticket #341):
distrib/sets/lists/man/mi: revision 1.965
share/man/man4/ug.4: revision 1.1
sys/dev/isa/files.isa: revision 1.145
sys/arch/amd64/conf/GENERIC: revision 1.124
sys/dev/isa/ug.c: revision 1.1
sys/dev/isa/ugvar.h: revision 1.1
share/man/man4/envsys.4: revision 1.21
share/man/man4/Makefile: revision 1.418
Driver for the Abit uGuru Hardware system monitor, contributed by
Mihai Chelaru. Minor changes (simplification and KNF) by me.
Thanks.
Add ug0 at isa? commented out (driver for the Abit uGuru
Hardware system monitor).
ug(4): manual page for the Abit uGuru hardware system monitor
(wiz please review, thanks).
+ ug(4)

  /src/share/mk/
bsd.x11.mk 1.145 Fri Jul 15 09:11:02 UTC 2022 mrg branches: 1.145.2;
update for xorg-server 21.1.4.
Fri Jul 15 09:11:02 UTC 2022 mrg branches: 1.145.2;
update for xorg-server 21.1.4.
1.145.2.10 Thu Dec 18 18:57:38 UTC 2025 martin Apply patch, requested by mrg in ticket #1210

share/mk/bsd.x11.mk

Bump version of xorg-server to 21.1.21
1.145.2.9 Fri Jun 27 09:51:14 UTC 2025 martin Pull up following revision(s) (requested by mrg in ticket #1130):

share/mk/bsd.x11.mk: revision 1.162

bump for xorg-server 21.1.18.
1.145.2.8 Thu Feb 27 10:19:08 UTC 2025 martin Apply patch, requested by mrg in ticket #1067:

share/mk/bsd.x11.mk (apply patch)

Bump Xorg server to 21.1.16
1.145.2.7 Sat Nov 02 10:56:09 UTC 2024 martin Apply patch, requested by mrg in ticket #998

share/mk/bsd.x11.mk (apply patch)

Bump Xorg server version to 21.1.14
1.145.2.6 Wed Apr 17 18:02:23 UTC 2024 martin Pull up following revision(s) (requested by riastradh in ticket #654):

share/mk/bsd.lib.mk: revision 1.398
share/mk/bsd.lib.mk: revision 1.399
share/mk/bsd.x11.mk: revision 1.152
(via patch)

PR/58104: Kouichi Hashikawa: Use ${TOOL_AWK}

Back-out unintented commit.
1.145.2.5 Thu Oct 26 15:23:02 UTC 2023 martin Pull up following revision(s) (requested by mrg in ticket #436):

share/mk/bsd.x11.mk: revision 1.151

bump xorg server version.
1.145.2.4 Sun Jul 30 00:06:55 UTC 2023 martin Pull up following revision(s) (requested by mrg in ticket #261):

share/mk/bsd.x11.mk: revision 1.147

properly prefix ${X11INCDIR} uses with ${DESTDIR}.

this fixes a build issue seen where the host pixman.h was included,
and has been problem ever since tsutsui fixed my original code (from
2008) about 29 months ago. i'm surprised this has not been seen
anywhere else in that time.
1.145.2.3 Sat Apr 01 15:22:46 UTC 2023 martin Pull up following revision(s) (requested by mrg in ticket #135):

share/mk/bsd.x11.mk: revision 1.150

bump XORG_SERVER_TEENY.
  /src/sys/arch/hppa/hppa/
support.S 1.7.30.2 Sun Oct 19 10:34:41 UTC 2025 martin Pull up following revision(s) (requested by riastradh in ticket #60):

sys/arch/sparc/sparc/locore.s: revision 1.287
share/man/man9/Makefile: revision 1.475
sys/arch/mips/mips/cpu_subr.c: revision 1.65
sys/arch/mips/mips/cpu_subr.c: revision 1.66
sys/arch/amd64/amd64/cpufunc.S: revision 1.70
common/lib/libc/arch/i386/atomic/atomic.S: revision 1.38
common/lib/libc/arch/sparc/atomic/membar_ops.S: revision 1.9
sys/arch/hppa/hppa/support.S: revision 1.9
sys/arch/alpha/alpha/locore.s: revision 1.145
share/man/man9/paravirt_membar_sync.9: revision 1.1
sys/arch/sparc64/sparc64/locore.s: revision 1.436
distrib/sets/lists/comp/mi: revision 1.2499
sys/arch/i386/i386/cpufunc.S: revision 1.54
common/lib/libc/arch/sparc64/atomic/membar_ops.S: revision 1.10
sys/sys/paravirt_membar.h: revision 1.1
sys/arch/arm/arm/cpu_subr.c: revision 1.6
common/lib/libc/arch/x86_64/atomic/atomic.S: revision 1.32
(all via patch)

paravirt_membar_sync(9): New memory barrier.

For use in paravirtualized drivers which require store-before-load
ordering -- irrespective of whether the kernel is built for a single
processor, or whether the (virtual) machine is booted with a single
processor.

This is even required on architectures that don't even have a
store-before-load ordering barrier, like m68k; adding, e.g., a virtio
bus is _as if_ the architecture has been extended with relaxed memory
ordering when talking with that new bus. Such architectures need
some way to request the hypervisor enforce that ordering -- on m68k,
that's done by issuing a CASL instruction, which qemu maps to an
atomic r/m/w with sequential consistency ordering in the host.

PR kern/59618: occasional virtio block device lock ups/hangs

mips: Fix asm arch options in new paravirt_membar_sync.
Need to explicitly enable mips2 (MIPS-II) instructions in order to
use sync. Fixes:
/tmp/ccxgOmXc.s: Assembler messages:
/tmp/ccxgOmXc.s:3576: Error: opcode not supported on this processor: mips1 (mips1) `sync'
--- cpu_subr.o ---
*** Failed target: cpu_subr.o

PR kern/59618: occasional virtio block device lock ups/hangs

1.7.4.1 Sun Oct 19 10:44:31 UTC 2025 martin Pull up following revision(s) (requested by riastradh in ticket #60):

sys/arch/sparc/sparc/locore.s: revision 1.287
share/man/man9/Makefile: revision 1.475
sys/arch/mips/mips/cpu_subr.c: revision 1.65
sys/arch/mips/mips/cpu_subr.c: revision 1.66
sys/arch/amd64/amd64/cpufunc.S: revision 1.70
sys/arch/hppa/hppa/support.S: revision 1.9
sys/arch/alpha/alpha/locore.s: revision 1.145
share/man/man9/paravirt_membar_sync.9: revision 1.1
sys/arch/sparc64/sparc64/locore.s: revision 1.436
distrib/sets/lists/comp/mi: revision 1.2499
sys/arch/i386/i386/cpufunc.S: revision 1.54
sys/sys/paravirt_membar.h: revision 1.1
sys/arch/arm/arm/cpu_subr.c: revision 1.6
(all via patch)

paravirt_membar_sync(9): New memory barrier.

For use in paravirtualized drivers which require store-before-load
ordering -- irrespective of whether the kernel is built for a single
processor, or whether the (virtual) machine is booted with a single
processor.

This is even required on architectures that don't even have a
store-before-load ordering barrier, like m68k; adding, e.g., a virtio
bus is _as if_ the architecture has been extended with relaxed memory
ordering when talking with that new bus. Such architectures need
some way to request the hypervisor enforce that ordering -- on m68k,
that's done by issuing a CASL instruction, which qemu maps to an
atomic r/m/w with sequential consistency ordering in the host.

PR kern/59618: occasional virtio block device lock ups/hangs

mips: Fix asm arch options in new paravirt_membar_sync.
Need to explicitly enable mips2 (MIPS-II) instructions in order to
use sync. Fixes:
/tmp/ccxgOmXc.s: Assembler messages:
/tmp/ccxgOmXc.s:3576: Error: opcode not supported on this processor: mips1 (mips1) `sync'
--- cpu_subr.o ---
*** Failed target: cpu_subr.o

PR kern/59618: occasional virtio block device lock ups/hangs

1.8.2.1 Sun Oct 19 10:29:20 UTC 2025 martin Pull up following revision(s) (requested by riastradh in ticket #60):

sys/arch/sparc/sparc/locore.s: revision 1.287
share/man/man9/Makefile: revision 1.475
sys/arch/mips/mips/cpu_subr.c: revision 1.65
sys/arch/riscv/riscv/cpu_subr.c: revision 1.6
sys/arch/mips/mips/cpu_subr.c: revision 1.66
sys/arch/amd64/amd64/cpufunc.S: revision 1.70
common/lib/libc/arch/i386/atomic/atomic.S: revision 1.38
common/lib/libc/arch/sparc/atomic/membar_ops.S: revision 1.9
sys/arch/hppa/hppa/support.S: revision 1.9
sys/arch/alpha/alpha/locore.s: revision 1.145
share/man/man9/paravirt_membar_sync.9: revision 1.1
sys/arch/sparc64/sparc64/locore.s: revision 1.436
distrib/sets/lists/comp/mi: revision 1.2499
sys/arch/i386/i386/cpufunc.S: revision 1.54
common/lib/libc/arch/sparc64/atomic/membar_ops.S: revision 1.10
sys/sys/paravirt_membar.h: revision 1.1
sys/arch/arm/arm/cpu_subr.c: revision 1.6
sys/arch/virt68k/virt68k/locore.s: revision 1.17
common/lib/libc/arch/x86_64/atomic/atomic.S: revision 1.32

paravirt_membar_sync(9): New memory barrier.

For use in paravirtualized drivers which require store-before-load
ordering -- irrespective of whether the kernel is built for a single
processor, or whether the (virtual) machine is booted with a single
processor.

This is even required on architectures that don't even have a
store-before-load ordering barrier, like m68k; adding, e.g., a virtio
bus is _as if_ the architecture has been extended with relaxed memory
ordering when talking with that new bus. Such architectures need
some way to request the hypervisor enforce that ordering -- on m68k,
that's done by issuing a CASL instruction, which qemu maps to an
atomic r/m/w with sequential consistency ordering in the host.

PR kern/59618: occasional virtio block device lock ups/hangs

mips: Fix asm arch options in new paravirt_membar_sync.
Need to explicitly enable mips2 (MIPS-II) instructions in order to
use sync. Fixes:
/tmp/ccxgOmXc.s: Assembler messages:
/tmp/ccxgOmXc.s:3576: Error: opcode not supported on this processor: mips1 (mips1) `sync'
--- cpu_subr.o ---
*** Failed target: cpu_subr.o

PR kern/59618: occasional virtio block device lock ups/hangs

  /src/lib/libc/sys/
extattr_get_file.2 1.3.32.1 Sun Jul 17 15:36:03 UTC 2011 riz Pull up following revision(s) (requested by manu in ticket #1645):
lib/libc/sys/Makefile.inc 1.207 via patch
lib/libc/sys/extattr_get_file.2 patch
lib/libpuffs/dispatcher.c 1.34,1.36 via patch
lib/libpuffs/puffs.c 1.107 via patch
lib/libpuffs/puffs.h 1.115,1.118 via patch
sys/fs/puffs/puffs_msgif.h 1.71,1.76 via patch
sys/fs/puffs/puffs_vfsops.c 1.88 via patch
sys/fs/puffs/puffs_vnops.c 1.145,1.154 via patch
sys/kern/vfs_xattr.c 1.24-1.27 via patch
sys/kern/vnode_if.c 1.87 via patch
sys/sys/Makefile 1.133 via patch
sys/sys/extattr.h 1.6 via patch
sys/sys/vnode_if.h 1.81 via patch
sys/ufs/ffs/ffs_vnops.c patch
sys/ufs/ufs/ufs_extattr.c 1.31,1.34 via patch

* support extended attributes
* bump major due to structure growth
* add some spare space
* remove ABI sillyness
Support extended attributes.
Fix multiple non compliances in our Linux-like extattr API, and make it
public so that it can be used.
Improve a bit listxattr(2). It attemps to list both system and user
extended attributes, and it faled if calling user did not have privilege
for reading system EA. Now we just lise user EA and skip system EA in
reading them is not allowed.
Fix bug introduced in previous commuit: Do not vrele() a vnode we did not
obtained.
Improve UFS1 extended attributes usability
- autocreate attribute backing file for new attributes
- autoload attributes when issuing extattrctl start
- when autoloading attributes, do not display garbage warning when looking
up entries that got ENOENT
Add a flag to VOP_LISTEXTATTR(9) so that the vnode interface can tell the
filesystem in which format extended attribute shall be listed.
There are currently two formats:
- NUL-terminated strings, used for listxattr(2), this is the default.
- one byte length-pprefixed, non NUL-terminated strings, used for
extattr_list_file(2), which is obtanined by setting the
EXTATTR_LIST_PREFIXLEN flag to VOP_LISTEXTATTR(9)
This approach avoid the need for converting the list back and forth, except
in libperfuse, since FUSE uses NUL-terminated strings, and the kernel may
have requested EXTATTR_LIST_PREFIXLEN.

  /src/sys/arch/riscv/riscv/
cpu_subr.c 1.5.4.1 Sun Oct 19 10:29:19 UTC 2025 martin Pull up following revision(s) (requested by riastradh in ticket #60):

sys/arch/sparc/sparc/locore.s: revision 1.287
share/man/man9/Makefile: revision 1.475
sys/arch/mips/mips/cpu_subr.c: revision 1.65
sys/arch/riscv/riscv/cpu_subr.c: revision 1.6
sys/arch/mips/mips/cpu_subr.c: revision 1.66
sys/arch/amd64/amd64/cpufunc.S: revision 1.70
common/lib/libc/arch/i386/atomic/atomic.S: revision 1.38
common/lib/libc/arch/sparc/atomic/membar_ops.S: revision 1.9
sys/arch/hppa/hppa/support.S: revision 1.9
sys/arch/alpha/alpha/locore.s: revision 1.145
share/man/man9/paravirt_membar_sync.9: revision 1.1
sys/arch/sparc64/sparc64/locore.s: revision 1.436
distrib/sets/lists/comp/mi: revision 1.2499
sys/arch/i386/i386/cpufunc.S: revision 1.54
common/lib/libc/arch/sparc64/atomic/membar_ops.S: revision 1.10
sys/sys/paravirt_membar.h: revision 1.1
sys/arch/arm/arm/cpu_subr.c: revision 1.6
sys/arch/virt68k/virt68k/locore.s: revision 1.17
common/lib/libc/arch/x86_64/atomic/atomic.S: revision 1.32

paravirt_membar_sync(9): New memory barrier.

For use in paravirtualized drivers which require store-before-load
ordering -- irrespective of whether the kernel is built for a single
processor, or whether the (virtual) machine is booted with a single
processor.

This is even required on architectures that don't even have a
store-before-load ordering barrier, like m68k; adding, e.g., a virtio
bus is _as if_ the architecture has been extended with relaxed memory
ordering when talking with that new bus. Such architectures need
some way to request the hypervisor enforce that ordering -- on m68k,
that's done by issuing a CASL instruction, which qemu maps to an
atomic r/m/w with sequential consistency ordering in the host.

PR kern/59618: occasional virtio block device lock ups/hangs

mips: Fix asm arch options in new paravirt_membar_sync.
Need to explicitly enable mips2 (MIPS-II) instructions in order to
use sync. Fixes:
/tmp/ccxgOmXc.s: Assembler messages:
/tmp/ccxgOmXc.s:3576: Error: opcode not supported on this processor: mips1 (mips1) `sync'
--- cpu_subr.o ---
*** Failed target: cpu_subr.o

PR kern/59618: occasional virtio block device lock ups/hangs

  /src/sys/compat/common/
uipc_syscalls_40.c 1.7.38.1 Fri Apr 19 16:02:24 UTC 2019 martin Pull up following revision(s) via patch (requested by christos in ticket #1689):

sys/compat/linux/common/linux_socket.c: revision 1.145
sys/net/if.c: revision 1.449
sys/compat/linux32/common/linux32_socket.c: revision 1.30
sys/compat/common/uipc_syscalls_40.c: revision 1.19

Zero out the ifreq struct for SIOCGIFCONF to avoid up to 127 bytes of stack
disclosure. From Andy Nguyen, many thanks!

-

Zero out the ifreq struct for SIOCGIFCONF to avoid up to 127 bytes of stack
disclosure. From Andy Nguyen, many thanks! This is the compat code part
pointed out by ozaki-r@

1.7.34.1 Fri Apr 19 16:03:09 UTC 2019 martin Pull up following revision(s) via patch (requested by christos in ticket #1689):

sys/compat/linux/common/linux_socket.c: revision 1.145
sys/net/if.c: revision 1.449
sys/compat/linux32/common/linux32_socket.c: revision 1.30
sys/compat/common/uipc_syscalls_40.c: revision 1.19

Zero out the ifreq struct for SIOCGIFCONF to avoid up to 127 bytes of stack
disclosure. From Andy Nguyen, many thanks!

-

Zero out the ifreq struct for SIOCGIFCONF to avoid up to 127 bytes of stack
disclosure. From Andy Nguyen, many thanks! This is the compat code part
pointed out by ozaki-r@

1.7.32.1 Fri Apr 19 16:01:34 UTC 2019 martin Pull up following revision(s) via patch (requested by christos in ticket #1689):

sys/compat/linux/common/linux_socket.c: revision 1.145
sys/net/if.c: revision 1.449
sys/compat/linux32/common/linux32_socket.c: revision 1.30
sys/compat/common/uipc_syscalls_40.c: revision 1.19

Zero out the ifreq struct for SIOCGIFCONF to avoid up to 127 bytes of stack
disclosure. From Andy Nguyen, many thanks!

-

Zero out the ifreq struct for SIOCGIFCONF to avoid up to 127 bytes of stack
disclosure. From Andy Nguyen, many thanks! This is the compat code part
pointed out by ozaki-r@

1.13.6.3 Fri Apr 19 09:12:58 UTC 2019 martin Pull up following revision(s) (requested by christos in ticket #1233):

sys/compat/linux/common/linux_socket.c: revision 1.145
sys/net/if.c: revision 1.449
sys/compat/linux32/common/linux32_socket.c: revision 1.30
sys/compat/common/uipc_syscalls_40.c: revision 1.19

Zero out the ifreq struct for SIOCGIFCONF to avoid up to 127 bytes of stack
disclosure. From Andy Nguyen, many thanks!

-

Zero out the ifreq struct for SIOCGIFCONF to avoid up to 127 bytes of stack
disclosure. From Andy Nguyen, many thanks! This is the compat code part
pointed out by ozaki-r@

  /src/sys/arch/arm/arm/
cpu_subr.c 1.5.12.1 Sun Oct 19 10:29:21 UTC 2025 martin Pull up following revision(s) (requested by riastradh in ticket #60):

sys/arch/sparc/sparc/locore.s: revision 1.287
share/man/man9/Makefile: revision 1.475
sys/arch/mips/mips/cpu_subr.c: revision 1.65
sys/arch/riscv/riscv/cpu_subr.c: revision 1.6
sys/arch/mips/mips/cpu_subr.c: revision 1.66
sys/arch/amd64/amd64/cpufunc.S: revision 1.70
common/lib/libc/arch/i386/atomic/atomic.S: revision 1.38
common/lib/libc/arch/sparc/atomic/membar_ops.S: revision 1.9
sys/arch/hppa/hppa/support.S: revision 1.9
sys/arch/alpha/alpha/locore.s: revision 1.145
share/man/man9/paravirt_membar_sync.9: revision 1.1
sys/arch/sparc64/sparc64/locore.s: revision 1.436
distrib/sets/lists/comp/mi: revision 1.2499
sys/arch/i386/i386/cpufunc.S: revision 1.54
common/lib/libc/arch/sparc64/atomic/membar_ops.S: revision 1.10
sys/sys/paravirt_membar.h: revision 1.1
sys/arch/arm/arm/cpu_subr.c: revision 1.6
sys/arch/virt68k/virt68k/locore.s: revision 1.17
common/lib/libc/arch/x86_64/atomic/atomic.S: revision 1.32

paravirt_membar_sync(9): New memory barrier.

For use in paravirtualized drivers which require store-before-load
ordering -- irrespective of whether the kernel is built for a single
processor, or whether the (virtual) machine is booted with a single
processor.

This is even required on architectures that don't even have a
store-before-load ordering barrier, like m68k; adding, e.g., a virtio
bus is _as if_ the architecture has been extended with relaxed memory
ordering when talking with that new bus. Such architectures need
some way to request the hypervisor enforce that ordering -- on m68k,
that's done by issuing a CASL instruction, which qemu maps to an
atomic r/m/w with sequential consistency ordering in the host.

PR kern/59618: occasional virtio block device lock ups/hangs

mips: Fix asm arch options in new paravirt_membar_sync.
Need to explicitly enable mips2 (MIPS-II) instructions in order to
use sync. Fixes:
/tmp/ccxgOmXc.s: Assembler messages:
/tmp/ccxgOmXc.s:3576: Error: opcode not supported on this processor: mips1 (mips1) `sync'
--- cpu_subr.o ---
*** Failed target: cpu_subr.o

PR kern/59618: occasional virtio block device lock ups/hangs

1.5.4.1 Sun Oct 19 10:34:43 UTC 2025 martin Pull up following revision(s) (requested by riastradh in ticket #60):

sys/arch/sparc/sparc/locore.s: revision 1.287
share/man/man9/Makefile: revision 1.475
sys/arch/mips/mips/cpu_subr.c: revision 1.65
sys/arch/mips/mips/cpu_subr.c: revision 1.66
sys/arch/amd64/amd64/cpufunc.S: revision 1.70
common/lib/libc/arch/i386/atomic/atomic.S: revision 1.38
common/lib/libc/arch/sparc/atomic/membar_ops.S: revision 1.9
sys/arch/hppa/hppa/support.S: revision 1.9
sys/arch/alpha/alpha/locore.s: revision 1.145
share/man/man9/paravirt_membar_sync.9: revision 1.1
sys/arch/sparc64/sparc64/locore.s: revision 1.436
distrib/sets/lists/comp/mi: revision 1.2499
sys/arch/i386/i386/cpufunc.S: revision 1.54
common/lib/libc/arch/sparc64/atomic/membar_ops.S: revision 1.10
sys/sys/paravirt_membar.h: revision 1.1
sys/arch/arm/arm/cpu_subr.c: revision 1.6
common/lib/libc/arch/x86_64/atomic/atomic.S: revision 1.32
(all via patch)

paravirt_membar_sync(9): New memory barrier.

For use in paravirtualized drivers which require store-before-load
ordering -- irrespective of whether the kernel is built for a single
processor, or whether the (virtual) machine is booted with a single
processor.

This is even required on architectures that don't even have a
store-before-load ordering barrier, like m68k; adding, e.g., a virtio
bus is _as if_ the architecture has been extended with relaxed memory
ordering when talking with that new bus. Such architectures need
some way to request the hypervisor enforce that ordering -- on m68k,
that's done by issuing a CASL instruction, which qemu maps to an
atomic r/m/w with sequential consistency ordering in the host.

PR kern/59618: occasional virtio block device lock ups/hangs

mips: Fix asm arch options in new paravirt_membar_sync.
Need to explicitly enable mips2 (MIPS-II) instructions in order to
use sync. Fixes:
/tmp/ccxgOmXc.s: Assembler messages:
/tmp/ccxgOmXc.s:3576: Error: opcode not supported on this processor: mips1 (mips1) `sync'
--- cpu_subr.o ---
*** Failed target: cpu_subr.o

PR kern/59618: occasional virtio block device lock ups/hangs

  /src/sys/dev/ic/
ncr53c9x.c 1.145 Mon Jun 18 21:23:56 UTC 2012 martin branches: 1.145.2; 1.145.16; 1.145.20;
When issuing a non-dma command, make sure to set the "remaining length of
command to be transfered via dma" (sc_cmdlen) to zero upfront, otherwise we
might get confused on command completition interrupt (no dma active but still
data left to transfer).
Mon Jun 18 21:23:56 UTC 2012 martin branches: 1.145.2; 1.145.16; 1.145.20;
When issuing a non-dma command, make sure to set the "remaining length of
command to be transfered via dma" (sc_cmdlen) to zero upfront, otherwise we
might get confused on command completition interrupt (no dma active but still
data left to transfer).
.2; 1.145.16; 1.145.20;
When issuing a non-dma command, make sure to set the "remaining length of
command to be transfered via dma" (sc_cmdlen) to zero upfront, otherwise we
might get confused on command completition interrupt (no dma active but still
data left to transfer).
.16; 1.145.20;
When issuing a non-dma command, make sure to set the "remaining length of
command to be transfered via dma" (sc_cmdlen) to zero upfront, otherwise we
might get confused on command completition interrupt (no dma active but still
data left to transfer).
1.143.8.2 Wed Jul 25 20:55:36 UTC 2012 jdc Pull up revision 1.145 (requested by ryoon in ticket #439).

When issuing a non-dma command, make sure to set the "remaining length of
command to be transfered via dma" (sc_cmdlen) to zero upfront, otherwise we
might get confused on command completition interrupt (no dma active but still
data left to transfer).
1.145.20.2 Mon Mar 20 06:57:28 UTC 2017 pgoyette Sync with HEAD
1.145.20.1 Sat Jan 07 08:56:32 UTC 2017 pgoyette Sync with HEAD. (Note that most of these changes are simply $NetBSD$
tag issues.)
1.145.16.2 Mon Aug 28 17:52:03 UTC 2017 skrll Sync with HEAD
1.145.16.1 Sun Feb 05 13:40:28 UTC 2017 skrll Sync with HEAD
1.145.2.1 Sun Dec 03 11:37:03 UTC 2017 jdolecek update from HEAD
  /src/sys/kern/
makesyscalls.sh 1.145 Thu Jul 24 11:58:45 UTC 2014 pooka branches: 1.145.4;
Ensure that symbols are aliased to standard names when
using RUMP_KERNEL_IS_LIBC.

For example configure scripts do not always include headers, and if select
is visible as a __RENAME'd __select50 instead of select, configure will
not find it.

before:
=== snip ===
checking for gethostbyname... yes
checking for socket... no
checking for socket in -lsocket... no
=== snip ===

after:
=== snip ===
checking for gethostbyname... yes
checking for socket... yes
checking for main in -linet6... no
=== snip ===

Another option would be to enable the libc compat bits, and it probably
will be done at some point, but this is easier and more self-contained
for now.
Thu Jul 24 11:58:45 UTC 2014 pooka branches: 1.145.4;
Ensure that symbols are aliased to standard names when
using RUMP_KERNEL_IS_LIBC.

For example configure scripts do not always include headers, and if select
is visible as a __RENAME'd __select50 instead of select, configure will
not find it.

before:
=== snip ===
checking for gethostbyname... yes
checking for socket... no
checking for socket in -lsocket... no
=== snip ===

after:
=== snip ===
checking for gethostbyname... yes
checking for socket... yes
checking for main in -linet6... no
=== snip ===

Another option would be to enable the libc compat bits, and it probably
will be done at some point, but this is easier and more self-contained
for now.
1.145.4.7 Mon Aug 28 17:53:07 UTC 2017 skrll Sync with HEAD
1.145.4.6 Sun Feb 05 13:40:56 UTC 2017 skrll Sync with HEAD
1.145.4.5 Mon Dec 05 10:55:26 UTC 2016 skrll Sync with HEAD
1.145.4.4 Sat Mar 19 11:30:31 UTC 2016 skrll Sync with HEAD
1.145.4.3 Sun Dec 27 00:10:05 UTC 2015 skrll Sync with HEAD (as of 26th Dec)
1.145.4.2 Sat Jun 06 14:40:21 UTC 2015 skrll Sync with HEAD
1.145.4.1 Mon Apr 06 15:18:20 UTC 2015 skrll Sync with HEAD
  /src/sys/arch/arc/conf/
GENERIC 1.145 Sat Nov 11 18:47:09 UTC 2006 jmmv branches: 1.145.2; 1.145.8; 1.145.10; 1.145.16; 1.145.18;
Remove tmpfs's experimental status. OK'ed by core@.
Sat Nov 11 18:47:09 UTC 2006 jmmv branches: 1.145.2; 1.145.8; 1.145.10; 1.145.16; 1.145.18;
Remove tmpfs's experimental status. OK'ed by core@.
.2; 1.145.8; 1.145.10; 1.145.16; 1.145.18;
Remove tmpfs's experimental status. OK'ed by core@.
.8; 1.145.10; 1.145.16; 1.145.18;
Remove tmpfs's experimental status. OK'ed by core@.
.10; 1.145.16; 1.145.18;
Remove tmpfs's experimental status. OK'ed by core@.
.16; 1.145.18;
Remove tmpfs's experimental status. OK'ed by core@.
1.145.18.1 Mon Sep 03 07:03:09 UTC 2007 wrstuden Sync w/ NetBSD-4-RC_1
1.145.16.2 Wed Oct 03 19:22:30 UTC 2007 garbled Sync with HEAD
1.145.16.1 Tue Jun 26 18:12:11 UTC 2007 garbled Sync with HEAD.
1.145.10.1 Wed Jul 11 19:57:58 UTC 2007 mjf Sync with head.
  /src/sys/arch/atari/atari/
pmap_bootstrap.c 1.1 Thu Jan 01 04:10:25 UTC 2009 tsutsui branches: 1.1.2; 1.1.4;
Pull the following amiga's pmap changes to atari:
arch/amiga/amiga/amiga_init.c 1.95-1.97, 1.100-1.102
arch/amiga/amiga/pmap.c 1.123, 1.126-1.131, 1.142, 1.145
arch/amiga/amiga/pmap_bootstrap.c 1.1, 1.2, 1.3, 1.4
arch/amiga/conf/files.amiga 1.137
arch/amiga/include/pcb.h 1.16
arch/amiga/include/pmap.h 1.44
arch/amiga/include/pte.h 1.19
arch/amiga/include/vmparam.h 1.35

- change kernel address space layout (i.e. move Sysmap to the end of KVA)
to match other m68k ports, which should be done on yamt-km merge
- rework pmap_zero_page(), pmap_copy_page() and some more other functions
to make them compatible with m68k/pmap_motorola.c
- move pmap_bootstrap() into a separate file to allow using either
the atari pmap.c or the m68k common pmap_motorola.c
- use common m68k include files, pcb.h, pmap_motorola.h, and pte_motorola.h
- misc style and cosmetic changes

Most merge work is done by Tuomo Makinen, and
miscellaneous fixes and cleanups are done by me.

Tested on Falcon with both 68030 and 68060 by Tuomo, and
also tested on TT030 by David Ross on port-atari.

Should be pulled up to netbsd-4 (it requires at least Sysmap changes)
and netbsd-5.
1.1.4.2 Thu Jan 15 22:40:54 UTC 2009 bouyer Pull up following revision(s) (requested by tsutsui in ticket #1258):
sys/arch/atari/atari/atari_init.c: revision 1.68, 1.69, 1.70
sys/arch/atari/atari/pmap_bootstrap.c: revision 1.1
sys/arch/atari/include/pte.h: revision 1.8
sys/arch/atari/include/vmparam.h: revision 1.22
sys/arch/atari/include/pmap.h: revision 1.35, 1.37, 1.39 (via patch)
sys/arch/atari/atari/pmap.c: revision 1.106, 1.111 (via patch)
sys/arch/atari/atari/genassym.cf: revision 1.28
sys/arch/atari/conf/files.atari: revision 1.113
sys/arch/atari/include/pcb.h: revision 1.7, 1.8, 1.9
Replace the Mach-derived boolean_t type with the C99 bool type. A
future commit will replace use of TRUE and FALSE with true and false.
Kill caddr_t; there will be some MI fallout, but it will be fixed shortly.
Remove bogus DEBUG uvm_map() calls - (sync with amiga pmap). From Tuomo
Remove quite obsolete pcb_cmap2.
Pull the following amiga's pmap changes to atari:
arch/amiga/amiga/amiga_init.c 1.95-1.97, 1.100-1.102
arch/amiga/amiga/pmap.c 1.123, 1.126-1.131, 1.142, 1.145
arch/amiga/amiga/pmap_bootstrap.c 1.1, 1.2, 1.3, 1.4
arch/amiga/conf/files.amiga 1.137
arch/amiga/include/pcb.h 1.16
arch/amiga/include/pmap.h 1.44
arch/amiga/include/pte.h 1.19
arch/amiga/include/vmparam.h 1.35
- change kernel address space layout (i.e. move Sysmap to the end of KVA)
to match other m68k ports, which should be done on yamt-km merge
- rework pmap_zero_page(), pmap_copy_page() and some more other functions
to make them compatible with m68k/pmap_motorola.c
- move pmap_bootstrap() into a separate file to allow using either
the atari pmap.c or the m68k common pmap_motorola.c
- use common m68k include files, pcb.h, pmap_motorola.h, and pte_motorola.h
- misc style and cosmetic changes
Most merge work is done by Tuomo Makinen, and
miscellaneous fixes and cleanups are done by me.
Tested on Falcon with both 68030 and 68060 by Tuomo, and
also tested on TT030 by David Ross on port-atari.
Should be pulled up to netbsd-4 (it requires at least Sysmap changes)
and netbsd-5.
Update one more comment which was missed in previous.
1.1.2.2 Thu Jan 08 22:45:30 UTC 2009 snj Pull up following revision(s) (requested by tsutsui in ticket #230):
sys/arch/atari/atari/atari_init.c: revision 1.69
sys/arch/atari/atari/pmap.c: revision 1.111 via patch
sys/arch/atari/atari/pmap_bootstrap.c: revision 1.1
sys/arch/atari/conf/files.atari: revision 1.113
sys/arch/atari/include/pcb.h: revision 1.9
sys/arch/atari/include/pmap.h: revision 1.39 via patch
sys/arch/atari/include/pte.h: revision 1.8
sys/arch/atari/include/vmparam.h: revision 1.22
Pull the following amiga's pmap changes to atari:
arch/amiga/amiga/amiga_init.c 1.95-1.97, 1.100-1.102
arch/amiga/amiga/pmap.c 1.123, 1.126-1.131, 1.142, 1.145
arch/amiga/amiga/pmap_bootstrap.c 1.1, 1.2, 1.3, 1.4
arch/amiga/conf/files.amiga 1.137
arch/amiga/include/pcb.h 1.16
arch/amiga/include/pmap.h 1.44
arch/amiga/include/pte.h 1.19
arch/amiga/include/vmparam.h 1.35
- change kernel address space layout (i.e. move Sysmap to the end of KVA)
to match other m68k ports, which should be done on yamt-km merge
- rework pmap_zero_page(), pmap_copy_page() and some more other functions
to make them compatible with m68k/pmap_motorola.c
- move pmap_bootstrap() into a separate file to allow using either
the atari pmap.c or the m68k common pmap_motorola.c
- use common m68k include files, pcb.h, pmap_motorola.h, and
pte_motorola.h
- misc style and cosmetic changes
Most merge work is done by Tuomo Makinen, and
miscellaneous fixes and cleanups are done by me.
Tested on Falcon with both 68030 and 68060 by Tuomo, and
also tested on TT030 by David Ross on port-atari.
Should be pulled up to netbsd-4 (it requires at least Sysmap changes)
and netbsd-5.
  /src/common/lib/libc/arch/sparc/atomic/
membar_ops.S 1.8.10.1 Sun Oct 19 10:29:20 UTC 2025 martin Pull up following revision(s) (requested by riastradh in ticket #60):

sys/arch/sparc/sparc/locore.s: revision 1.287
share/man/man9/Makefile: revision 1.475
sys/arch/mips/mips/cpu_subr.c: revision 1.65
sys/arch/riscv/riscv/cpu_subr.c: revision 1.6
sys/arch/mips/mips/cpu_subr.c: revision 1.66
sys/arch/amd64/amd64/cpufunc.S: revision 1.70
common/lib/libc/arch/i386/atomic/atomic.S: revision 1.38
common/lib/libc/arch/sparc/atomic/membar_ops.S: revision 1.9
sys/arch/hppa/hppa/support.S: revision 1.9
sys/arch/alpha/alpha/locore.s: revision 1.145
share/man/man9/paravirt_membar_sync.9: revision 1.1
sys/arch/sparc64/sparc64/locore.s: revision 1.436
distrib/sets/lists/comp/mi: revision 1.2499
sys/arch/i386/i386/cpufunc.S: revision 1.54
common/lib/libc/arch/sparc64/atomic/membar_ops.S: revision 1.10
sys/sys/paravirt_membar.h: revision 1.1
sys/arch/arm/arm/cpu_subr.c: revision 1.6
sys/arch/virt68k/virt68k/locore.s: revision 1.17
common/lib/libc/arch/x86_64/atomic/atomic.S: revision 1.32

paravirt_membar_sync(9): New memory barrier.

For use in paravirtualized drivers which require store-before-load
ordering -- irrespective of whether the kernel is built for a single
processor, or whether the (virtual) machine is booted with a single
processor.

This is even required on architectures that don't even have a
store-before-load ordering barrier, like m68k; adding, e.g., a virtio
bus is _as if_ the architecture has been extended with relaxed memory
ordering when talking with that new bus. Such architectures need
some way to request the hypervisor enforce that ordering -- on m68k,
that's done by issuing a CASL instruction, which qemu maps to an
atomic r/m/w with sequential consistency ordering in the host.

PR kern/59618: occasional virtio block device lock ups/hangs

mips: Fix asm arch options in new paravirt_membar_sync.
Need to explicitly enable mips2 (MIPS-II) instructions in order to
use sync. Fixes:
/tmp/ccxgOmXc.s: Assembler messages:
/tmp/ccxgOmXc.s:3576: Error: opcode not supported on this processor: mips1 (mips1) `sync'
--- cpu_subr.o ---
*** Failed target: cpu_subr.o

PR kern/59618: occasional virtio block device lock ups/hangs

1.8.2.1 Sun Oct 19 10:34:41 UTC 2025 martin Pull up following revision(s) (requested by riastradh in ticket #60):

sys/arch/sparc/sparc/locore.s: revision 1.287
share/man/man9/Makefile: revision 1.475
sys/arch/mips/mips/cpu_subr.c: revision 1.65
sys/arch/mips/mips/cpu_subr.c: revision 1.66
sys/arch/amd64/amd64/cpufunc.S: revision 1.70
common/lib/libc/arch/i386/atomic/atomic.S: revision 1.38
common/lib/libc/arch/sparc/atomic/membar_ops.S: revision 1.9
sys/arch/hppa/hppa/support.S: revision 1.9
sys/arch/alpha/alpha/locore.s: revision 1.145
share/man/man9/paravirt_membar_sync.9: revision 1.1
sys/arch/sparc64/sparc64/locore.s: revision 1.436
distrib/sets/lists/comp/mi: revision 1.2499
sys/arch/i386/i386/cpufunc.S: revision 1.54
common/lib/libc/arch/sparc64/atomic/membar_ops.S: revision 1.10
sys/sys/paravirt_membar.h: revision 1.1
sys/arch/arm/arm/cpu_subr.c: revision 1.6
common/lib/libc/arch/x86_64/atomic/atomic.S: revision 1.32
(all via patch)

paravirt_membar_sync(9): New memory barrier.

For use in paravirtualized drivers which require store-before-load
ordering -- irrespective of whether the kernel is built for a single
processor, or whether the (virtual) machine is booted with a single
processor.

This is even required on architectures that don't even have a
store-before-load ordering barrier, like m68k; adding, e.g., a virtio
bus is _as if_ the architecture has been extended with relaxed memory
ordering when talking with that new bus. Such architectures need
some way to request the hypervisor enforce that ordering -- on m68k,
that's done by issuing a CASL instruction, which qemu maps to an
atomic r/m/w with sequential consistency ordering in the host.

PR kern/59618: occasional virtio block device lock ups/hangs

mips: Fix asm arch options in new paravirt_membar_sync.
Need to explicitly enable mips2 (MIPS-II) instructions in order to
use sync. Fixes:
/tmp/ccxgOmXc.s: Assembler messages:
/tmp/ccxgOmXc.s:3576: Error: opcode not supported on this processor: mips1 (mips1) `sync'
--- cpu_subr.o ---
*** Failed target: cpu_subr.o

PR kern/59618: occasional virtio block device lock ups/hangs

  /src/common/lib/libc/arch/sparc64/atomic/
membar_ops.S 1.9.10.1 Sun Oct 19 10:29:21 UTC 2025 martin Pull up following revision(s) (requested by riastradh in ticket #60):

sys/arch/sparc/sparc/locore.s: revision 1.287
share/man/man9/Makefile: revision 1.475
sys/arch/mips/mips/cpu_subr.c: revision 1.65
sys/arch/riscv/riscv/cpu_subr.c: revision 1.6
sys/arch/mips/mips/cpu_subr.c: revision 1.66
sys/arch/amd64/amd64/cpufunc.S: revision 1.70
common/lib/libc/arch/i386/atomic/atomic.S: revision 1.38
common/lib/libc/arch/sparc/atomic/membar_ops.S: revision 1.9
sys/arch/hppa/hppa/support.S: revision 1.9
sys/arch/alpha/alpha/locore.s: revision 1.145
share/man/man9/paravirt_membar_sync.9: revision 1.1
sys/arch/sparc64/sparc64/locore.s: revision 1.436
distrib/sets/lists/comp/mi: revision 1.2499
sys/arch/i386/i386/cpufunc.S: revision 1.54
common/lib/libc/arch/sparc64/atomic/membar_ops.S: revision 1.10
sys/sys/paravirt_membar.h: revision 1.1
sys/arch/arm/arm/cpu_subr.c: revision 1.6
sys/arch/virt68k/virt68k/locore.s: revision 1.17
common/lib/libc/arch/x86_64/atomic/atomic.S: revision 1.32

paravirt_membar_sync(9): New memory barrier.

For use in paravirtualized drivers which require store-before-load
ordering -- irrespective of whether the kernel is built for a single
processor, or whether the (virtual) machine is booted with a single
processor.

This is even required on architectures that don't even have a
store-before-load ordering barrier, like m68k; adding, e.g., a virtio
bus is _as if_ the architecture has been extended with relaxed memory
ordering when talking with that new bus. Such architectures need
some way to request the hypervisor enforce that ordering -- on m68k,
that's done by issuing a CASL instruction, which qemu maps to an
atomic r/m/w with sequential consistency ordering in the host.

PR kern/59618: occasional virtio block device lock ups/hangs

mips: Fix asm arch options in new paravirt_membar_sync.
Need to explicitly enable mips2 (MIPS-II) instructions in order to
use sync. Fixes:
/tmp/ccxgOmXc.s: Assembler messages:
/tmp/ccxgOmXc.s:3576: Error: opcode not supported on this processor: mips1 (mips1) `sync'
--- cpu_subr.o ---
*** Failed target: cpu_subr.o

PR kern/59618: occasional virtio block device lock ups/hangs

1.9.2.1 Sun Oct 19 10:34:43 UTC 2025 martin Pull up following revision(s) (requested by riastradh in ticket #60):

sys/arch/sparc/sparc/locore.s: revision 1.287
share/man/man9/Makefile: revision 1.475
sys/arch/mips/mips/cpu_subr.c: revision 1.65
sys/arch/mips/mips/cpu_subr.c: revision 1.66
sys/arch/amd64/amd64/cpufunc.S: revision 1.70
common/lib/libc/arch/i386/atomic/atomic.S: revision 1.38
common/lib/libc/arch/sparc/atomic/membar_ops.S: revision 1.9
sys/arch/hppa/hppa/support.S: revision 1.9
sys/arch/alpha/alpha/locore.s: revision 1.145
share/man/man9/paravirt_membar_sync.9: revision 1.1
sys/arch/sparc64/sparc64/locore.s: revision 1.436
distrib/sets/lists/comp/mi: revision 1.2499
sys/arch/i386/i386/cpufunc.S: revision 1.54
common/lib/libc/arch/sparc64/atomic/membar_ops.S: revision 1.10
sys/sys/paravirt_membar.h: revision 1.1
sys/arch/arm/arm/cpu_subr.c: revision 1.6
common/lib/libc/arch/x86_64/atomic/atomic.S: revision 1.32
(all via patch)

paravirt_membar_sync(9): New memory barrier.

For use in paravirtualized drivers which require store-before-load
ordering -- irrespective of whether the kernel is built for a single
processor, or whether the (virtual) machine is booted with a single
processor.

This is even required on architectures that don't even have a
store-before-load ordering barrier, like m68k; adding, e.g., a virtio
bus is _as if_ the architecture has been extended with relaxed memory
ordering when talking with that new bus. Such architectures need
some way to request the hypervisor enforce that ordering -- on m68k,
that's done by issuing a CASL instruction, which qemu maps to an
atomic r/m/w with sequential consistency ordering in the host.

PR kern/59618: occasional virtio block device lock ups/hangs

mips: Fix asm arch options in new paravirt_membar_sync.
Need to explicitly enable mips2 (MIPS-II) instructions in order to
use sync. Fixes:
/tmp/ccxgOmXc.s: Assembler messages:
/tmp/ccxgOmXc.s:3576: Error: opcode not supported on this processor: mips1 (mips1) `sync'
--- cpu_subr.o ---
*** Failed target: cpu_subr.o

PR kern/59618: occasional virtio block device lock ups/hangs

  /src/sys/arch/powerpc/powerpc/
trap.c 1.145 Tue Sep 27 01:02:36 UTC 2011 jym branches: 1.145.2; 1.145.6; 1.145.8; 1.145.10;
Modify *ASSERTMSG() so they are now used as variadic macros. The main goal
is to provide routines that do as KASSERT(9) says: append a message
to the panic format string when the assertion triggers, with optional
arguments.

Fix call sites to reflect the new definition.

Discussed on tech-kern@. See
http://mail-index.netbsd.org/tech-kern/2011/09/07/msg011427.html
Tue Sep 27 01:02:36 UTC 2011 jym branches: 1.145.2; 1.145.6; 1.145.8; 1.145.10;
Modify *ASSERTMSG() so they are now used as variadic macros. The main goal
is to provide routines that do as KASSERT(9) says: append a message
to the panic format string when the assertion triggers, with optional
arguments.

Fix call sites to reflect the new definition.

Discussed on tech-kern@. See
http://mail-index.netbsd.org/tech-kern/2011/09/07/msg011427.html
.2; 1.145.6; 1.145.8; 1.145.10;
Modify *ASSERTMSG() so they are now used as variadic macros. The main goal
is to provide routines that do as KASSERT(9) says: append a message
to the panic format string when the assertion triggers, with optional
arguments.

Fix call sites to reflect the new definition.

Discussed on tech-kern@. See
http://mail-index.netbsd.org/tech-kern/2011/09/07/msg011427.html
.6; 1.145.8; 1.145.10;
Modify *ASSERTMSG() so they are now used as variadic macros. The main goal
is to provide routines that do as KASSERT(9) says: append a message
to the panic format string when the assertion triggers, with optional
arguments.

Fix call sites to reflect the new definition.

Discussed on tech-kern@. See
http://mail-index.netbsd.org/tech-kern/2011/09/07/msg011427.html
.8; 1.145.10;
Modify *ASSERTMSG() so they are now used as variadic macros. The main goal
is to provide routines that do as KASSERT(9) says: append a message
to the panic format string when the assertion triggers, with optional
arguments.

Fix call sites to reflect the new definition.

Discussed on tech-kern@. See
http://mail-index.netbsd.org/tech-kern/2011/09/07/msg011427.html
1.145.10.1 Thu Nov 01 16:45:00 UTC 2012 matt sync with netbsd-6-0-RELEASE.
1.145.8.1 Tue Oct 09 23:06:13 UTC 2012 riz sys/arch/powerpc/powerpc/trap.c patch

Silence trap printfs caused by OpenSSL.
[christos, ticket #589]
1.145.6.1 Fri Feb 24 09:11:33 UTC 2012 mrg sync to -current.
1.145.2.3 Thu May 22 11:40:05 UTC 2014 yamt sync with head.

for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.

this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
1.145.2.2 Tue Oct 30 17:20:14 UTC 2012 yamt sync with head

Completed in 269 milliseconds

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