1 /* $NetBSD: sdhc_acpi.c,v 1.25 2026/06/08 06:58:35 skrll Exp $ */ 2 3 /* 4 * Copyright (c) 2016 Kimihiro Nonaka <nonaka (at) NetBSD.org> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. The name of the author may not be used to endorse or promote products 13 * derived from this software without specific prior written permission. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 20 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 21 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 22 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 23 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 */ 27 28 #include <sys/cdefs.h> 29 __KERNEL_RCSID(0, "$NetBSD: sdhc_acpi.c,v 1.25 2026/06/08 06:58:35 skrll Exp $"); 30 31 #include <sys/param.h> 32 #include <sys/device.h> 33 #include <sys/systm.h> 34 #include <sys/kmem.h> 35 36 #include <dev/acpi/acpireg.h> 37 #include <dev/acpi/acpivar.h> 38 #include <dev/acpi/acpi_intr.h> 39 40 #include <dev/sdmmc/sdhcreg.h> 41 #include <dev/sdmmc/sdhcvar.h> 42 #include <dev/sdmmc/sdmmcvar.h> 43 44 /* Freescale ESDHC */ 45 #define SDHC_ESDHC_FLAGS \ 46 (SDHC_FLAG_HAVE_DVS|SDHC_FLAG_NO_PWR0|SDHC_FLAG_32BIT_ACCESS|SDHC_FLAG_ENHANCED) 47 48 /* Rockchip eMMC device-specific method (_DSM) - 434addb0-8ff3-49d5-a724-95844b79ad1f */ 49 static UINT8 sdhc_acpi_rockchip_dsm_uuid[ACPI_UUID_LENGTH] = { 50 0xb0, 0xdd, 0x4a, 0x43, 0xf3, 0x8f, 0xd5, 0x49, 51 0xa7, 0x24, 0x95, 0x84, 0x4b, 0x79, 0xad, 0x1f 52 }; 53 #define ROCKCHIP_DSM_REV 0 54 #define ROCKCHIP_DSM_FUNC_SET_CARD_CLOCK 1 55 56 #define _COMPONENT ACPI_RESOURCE_COMPONENT 57 ACPI_MODULE_NAME ("sdhc_acpi") 58 59 static int sdhc_acpi_match(device_t, cfdata_t, void *); 60 static void sdhc_acpi_attach(device_t, device_t, void *); 61 static int sdhc_acpi_detach(device_t, int); 62 static bool sdhc_acpi_resume(device_t, const pmf_qual_t *); 63 64 struct sdhc_acpi_softc { 65 struct sdhc_softc sc; 66 bus_space_tag_t sc_memt; 67 bus_space_handle_t sc_memh; 68 bus_size_t sc_memsize; 69 void *sc_ih; 70 ACPI_HANDLE sc_handle; 71 72 ACPI_HANDLE sc_crs, sc_srs; 73 ACPI_BUFFER sc_crs_buffer; 74 }; 75 76 CFATTACH_DECL_NEW(sdhc_acpi, sizeof(struct sdhc_acpi_softc), 77 sdhc_acpi_match, sdhc_acpi_attach, sdhc_acpi_detach, NULL); 78 79 static void sdhc_acpi_intel_emmc_hw_reset(struct sdhc_softc *, 80 struct sdhc_host *); 81 82 static int sdhc_acpi_rockchip_bus_clock(struct sdhc_softc *, 83 int); 84 85 static const struct sdhc_acpi_slot { 86 const char *hid; 87 const char *uid; 88 int type; 89 #define SLOT_TYPE_SD 0 /* SD or SDIO */ 90 #define SLOT_TYPE_EMMC 1 /* eMMC */ 91 uint32_t flags; 92 } sdhc_acpi_slot_map[] = { 93 { .hid = "80865ACA", .type = SLOT_TYPE_SD }, 94 { .hid = "80865ACC", .type = SLOT_TYPE_EMMC }, 95 { .hid = "80865AD0", .type = SLOT_TYPE_SD }, 96 97 /* 98 * Broadcom BRCM5D12 (eMMC/SD on Raspberry Pi 5) 99 * 100 * These entries need to be before 80860F14 so that UEFI's 101 * default compatibility mode of "BRCMSTB _HID + Bay Trail _CID" 102 * matches here and not the "80860F14" entries below. 103 */ 104 { .hid = "BRCM5D12", .uid = "0", .type = SLOT_TYPE_SD, 105 .flags = SDHC_FLAG_NO_PWR0 | 106 SDHC_FLAG_NO_1_8_V }, 107 { .hid = "BRCM5D12", .uid = "1", .type = SLOT_TYPE_EMMC, 108 .flags = SDHC_FLAG_NO_PWR0 | 109 SDHC_FLAG_NO_1_8_V }, 110 111 { .hid = "80860F14", .uid = "1", .type = SLOT_TYPE_EMMC }, 112 { .hid = "80860F14", .uid = "3", .type = SLOT_TYPE_SD }, 113 { .hid = "80860F16", .type = SLOT_TYPE_SD }, 114 { .hid = "INT33BB", .uid = "2", .type = SLOT_TYPE_SD }, 115 { .hid = "INT33BB", .uid = "3", .type = SLOT_TYPE_SD }, 116 { .hid = "INT33C6", .type = SLOT_TYPE_SD }, 117 { .hid = "INT3436", .type = SLOT_TYPE_SD }, 118 { .hid = "INT344D", .type = SLOT_TYPE_SD }, 119 { .hid = "NXP0003", .uid = "0", .type = SLOT_TYPE_SD, 120 .flags = SDHC_ESDHC_FLAGS }, 121 { .hid = "NXP0003", .uid = "1", .type = SLOT_TYPE_EMMC, 122 .flags = SDHC_ESDHC_FLAGS }, 123 { .hid = "RKCP0D40", .type = SLOT_TYPE_SD, 124 .flags = SDHC_FLAG_32BIT_ACCESS | 125 SDHC_FLAG_8BIT_MODE | 126 SDHC_FLAG_NO_PWR0 | 127 SDHC_FLAG_SINGLE_POWER_WRITE }, 128 129 /* Generic IDs last */ 130 { .hid = "PNP0D40", .type = SLOT_TYPE_SD }, 131 { .hid = "PNP0FFF", .uid = "3", .type = SLOT_TYPE_SD }, 132 }; 133 134 static const struct sdhc_acpi_slot * 135 sdhc_acpi_find_slot(ACPI_DEVICE_INFO *ad) 136 { 137 const struct sdhc_acpi_slot *slot; 138 const char *hid, *uid; 139 size_t i; 140 141 hid = ad->HardwareId.String; 142 uid = ad->UniqueId.String; 143 144 if (!(ad->Valid & ACPI_VALID_HID) || hid == NULL) 145 return NULL; 146 147 for (i = 0; i < __arraycount(sdhc_acpi_slot_map); i++) { 148 slot = &sdhc_acpi_slot_map[i]; 149 const char * const slot_id[] = { slot->hid, NULL }; 150 if (acpi_match_hid(ad, slot_id)) { 151 if (slot->uid == NULL || 152 ((ad->Valid & ACPI_VALID_UID) != 0 && 153 uid != NULL && 154 strcmp(uid, slot->uid) == 0)) 155 return slot; 156 } 157 } 158 return NULL; 159 } 160 161 static int 162 sdhc_acpi_match(device_t parent, cfdata_t match, void *opaque) 163 { 164 struct acpi_attach_args *aa = opaque; 165 166 if (aa->aa_node->ad_type != ACPI_TYPE_DEVICE) 167 return 0; 168 169 return sdhc_acpi_find_slot(aa->aa_node->ad_devinfo) != NULL; 170 } 171 172 static void 173 sdhc_acpi_attach(device_t parent, device_t self, void *opaque) 174 { 175 struct sdhc_acpi_softc *sc = device_private(self); 176 struct acpi_attach_args *aa = opaque; 177 const struct sdhc_acpi_slot *slot; 178 struct acpi_resources res; 179 struct acpi_mem *mem; 180 struct acpi_irq *irq; 181 ACPI_STATUS rv; 182 ACPI_INTEGER clock_freq; 183 ACPI_INTEGER caps, caps_mask; 184 ACPI_INTEGER funcs; 185 bool non_removable; 186 187 sc->sc.sc_dev = self; 188 sc->sc.sc_dmat = aa->aa_dmat; 189 sc->sc.sc_host = NULL; 190 sc->sc_memt = aa->aa_memt; 191 sc->sc_handle = aa->aa_node->ad_handle; 192 193 slot = sdhc_acpi_find_slot(aa->aa_node->ad_devinfo); 194 if (slot->type == SLOT_TYPE_EMMC) 195 sc->sc.sc_vendor_hw_reset = sdhc_acpi_intel_emmc_hw_reset; 196 197 rv = acpi_dsm_query(sc->sc_handle, sdhc_acpi_rockchip_dsm_uuid, 198 ROCKCHIP_DSM_REV, &funcs); 199 if (ACPI_SUCCESS(rv) && 200 ISSET(funcs, __BIT(ROCKCHIP_DSM_FUNC_SET_CARD_CLOCK))) { 201 sc->sc.sc_vendor_bus_clock = sdhc_acpi_rockchip_bus_clock; 202 } 203 204 rv = acpi_resource_parse(self, aa->aa_node->ad_handle, "_CRS", 205 &res, &acpi_resource_parse_ops_default); 206 if (ACPI_FAILURE(rv)) 207 return; 208 209 AcpiGetHandle(aa->aa_node->ad_handle, "_CRS", &sc->sc_crs); 210 AcpiGetHandle(aa->aa_node->ad_handle, "_SRS", &sc->sc_srs); 211 if (sc->sc_crs && sc->sc_srs) { 212 /* XXX Why need this? */ 213 sc->sc_crs_buffer.Pointer = NULL; 214 sc->sc_crs_buffer.Length = ACPI_ALLOCATE_LOCAL_BUFFER; 215 rv = AcpiGetCurrentResources(sc->sc_crs, &sc->sc_crs_buffer); 216 if (ACPI_FAILURE(rv)) 217 sc->sc_crs = sc->sc_srs = NULL; 218 } 219 220 mem = acpi_res_mem(&res, 0); 221 irq = acpi_res_irq(&res, 0); 222 if (mem == NULL || irq == NULL) { 223 aprint_error_dev(self, "incomplete resources\n"); 224 goto cleanup; 225 } 226 if (mem->ar_length == 0) { 227 aprint_error_dev(self, "zero length memory resource\n"); 228 goto cleanup; 229 } 230 sc->sc_memsize = mem->ar_length; 231 232 if (bus_space_map(sc->sc_memt, mem->ar_base, sc->sc_memsize, 0, 233 &sc->sc_memh)) { 234 aprint_error_dev(self, "couldn't map registers\n"); 235 goto cleanup; 236 } 237 238 sc->sc_ih = acpi_intr_establish(self, 239 (uint64_t)(uintptr_t)aa->aa_node->ad_handle, 240 IPL_BIO, false, sdhc_intr, &sc->sc, device_xname(self)); 241 if (sc->sc_ih == NULL) { 242 aprint_error_dev(self, 243 "couldn't establish interrupt handler\n"); 244 goto unmap; 245 } 246 247 sc->sc.sc_host = kmem_zalloc(sizeof(struct sdhc_host *), KM_SLEEP); 248 249 sc->sc.sc_flags |= slot->flags; 250 251 /* Enable DMA transfer */ 252 sc->sc.sc_flags |= SDHC_FLAG_USE_DMA; 253 254 rv = acpi_dsd_bool(aa->aa_node->ad_handle, "non-removable", 255 &non_removable); 256 if (ACPI_SUCCESS(rv) && non_removable) 257 sc->sc.sc_flags |= SDHC_FLAG_NON_REMOVABLE; 258 259 /* Read clock frequency from device properties */ 260 rv = acpi_dsd_integer(aa->aa_node->ad_handle, "clock-frequency", 261 &clock_freq); 262 if (ACPI_SUCCESS(rv)) { 263 sc->sc.sc_clkbase = clock_freq / 1000; 264 sc->sc.sc_flags |= SDHC_FLAG_NO_CLKBASE; 265 } 266 267 /* Capability overrides */ 268 caps = caps_mask = 0; 269 acpi_dsd_integer(aa->aa_node->ad_handle, "sdhci-caps-mask", &caps_mask); 270 acpi_dsd_integer(aa->aa_node->ad_handle, "sdhci-caps", &caps); 271 if (caps || caps_mask) { 272 sc->sc.sc_caps = bus_space_read_4(sc->sc_memt, sc->sc_memh, 273 SDHC_CAPABILITIES); 274 sc->sc.sc_caps &= ~(caps_mask & 0xffffffff); 275 sc->sc.sc_caps |= (caps & 0xffffffff); 276 sc->sc.sc_caps2 = bus_space_read_4(sc->sc_memt, 277 sc->sc_memh, SDHC_CAPABILITIES2); 278 sc->sc.sc_caps2 &= ~(caps_mask >> 32); 279 sc->sc.sc_caps2 |= (caps >> 32); 280 sc->sc.sc_flags |= SDHC_FLAG_HOSTCAPS; 281 } 282 283 if (sdhc_host_found(&sc->sc, sc->sc_memt, sc->sc_memh, 284 sc->sc_memsize) != 0) { 285 aprint_error_dev(self, "couldn't initialize host\n"); 286 goto fail; 287 } 288 289 if (!pmf_device_register1(self, sdhc_suspend, sdhc_acpi_resume, 290 sdhc_shutdown)) { 291 aprint_error_dev(self, "couldn't establish powerhook\n"); 292 } 293 294 acpi_resource_cleanup(&res); 295 return; 296 297 fail: 298 if (sc->sc.sc_host != NULL) 299 kmem_free(sc->sc.sc_host, sizeof(struct sdhc_host *)); 300 sc->sc.sc_host = NULL; 301 if (sc->sc_ih != NULL) 302 acpi_intr_disestablish(sc->sc_ih); 303 sc->sc_ih = NULL; 304 unmap: 305 bus_space_unmap(sc->sc_memt, sc->sc_memh, sc->sc_memsize); 306 sc->sc_memsize = 0; 307 cleanup: 308 if (sc->sc_crs_buffer.Pointer) 309 ACPI_FREE(sc->sc_crs_buffer.Pointer); 310 sc->sc_crs_buffer.Pointer = NULL; 311 acpi_resource_cleanup(&res); 312 } 313 314 static int 315 sdhc_acpi_detach(device_t self, int flags) 316 { 317 struct sdhc_acpi_softc *sc = device_private(self); 318 int rv; 319 320 pmf_device_deregister(self); 321 322 rv = sdhc_detach(&sc->sc, flags); 323 if (rv) 324 return rv; 325 326 if (sc->sc_ih != NULL) 327 acpi_intr_disestablish(sc->sc_ih); 328 329 if (sc->sc.sc_host != NULL) 330 kmem_free(sc->sc.sc_host, sizeof(struct sdhc_host *)); 331 332 if (sc->sc_memsize > 0) 333 bus_space_unmap(sc->sc_memt, sc->sc_memh, sc->sc_memsize); 334 335 if (sc->sc_crs_buffer.Pointer) 336 ACPI_FREE(sc->sc_crs_buffer.Pointer); 337 338 return 0; 339 } 340 341 static bool 342 sdhc_acpi_resume(device_t self, const pmf_qual_t *qual) 343 { 344 struct sdhc_acpi_softc *sc = device_private(self); 345 ACPI_STATUS rv; 346 347 if (sc->sc_crs && sc->sc_srs) { 348 rv = AcpiSetCurrentResources(sc->sc_srs, &sc->sc_crs_buffer); 349 if (ACPI_FAILURE(rv)) 350 printf("%s: _SRS failed: %s\n", 351 device_xname(self), AcpiFormatException(rv)); 352 } 353 354 return sdhc_resume(self, qual); 355 } 356 357 static void 358 sdhc_acpi_intel_emmc_hw_reset(struct sdhc_softc *sc, struct sdhc_host *hp) 359 { 360 kmutex_t *plock = sdhc_host_lock(hp); 361 uint8_t reg; 362 363 mutex_enter(plock); 364 365 reg = sdhc_host_read_1(hp, SDHC_POWER_CTL); 366 reg |= 0x10; 367 sdhc_host_write_1(hp, SDHC_POWER_CTL, reg); 368 369 sdmmc_delay(10); 370 371 reg &= ~0x10; 372 sdhc_host_write_1(hp, SDHC_POWER_CTL, reg); 373 374 sdmmc_delay(1000); 375 376 mutex_exit(plock); 377 } 378 379 static int 380 sdhc_acpi_rockchip_bus_clock(struct sdhc_softc *sc, int freq) 381 { 382 struct sdhc_acpi_softc *asc = (struct sdhc_acpi_softc *)sc; 383 ACPI_STATUS rv; 384 ACPI_OBJECT targetfreq; 385 ACPI_OBJECT arg3; 386 ACPI_INTEGER actfreq; 387 388 targetfreq.Integer.Type = ACPI_TYPE_INTEGER; 389 targetfreq.Integer.Value = freq * 1000; 390 arg3.Package.Type = ACPI_TYPE_PACKAGE; 391 arg3.Package.Count = 1; 392 arg3.Package.Elements = &targetfreq; 393 394 rv = acpi_dsm_integer(asc->sc_handle, sdhc_acpi_rockchip_dsm_uuid, 395 ROCKCHIP_DSM_REV, ROCKCHIP_DSM_FUNC_SET_CARD_CLOCK, &arg3, 396 &actfreq); 397 if (ACPI_FAILURE(rv)) { 398 aprint_error_dev(sc->sc_dev, 399 "eMMC Set Card Clock DSM failed: %s\n", 400 AcpiFormatException(rv)); 401 return ENXIO; 402 } 403 404 aprint_debug_dev(sc->sc_dev, 405 "eMMC Set Card Clock DSM returned %" PRIu64 " Hz\n", actfreq); 406 if (actfreq == 0 && freq != 0) { 407 return EINVAL; 408 } 409 410 return 0; 411 } 412
Indexes created Sun Oct 25 00:26:45 UTC 2026