1 /* $NetBSD: mainbus.c,v 1.11 2025/09/06 22:53:48 thorpej Exp $ */ 2 3 /* 4 * Copyright (c) 2007 5 * Internet Initiative Japan, Inc. All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 #include <sys/cdefs.h> 30 __KERNEL_RCSID(0, "$NetBSD: mainbus.c,v 1.11 2025/09/06 22:53:48 thorpej Exp $"); 31 32 #define _MIPS_BUS_DMA_PRIVATE 33 34 #include <sys/param.h> 35 #include <sys/systm.h> 36 #include <sys/device.h> 37 #include <sys/bus.h> 38 39 #include <mips/cavium/include/mainbusvar.h> 40 #include <mips/cavium/octeonvar.h> 41 42 #include <dev/fdt/fdtvar.h> 43 #include <dev/fdt/fdt_console.h> 44 45 static int mainbus_match(device_t, struct cfdata *, void *); 46 static void mainbus_attach(device_t, device_t, void *); 47 static void mainbus_attach_static(device_t); 48 static void mainbus_attach_devicetree(device_t); 49 static int mainbus_submatch(device_t, cfdata_t, const int *, void *); 50 static int mainbus_print(void *, const char *); 51 52 static void simplebus_bus_io_init(bus_space_tag_t, void *); 53 54 CFATTACH_DECL_NEW(mainbus, sizeof(device_t), mainbus_match, mainbus_attach, 55 NULL, NULL); 56 57 static struct mips_bus_space simplebus_bus_tag; 58 59 static struct mips_bus_dma_tag simplebus_dma_tag = { 60 ._cookie = NULL, 61 ._wbase = 0, 62 ._bounce_alloc_lo = 0, 63 ._bounce_alloc_hi = 0, 64 ._dmamap_ops = _BUS_DMAMAP_OPS_INITIALIZER, 65 ._dmamem_ops = _BUS_DMAMEM_OPS_INITIALIZER, 66 ._dmatag_ops = _BUS_DMATAG_OPS_INITIALIZER, 67 }; 68 69 static int 70 mainbus_match(device_t parent, struct cfdata *match, void *aux) 71 { 72 static int once = 0; 73 74 if (once != 0) 75 return 0; 76 once = 1; 77 78 return 1; 79 } 80 81 static void 82 mainbus_attach(device_t parent, device_t self, void *aux) 83 { 84 aprint_normal("\n"); 85 86 if (fdtbus_get_data() != NULL) { 87 mainbus_attach_devicetree(self); 88 } else { 89 mainbus_attach_static(self); 90 } 91 } 92 93 static void 94 mainbus_attach_static(device_t self) 95 { 96 struct mainbus_attach_args aa; 97 int i; 98 99 for (i = 0; i < (int)mainbus_ndevs; i++) { 100 aa.aa_name = mainbus_devs[i]; 101 config_found(self, &aa, mainbus_print, 102 CFARGS(.submatch = mainbus_submatch, 103 .iattr = "mainbus")); 104 } 105 } 106 107 extern struct octeon_config octeon_configuration; 108 extern void octpow_bootstrap(struct octeon_config *); 109 extern void octfpa_bootstrap(struct octeon_config *); 110 111 static void 112 mainbus_attach_devicetree(device_t self) 113 { 114 const struct fdt_console *cons = fdtbus_get_console(); 115 struct mainbus_attach_args aa; 116 struct fdt_attach_args faa; 117 u_int uart_freq; 118 119 aa.aa_name = "cpunode"; 120 config_found(self, &aa, mainbus_print, 121 CFARGS(.submatch = mainbus_submatch, 122 .iattr = "mainbus")); 123 124 aa.aa_name = "iobus"; 125 config_found(self, &aa, mainbus_print, 126 CFARGS(.submatch = mainbus_submatch, 127 .iattr = "mainbus")); 128 129 simplebus_bus_io_init(&simplebus_bus_tag, NULL); 130 131 faa.faa_bst = &simplebus_bus_tag; 132 faa.faa_dmat = &simplebus_dma_tag; 133 faa.faa_name = ""; 134 135 if (cons != NULL) { 136 faa.faa_phandle = fdtbus_get_stdout_phandle(); 137 138 if (of_getprop_uint32(faa.faa_phandle, "clock-frequency", 139 &uart_freq) != 0) { 140 uart_freq = octeon_ioclock_speed(); 141 } 142 143 if (uart_freq > 0) 144 delay(640000000 / uart_freq); 145 146 cons->consinit(&faa, uart_freq); 147 } 148 149 faa.faa_phandle = OF_peer(0); 150 config_found(self, &faa, NULL, 151 CFARGS(.iattr = "fdt")); 152 } 153 154 static int 155 mainbus_submatch(device_t parent, cfdata_t cf, const int *locs, void *aux) 156 { 157 struct mainbus_attach_args *aa = aux; 158 159 if (strcmp(cf->cf_name, aa->aa_name) != 0) 160 return 0; 161 162 return config_match(parent, cf, aux); 163 } 164 165 static int 166 mainbus_print(void *aux, const char *pnp) 167 { 168 struct mainbus_attach_args *aa = aux; 169 170 if (pnp != 0) 171 return QUIET; 172 173 if (pnp) 174 aprint_normal("%s at %s", aa->aa_name, pnp); 175 176 return UNCONF; 177 } 178 179 /* ---- bus_space(9) */ 180 #define CHIP simplebus 181 #define CHIP_IO 182 #define CHIP_ACCESS_SIZE 8 183 184 #define CHIP_W1_BUS_START(v) 0x0000000000000000ULL 185 #define CHIP_W1_BUS_END(v) 0x7fffffffffffffffULL 186 #define CHIP_W1_SYS_START(v) 0x8000000000000000ULL 187 #define CHIP_W1_SYS_END(v) 0xffffffffffffffffULL 188 189 #include <mips/mips/bus_space_alignstride_chipdep.c> 190 191 bus_space_tag_t 192 fdtbus_bus_tag_create(int phandle, uint32_t flags) 193 { 194 return &simplebus_bus_tag; 195 } 196
Indexes created Sun Oct 25 00:26:45 UTC 2026