1 /* $NetBSD: ti_gate_clock.c,v 1.2 2026/10/18 20:43:09 yurix Exp $ */ 2 3 /*- 4 * Copyright (c) 2025 Rui-Xiang Guo 5 * Copyright (c) 2019 Jared McNeill <jmcneill (at) invisible.ca> 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 22 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 23 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 24 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 25 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 */ 29 30 #include <sys/cdefs.h> 31 __KERNEL_RCSID(0, "$NetBSD: ti_gate_clock.c,v 1.2 2026/10/18 20:43:09 yurix Exp $"); 32 33 #include <sys/param.h> 34 #include <sys/systm.h> 35 #include <sys/device.h> 36 #include <sys/kmem.h> 37 #include <sys/bus.h> 38 39 #include <dev/clk/clk_backend.h> 40 41 #include <dev/fdt/fdtvar.h> 42 43 static int ti_gate_clock_match(device_t, cfdata_t, void *); 44 static void ti_gate_clock_attach(device_t, device_t, void *); 45 46 static struct clk *ti_gate_clock_decode(device_t, int, const void *, size_t); 47 48 static const struct fdtbus_clock_controller_func ti_gate_clock_fdt_funcs = { 49 .decode = ti_gate_clock_decode 50 }; 51 52 static struct clk *ti_gate_clock_get(void *, const char *); 53 static void ti_gate_clock_put(void *, struct clk *); 54 static int ti_gate_clock_enable(void *, struct clk *); 55 static int ti_gate_clock_disable(void *, struct clk *); 56 static struct clk *ti_gate_clock_get_parent(void *, struct clk *); 57 static u_int ti_gate_clock_get_rate(void *, struct clk *); 58 59 static const struct clk_funcs ti_gate_clock_clk_funcs = { 60 .get = ti_gate_clock_get, 61 .put = ti_gate_clock_put, 62 .enable = ti_gate_clock_enable, 63 .disable = ti_gate_clock_disable, 64 .get_parent = ti_gate_clock_get_parent, 65 .get_rate = ti_gate_clock_get_rate, 66 }; 67 68 struct ti_gate_clock_softc { 69 device_t sc_dev; 70 int sc_phandle; 71 bus_space_tag_t sc_bst; 72 bus_space_handle_t sc_bsh; 73 74 struct clk_domain sc_clkdom; 75 struct clk sc_clk; 76 77 uint32_t sc_shift; 78 }; 79 80 #define RD4(sc, reg) \ 81 bus_space_read_4((sc)->sc_bst, (sc)->sc_bsh, (reg)) 82 #define WR4(sc, reg, val) \ 83 bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val)) 84 85 CFATTACH_DECL_NEW(ti_gate_clock, sizeof(struct ti_gate_clock_softc), 86 ti_gate_clock_match, ti_gate_clock_attach, NULL, NULL); 87 88 static const struct device_compatible_entry compat_data[] = { 89 { .compat = "ti,composite-no-wait-gate-clock" }, 90 { .compat = "ti,gate-clock" }, 91 DEVICE_COMPAT_EOL 92 }; 93 94 static int 95 ti_gate_clock_match(device_t parent, cfdata_t cf, void *aux) 96 { 97 const struct fdt_attach_args *faa = aux; 98 99 return of_compatible_match(faa->faa_phandle, compat_data); 100 } 101 102 static void 103 ti_gate_clock_attach(device_t parent, device_t self, void *aux) 104 { 105 struct ti_gate_clock_softc * const sc = device_private(self); 106 const struct fdt_attach_args *faa = aux; 107 const int phandle = faa->faa_phandle; 108 bus_addr_t addr, base_addr; 109 u_int shift; 110 111 const int prcm_phandle = OF_parent(OF_parent(phandle)); 112 if (fdtbus_get_reg(phandle, 0, &addr, NULL) != 0 || 113 fdtbus_get_reg(prcm_phandle, 0, &base_addr, NULL) != 0) { 114 aprint_error(": couldn't get registers\n"); 115 return; 116 } 117 118 sc->sc_dev = self; 119 sc->sc_phandle = phandle; 120 sc->sc_bst = faa->faa_bst; 121 if (bus_space_map(sc->sc_bst, base_addr + addr, 4, 0, &sc->sc_bsh) != 0) { 122 aprint_error(": couldn't map registers\n"); 123 return; 124 } 125 126 if (of_getprop_uint32(phandle, "ti,bit-shift", &shift) != 0) 127 shift = 0; 128 129 sc->sc_shift = shift; 130 131 sc->sc_clkdom.name = device_xname(self); 132 sc->sc_clkdom.funcs = &ti_gate_clock_clk_funcs; 133 sc->sc_clkdom.priv = sc; 134 135 sc->sc_clk.domain = &sc->sc_clkdom; 136 sc->sc_clk.name = kmem_asprintf("%s", faa->faa_name); 137 clk_attach(&sc->sc_clk); 138 139 aprint_naive("\n"); 140 aprint_normal(": TI gate clock (%s)\n", sc->sc_clk.name); 141 142 fdtbus_register_clock_controller(self, phandle, &ti_gate_clock_fdt_funcs); 143 } 144 145 static struct clk * 146 ti_gate_clock_decode(device_t dev, int cc_phandle, const void *data, 147 size_t len) 148 { 149 struct ti_gate_clock_softc * const sc = device_private(dev); 150 151 return &sc->sc_clk; 152 } 153 154 static struct clk * 155 ti_gate_clock_get(void *priv, const char *name) 156 { 157 struct ti_gate_clock_softc * const sc = priv; 158 159 return &sc->sc_clk; 160 } 161 162 static void 163 ti_gate_clock_put(void *priv, struct clk *clk) 164 { 165 } 166 167 static int 168 ti_gate_clock_enable(void *priv, struct clk *clk) 169 { 170 struct ti_gate_clock_softc * const sc = priv; 171 struct clk *clk_parent = clk_get_parent(clk); 172 uint32_t val; 173 174 val = RD4(sc, 0); 175 val |= __BIT(sc->sc_shift); 176 WR4(sc, 0, val); 177 178 return clk_enable(clk_parent); 179 } 180 181 static int 182 ti_gate_clock_disable(void *priv, struct clk *clk) 183 { 184 struct ti_gate_clock_softc * const sc = priv; 185 struct clk *clk_parent = clk_get_parent(clk); 186 uint32_t val; 187 188 val = RD4(sc, 0); 189 val &= ~__BIT(sc->sc_shift); 190 WR4(sc, 0, val); 191 192 return clk_disable(clk_parent); 193 } 194 195 static struct clk * 196 ti_gate_clock_get_parent(void *priv, struct clk *clk) 197 { 198 struct ti_gate_clock_softc * const sc = priv; 199 200 return fdtbus_clock_get_index(sc->sc_phandle, 0); 201 } 202 203 static u_int 204 ti_gate_clock_get_rate(void *priv, struct clk *clkp) 205 { 206 struct ti_gate_clock_softc * const sc = priv; 207 208 /* check if the clock is enabled*/ 209 uint32_t status = RD4(sc, 0); 210 if (status & __BIT(sc->sc_shift)) 211 return 0; 212 213 struct clk *parent = clk_get_parent(clkp); 214 if (parent == NULL) { 215 /* 216 * clk_get_parent is allowed to return NULL, in which case there 217 * is no way to figure out the clock rate. 218 */ 219 return 0; 220 } 221 222 return clk_get_rate(parent); 223 } 224
Indexes created Mon Oct 26 00:26:21 UTC 2026