1/* $NetBSD: ti_gate_clock.c,v 1.1 2025/12/16 12:20:22 skrll Exp $ */
2
3/*-
4 * Copyright (c) 2025 Rui-Xiang Guo
5 * Copyright (c) 2019 Jared McNeill <jmcneill@invisible.ca>
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 *    notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 *    notice, this list of conditions and the following disclaimer in the
15 *    documentation and/or other materials provided with the distribution.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
22 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
23 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
24 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
25 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 * SUCH DAMAGE.
28 */
29
30#include <sys/cdefs.h>
31__KERNEL_RCSID(0, "$NetBSD: ti_gate_clock.c,v 1.1 2025/12/16 12:20:22 skrll Exp $");
32
33#include <sys/param.h>
34#include <sys/systm.h>
35#include <sys/device.h>
36#include <sys/kmem.h>
37#include <sys/bus.h>
38
39#include <dev/clk/clk_backend.h>
40
41#include <dev/fdt/fdtvar.h>
42
43static int ti_gate_clock_match(device_t, cfdata_t, void *);
44static void ti_gate_clock_attach(device_t, device_t, void *);
45
46static struct clk *ti_gate_clock_decode(device_t, int, const void *, size_t);
47
48static const struct fdtbus_clock_controller_func ti_gate_clock_fdt_funcs = {
49	.decode = ti_gate_clock_decode
50};
51
52static struct clk *ti_gate_clock_get(void *, const char *);
53static void ti_gate_clock_put(void *, struct clk *);
54static int ti_gate_clock_enable(void *, struct clk *);
55static int ti_gate_clock_disable(void *, struct clk *);
56static struct clk *ti_gate_clock_get_parent(void *, struct clk *);
57
58static const struct clk_funcs ti_gate_clock_clk_funcs = {
59	.get = ti_gate_clock_get,
60	.put = ti_gate_clock_put,
61	.enable = ti_gate_clock_enable,
62	.disable = ti_gate_clock_disable,
63	.get_parent = ti_gate_clock_get_parent,
64};
65
66struct ti_gate_clock_softc {
67	device_t		sc_dev;
68	int			sc_phandle;
69	bus_space_tag_t		sc_bst;
70	bus_space_handle_t	sc_bsh;
71
72	struct clk_domain	sc_clkdom;
73	struct clk		sc_clk;
74
75	uint32_t		sc_shift;
76};
77
78#define	RD4(sc, reg)			\
79	bus_space_read_4((sc)->sc_bst, (sc)->sc_bsh, (reg))
80#define	WR4(sc, reg, val)		\
81	bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))
82
83CFATTACH_DECL_NEW(ti_gate_clock, sizeof(struct ti_gate_clock_softc),
84    ti_gate_clock_match, ti_gate_clock_attach, NULL, NULL);
85
86static const struct device_compatible_entry compat_data[] = {
87	{ .compat = "ti,composite-no-wait-gate-clock" },
88	{ .compat = "ti,gate-clock" },
89	DEVICE_COMPAT_EOL
90};
91
92static int
93ti_gate_clock_match(device_t parent, cfdata_t cf, void *aux)
94{
95	const struct fdt_attach_args *faa = aux;
96
97	return of_compatible_match(faa->faa_phandle, compat_data);
98}
99
100static void
101ti_gate_clock_attach(device_t parent, device_t self, void *aux)
102{
103	struct ti_gate_clock_softc * const sc = device_private(self);
104	const struct fdt_attach_args *faa = aux;
105	const int phandle = faa->faa_phandle;
106	bus_addr_t addr, base_addr;
107	u_int shift;
108
109	const int prcm_phandle = OF_parent(OF_parent(phandle));
110	if (fdtbus_get_reg(phandle, 0, &addr, NULL) != 0 ||
111	    fdtbus_get_reg(prcm_phandle, 0, &base_addr, NULL) != 0) {
112		aprint_error(": couldn't get registers\n");
113		return;
114	}
115
116	sc->sc_dev = self;
117	sc->sc_phandle = phandle;
118	sc->sc_bst = faa->faa_bst;
119	if (bus_space_map(sc->sc_bst, base_addr + addr, 4, 0, &sc->sc_bsh) != 0) {
120		aprint_error(": couldn't map registers\n");
121		return;
122	}
123
124	if (of_getprop_uint32(phandle, "ti,bit-shift", &shift) != 0)
125		shift = 0;
126
127	sc->sc_shift = shift;
128
129	sc->sc_clkdom.name = device_xname(self);
130	sc->sc_clkdom.funcs = &ti_gate_clock_clk_funcs;
131	sc->sc_clkdom.priv = sc;
132
133	sc->sc_clk.domain = &sc->sc_clkdom;
134	sc->sc_clk.name = kmem_asprintf("%s", faa->faa_name);
135	clk_attach(&sc->sc_clk);
136
137	aprint_naive("\n");
138	aprint_normal(": TI gate clock (%s)\n", sc->sc_clk.name);
139
140	fdtbus_register_clock_controller(self, phandle, &ti_gate_clock_fdt_funcs);
141}
142
143static struct clk *
144ti_gate_clock_decode(device_t dev, int cc_phandle, const void *data,
145		     size_t len)
146{
147	struct ti_gate_clock_softc * const sc = device_private(dev);
148
149	return &sc->sc_clk;
150}
151
152static struct clk *
153ti_gate_clock_get(void *priv, const char *name)
154{
155	struct ti_gate_clock_softc * const sc = priv;
156
157	return &sc->sc_clk;
158}
159
160static void
161ti_gate_clock_put(void *priv, struct clk *clk)
162{
163}
164
165static int
166ti_gate_clock_enable(void *priv, struct clk *clk)
167{
168	struct ti_gate_clock_softc * const sc = priv;
169	struct clk *clk_parent = clk_get_parent(clk);
170	uint32_t val;
171
172	val = RD4(sc, 0);
173	val |= __BIT(sc->sc_shift);
174	WR4(sc, 0, val);
175
176	return clk_enable(clk_parent);
177}
178
179static int
180ti_gate_clock_disable(void *priv, struct clk *clk)
181{
182	struct ti_gate_clock_softc * const sc = priv;
183	struct clk *clk_parent = clk_get_parent(clk);
184	uint32_t val;
185
186	val = RD4(sc, 0);
187	val &= ~__BIT(sc->sc_shift);
188	WR4(sc, 0, val);
189
190	return clk_disable(clk_parent);
191}
192
193static struct clk *
194ti_gate_clock_get_parent(void *priv, struct clk *clk)
195{
196	struct ti_gate_clock_softc * const sc = priv;
197
198	return fdtbus_clock_get_index(sc->sc_phandle, 0);
199}
200