1 /* $NetBSD: spl_stubs.c,v 1.4 2026/10/06 08:18:37 skrll Exp $ */ 2 3 /*- 4 * Copyright (c) 2010 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Matt Thomas <matt (at) 3am-software.com>. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include <sys/cdefs.h> 33 __KERNEL_RCSID(0, "$NetBSD: spl_stubs.c,v 1.4 2026/10/06 08:18:37 skrll Exp $"); 34 35 #define __INTR_PRIVATE 36 37 #include <sys/param.h> 38 39 #include <mips/cache.h> 40 #include <mips/intr.h> 41 #include <mips/locore.h> 42 43 int 44 splhigh(void) 45 { 46 return (*mips_splsw.splsw_splhigh)(); 47 } 48 49 int 50 splhigh_noprof(void) 51 { 52 return (*mips_splsw.splsw_splhigh_noprof)(); 53 } 54 55 int 56 splsched(void) 57 { 58 return (*mips_splsw.splsw_splsched)(); 59 } 60 61 int 62 splvm(void) 63 { 64 return (*mips_splsw.splsw_splvm)(); 65 } 66 67 int 68 splsoftserial(void) 69 { 70 return (*mips_splsw.splsw_splsoftserial)(); 71 } 72 73 int 74 splsoftnet(void) 75 { 76 return (*mips_splsw.splsw_splsoftnet)(); 77 } 78 79 int 80 splsoftbio(void) 81 { 82 return (*mips_splsw.splsw_splsoftbio)(); 83 } 84 85 int 86 splsoftclock(void) 87 { 88 return (*mips_splsw.splsw_splsoftclock)(); 89 } 90 91 void 92 spl0(void) 93 { 94 (*mips_splsw.splsw_spl0)(); 95 } 96 97 void 98 splx(int s) 99 { 100 (*mips_splsw.splsw_splx)(s); 101 } 102 103 void 104 splx_noprof(int s) 105 { 106 (*mips_splsw.splsw_splx_noprof)(s); 107 } 108 109 int 110 splraise(int s) 111 { 112 return (*mips_splsw.splsw_splraise)(s); 113 } 114 115 int 116 splintr(uint32_t *p) 117 { 118 return (*mips_splsw.splsw_splintr)(p); 119 } 120 121 void 122 _setsoftintr(uint32_t m) 123 { 124 (*mips_splsw.splsw__setsoftintr)(m); 125 } 126 127 void 128 _clrsoftintr(uint32_t m) 129 { 130 (*mips_splsw.splsw__clrsoftintr)(m); 131 } 132 133 void 134 splcheck(void) 135 { 136 (*mips_splsw.splsw_splcheck)(); 137 } 138