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    Searched refs:INT_MASK (Results 1 - 11 of 11) sorted by relevancy

  /src/sys/arch/bebox/stand/boot/
fd.c 647 u_int INT_MASK;
661 outb(INT_CTL1, (INT_MASK = ~(1 << CASCADE_IRQ)));
707 outb(INT_CTL1, INT_MASK);
  /src/sys/arch/mips/adm5120/dev/
if_admsw.c 289 REG_WRITE(ADMSW_INT_MASK, INT_MASK);
290 REG_WRITE(ADMSW_INT_ST, INT_MASK);
1037 REG_WRITE(ADMSW_INT_ST, INT_MASK);
1082 REG_WRITE(ADMSW_INT_ST, INT_MASK);
1085 REG_WRITE(ADMSW_INT_MASK, INT_MASK);
if_admswreg.h 225 #define INT_MASK 0x1FDEFFF
  /src/external/gpl3/gdb/dist/sim/ppc/
powerpc.igen 136 #define PPC_INSN_FROM_SPR(INT_MASK, SPR) \
139 ppc_insn_from_spr(MY_INDEX, cpu_model(processor), INT_MASK, SPR); \
142 #define PPC_INSN_TO_SPR(INT_MASK, SPR) \
145 ppc_insn_to_spr(MY_INDEX, cpu_model(processor), INT_MASK, SPR); \
148 #define PPC_INSN_MFCR(INT_MASK) \
151 ppc_insn_mfcr(MY_INDEX, cpu_model(processor), INT_MASK); \
154 #define PPC_INSN_MTCR(INT_MASK, FXM) \
157 ppc_insn_mtcr(MY_INDEX, cpu_model(processor), INT_MASK, FXM); \
339 void::model-static::model_trace_make_busy:model_data *model_ptr, uint32_t int_mask, uint32_t fp_mask, uint32_t cr_mask
341 if (int_mask) {
    [all...]
  /src/external/gpl3/gdb.old/dist/sim/ppc/
powerpc.igen 136 #define PPC_INSN_FROM_SPR(INT_MASK, SPR) \
139 ppc_insn_from_spr(MY_INDEX, cpu_model(processor), INT_MASK, SPR); \
142 #define PPC_INSN_TO_SPR(INT_MASK, SPR) \
145 ppc_insn_to_spr(MY_INDEX, cpu_model(processor), INT_MASK, SPR); \
148 #define PPC_INSN_MFCR(INT_MASK) \
151 ppc_insn_mfcr(MY_INDEX, cpu_model(processor), INT_MASK); \
154 #define PPC_INSN_MTCR(INT_MASK, FXM) \
157 ppc_insn_mtcr(MY_INDEX, cpu_model(processor), INT_MASK, FXM); \
339 void::model-static::model_trace_make_busy:model_data *model_ptr, uint32_t int_mask, uint32_t fp_mask, uint32_t cr_mask
341 if (int_mask) {
    [all...]
  /src/sys/external/bsd/drm2/dist/drm/radeon/
sid.h 821 #define INT_MASK 0x6b40
evergreend.h 1286 #define INT_MASK 0x6b40
radeon_evergreen.c 4482 WREG32(INT_MASK + crtc_offsets[i], 0);
4582 rdev, INT_MASK + crtc_offsets[i],
radeon_si.c 5972 WREG32(INT_MASK + crtc_offsets[i], 0);
6126 rdev, INT_MASK + crtc_offsets[i], VBLANK_INT_MASK,
  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
sid.h 825 #define INT_MASK 0x1AD0
  /src/sys/external/bsd/drm2/dist/drm/amd/include/
navi10_enum.h 2074 * INT_MASK enum
2077 typedef enum INT_MASK {
2080 } INT_MASK;

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