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  /src/external/gpl3/gdb/dist/sim/mips/
m16run.c 40 address_word cia = CPU_PC_GET (cpu); local
50 if ((cia & 1))
52 m16_instruction_word instruction_0 = IMEM16 (cia);
53 nia = m16_idecode_issue (sd, instruction_0, cia);
57 m32_instruction_word instruction_0 = IMEM32 (cia);
58 nia = m32_idecode_issue (sd, instruction_0, cia);
62 cia = nia;
67 CPU_PC_SET (CPU, cia);
69 cia = CPU_PC_GET (CPU);
micromipsrun.c 45 address_word cia,
50 micromips16_instruction_word instruction_0 = IMEM16_MICROMIPS (cia);
53 return micromips16_idecode_issue (sd, instruction_0, cia);
56 micromips32_instruction_word instruction_0 = IMEM32_MICROMIPS (cia);
57 return micromips32_idecode_issue (sd, instruction_0, cia);
62 micromips16_instruction_word instruction_0 = IMEM16_MICROMIPS (cia);
65 return micromips16_idecode_issue (sd, instruction_0, cia);
67 sim_engine_abort (sd, cpu, cia,
72 micromips32_instruction_word instruction_0 = IMEM32_MICROMIPS (cia);
73 return micromips32_idecode_issue (sd, instruction_0, cia);
86 micromips32_instruction_address cia = CPU_PC_GET (cpu); local
    [all...]
sim-main.c 54 address_word cia,
94 unsigned_16 val = sim_core_read_aligned_16 (CPU, cia, read_map, pAddr);
100 value = sim_core_read_aligned_8 (CPU, cia, read_map, pAddr);
103 value = sim_core_read_misaligned_7 (CPU, cia, read_map, pAddr);
106 value = sim_core_read_misaligned_6 (CPU, cia, read_map, pAddr);
109 value = sim_core_read_misaligned_5 (CPU, cia, read_map, pAddr);
112 value = sim_core_read_aligned_4 (CPU, cia, read_map, pAddr);
115 value = sim_core_read_misaligned_3 (CPU, cia, read_map, pAddr);
118 value = sim_core_read_aligned_2 (CPU, cia, read_map, pAddr);
121 value = sim_core_read_aligned_1 (CPU, cia, read_map, pAddr)
    [all...]
  /src/external/gpl3/gdb.old/dist/sim/mips/
m16run.c 40 address_word cia = CPU_PC_GET (cpu); local
50 if ((cia & 1))
52 m16_instruction_word instruction_0 = IMEM16 (cia);
53 nia = m16_idecode_issue (sd, instruction_0, cia);
57 m32_instruction_word instruction_0 = IMEM32 (cia);
58 nia = m32_idecode_issue (sd, instruction_0, cia);
62 cia = nia;
67 CPU_PC_SET (CPU, cia);
69 cia = CPU_PC_GET (CPU);
micromipsrun.c 45 address_word cia,
50 micromips16_instruction_word instruction_0 = IMEM16_MICROMIPS (cia);
53 return micromips16_idecode_issue (sd, instruction_0, cia);
56 micromips32_instruction_word instruction_0 = IMEM32_MICROMIPS (cia);
57 return micromips32_idecode_issue (sd, instruction_0, cia);
62 micromips16_instruction_word instruction_0 = IMEM16_MICROMIPS (cia);
65 return micromips16_idecode_issue (sd, instruction_0, cia);
67 sim_engine_abort (sd, cpu, cia,
72 micromips32_instruction_word instruction_0 = IMEM32_MICROMIPS (cia);
73 return micromips32_idecode_issue (sd, instruction_0, cia);
86 micromips32_instruction_address cia = CPU_PC_GET (cpu); local
    [all...]
sim-main.c 54 address_word cia,
94 unsigned_16 val = sim_core_read_aligned_16 (CPU, cia, read_map, pAddr);
100 value = sim_core_read_aligned_8 (CPU, cia, read_map, pAddr);
103 value = sim_core_read_misaligned_7 (CPU, cia, read_map, pAddr);
106 value = sim_core_read_misaligned_6 (CPU, cia, read_map, pAddr);
109 value = sim_core_read_misaligned_5 (CPU, cia, read_map, pAddr);
112 value = sim_core_read_aligned_4 (CPU, cia, read_map, pAddr);
115 value = sim_core_read_misaligned_3 (CPU, cia, read_map, pAddr);
118 value = sim_core_read_aligned_2 (CPU, cia, read_map, pAddr);
121 value = sim_core_read_aligned_1 (CPU, cia, read_map, pAddr)
    [all...]
  /src/external/gpl3/gdb.old/dist/sim/common/
sim-run.c 37 sim_cia cia; local
41 cia = CPU_PC_GET (cpu);
44 instruction_word insn = IMEM32 (cia);
45 cia = idecode_issue (sd, insn, cia);
49 CPU_PC_SET (cpu, cia);
  /src/external/gpl3/gdb/dist/sim/common/
sim-run.c 37 sim_cia cia; local
41 cia = CPU_PC_GET (cpu);
44 instruction_word insn = IMEM32 (cia);
45 cia = idecode_issue (sd, insn, cia);
49 CPU_PC_SET (cpu, cia);
  /src/external/gpl3/gdb/dist/sim/ppc/
interrupts.c 97 unsigned_word cia,
108 cpu_error(processor, cia,
109 "double interrupt - MSR[RI] bit clear when attempting to deliver interrupt, cia=0x%lx, msr=0x%lx; srr0=0x%lx(cia), srr1=0x%lx(msr); trap-vector=0x%lx, trap-msr=0x%lx",
110 (unsigned long)cia,
117 SRR0 = (spreg)(cia);
121 cpu_synchronize_context(processor, cia);
129 unsigned_word cia)
135 cpu_error(processor, cia, "machine-check interrupt");
138 TRACE(trace_interrupts, ("machine-check interrupt - cia=0x%lx\n"
452 unsigned_word cia = cpu_get_program_counter(processor); local
460 unsigned_word cia = cpu_get_program_counter(processor); local
468 unsigned_word cia = cpu_get_program_counter(processor); local
    [all...]
vm_n.h 38 unsigned_word cia)
41 unsigned ra = vm_real_data_addr(map, ea, 1/*is-read*/, processor, cia);
45 val = XCONCAT2(core_map_read_,N)(map->read, ra, processor, cia);
47 mon_read(ea, ra, sizeof(unsigned_N), processor, cia);
48 TRACE(trace_load_store, ("load cia=0x%lx ea=0x%lx N=%ld val=0x%lx\n",
49 (long)cia, (long)ea, (long)sizeof(unsigned_N), (long)val));
55 alignment_interrupt(processor, cia, ea);
60 if (vm_data_map_read_buffer(map, &val, ea, sizeof(unsigned_N), processor, cia)
62 cpu_error(processor, cia, "misaligned %zu byte read to 0x%lx failed",
68 unsigned ra = vm_real_data_addr(map, ea, 1, processor, cia);
    [all...]
idecode_branch.h 33 ppc_ia target = cia + 4; \
39 ("UPDATE_LK - update_LK=%d lr=0x%x cia=0x%x\n", \
40 update_LK, LR, cia); \
55 ppc_ia target = cia + ADDRESS; \
59 ("BRANCH - update_AA=%d update_LK=%d nia=0x%x cia=0x%x\n", \
60 update_AA, update_LK, nia, cia); \
interrupts.h 73 unsigned_word cia,
81 unsigned_word cia,
87 unsigned_word cia,
103 unsigned_word cia,
109 unsigned_word cia);
114 unsigned_word cia);
119 unsigned_word cia);
124 unsigned_word cia);
os_emul.h 43 unsigned_word cia);
56 unsigned_word cia,
vm.h 53 unsigned_word cia);
59 unsigned_word cia);
73 unsigned_word cia);
83 unsigned_word cia);
92 unsigned_word cia);
103 unsigned_word cia);
121 unsigned_word cia);
140 unsigned_word cia);
corefile-n.h 37 unsigned_word cia)
43 cia,
53 cia) != sizeof(unsigned_N))
68 unsigned_word cia)
74 cia,
84 cia) != sizeof(unsigned_N))
emul_generic.h 59 unsigned_word cia,
63 unsigned_word cia,
88 unsigned_word cia);
111 unsigned_word cia);
139 unsigned_word cia);
144 unsigned_word cia);
150 unsigned_word cia);
157 unsigned_word cia);
164 unsigned_word cia);
  /src/external/gpl3/gdb.old/dist/sim/ppc/
interrupts.c 97 unsigned_word cia,
108 cpu_error(processor, cia,
109 "double interrupt - MSR[RI] bit clear when attempting to deliver interrupt, cia=0x%lx, msr=0x%lx; srr0=0x%lx(cia), srr1=0x%lx(msr); trap-vector=0x%lx, trap-msr=0x%lx",
110 (unsigned long)cia,
117 SRR0 = (spreg)(cia);
121 cpu_synchronize_context(processor, cia);
129 unsigned_word cia)
135 cpu_error(processor, cia, "machine-check interrupt");
138 TRACE(trace_interrupts, ("machine-check interrupt - cia=0x%lx\n"
452 unsigned_word cia = cpu_get_program_counter(processor); local
460 unsigned_word cia = cpu_get_program_counter(processor); local
468 unsigned_word cia = cpu_get_program_counter(processor); local
    [all...]
vm_n.h 38 unsigned_word cia)
41 unsigned ra = vm_real_data_addr(map, ea, 1/*is-read*/, processor, cia);
45 val = XCONCAT2(core_map_read_,N)(map->read, ra, processor, cia);
47 mon_read(ea, ra, sizeof(unsigned_N), processor, cia);
48 TRACE(trace_load_store, ("load cia=0x%lx ea=0x%lx N=%ld val=0x%lx\n",
49 (long)cia, (long)ea, (long)sizeof(unsigned_N), (long)val));
55 alignment_interrupt(processor, cia, ea);
60 if (vm_data_map_read_buffer(map, &val, ea, sizeof(unsigned_N), processor, cia)
62 cpu_error(processor, cia, "misaligned %zu byte read to 0x%lx failed",
68 unsigned ra = vm_real_data_addr(map, ea, 1, processor, cia);
    [all...]
idecode_branch.h 33 ppc_ia target = cia + 4; \
39 ("UPDATE_LK - update_LK=%d lr=0x%x cia=0x%x\n", \
40 update_LK, LR, cia); \
55 ppc_ia target = cia + ADDRESS; \
59 ("BRANCH - update_AA=%d update_LK=%d nia=0x%x cia=0x%x\n", \
60 update_AA, update_LK, nia, cia); \
interrupts.h 73 unsigned_word cia,
81 unsigned_word cia,
87 unsigned_word cia,
103 unsigned_word cia,
109 unsigned_word cia);
114 unsigned_word cia);
119 unsigned_word cia);
124 unsigned_word cia);
os_emul.h 43 unsigned_word cia);
56 unsigned_word cia,
vm.h 53 unsigned_word cia);
59 unsigned_word cia);
73 unsigned_word cia);
83 unsigned_word cia);
92 unsigned_word cia);
103 unsigned_word cia);
121 unsigned_word cia);
140 unsigned_word cia);
corefile-n.h 37 unsigned_word cia)
43 cia,
53 cia) != sizeof(unsigned_N))
68 unsigned_word cia)
74 cia,
84 cia) != sizeof(unsigned_N))
  /src/external/gpl3/gdb.old/dist/sim/bpf/
traps.c 31 IADDR cia ATTRIBUTE_UNUSED,
  /src/external/gpl3/gdb/dist/sim/bpf/
traps.c 31 IADDR cia ATTRIBUTE_UNUSED,

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