1 /* $NetBSD: acpi_pci_machdep.c,v 1.23 2026/09/20 11:00:31 skrll Exp $ */ 2 3 /*- 4 * Copyright (c) 2018, 2020 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jared McNeill <jmcneill (at) invisible.ca>. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include "opt_pci.h" 33 34 #define _INTR_PRIVATE 35 36 #include <sys/cdefs.h> 37 __KERNEL_RCSID(0, "$NetBSD: acpi_pci_machdep.c,v 1.23 2026/09/20 11:00:31 skrll Exp $"); 38 39 #include <sys/param.h> 40 #include <sys/bus.h> 41 #include <sys/device.h> 42 #include <sys/intr.h> 43 #include <sys/systm.h> 44 #include <sys/kernel.h> 45 #include <sys/queue.h> 46 #include <sys/mutex.h> 47 #include <sys/kmem.h> 48 #include <sys/cpu.h> 49 50 #include <arm/cpufunc.h> 51 52 #include <arm/pic/picvar.h> 53 54 #include <dev/pci/pcireg.h> 55 #include <dev/pci/pcivar.h> 56 #include <dev/pci/pciconf.h> 57 58 #include <dev/acpi/acpivar.h> 59 #include <dev/acpi/acpi_mcfg.h> 60 #include <dev/acpi/acpi_pci.h> 61 62 #include <arm/acpi/acpi_iort.h> 63 #include <arm/acpi/acpi_pci_machdep.h> 64 65 #ifdef PCI_SMCCC 66 #include <arm/pci/pci_smccc.h> 67 #endif 68 69 struct acpi_pci_prt { 70 u_int prt_segment; 71 u_int prt_bus; 72 u_int prt_bridge_dev; 73 bool prt_derived; 74 ACPI_HANDLE prt_handle; 75 TAILQ_ENTRY(acpi_pci_prt) prt_list; 76 }; 77 78 static TAILQ_HEAD(, acpi_pci_prt) acpi_pci_irq_routes = 79 TAILQ_HEAD_INITIALIZER(acpi_pci_irq_routes); 80 81 struct acpi_pci_pct { 82 struct acpi_pci_context pct_ap; 83 TAILQ_ENTRY(acpi_pci_pct) pct_list; 84 }; 85 86 static TAILQ_HEAD(, acpi_pci_pct) acpi_pci_chipset_tags = 87 TAILQ_HEAD_INITIALIZER(acpi_pci_chipset_tags); 88 89 struct acpi_pci_intr { 90 struct pic_softc pi_pic; 91 int pi_irqbase; 92 int pi_irq; 93 uint32_t pi_unblocked; 94 void *pi_ih; 95 TAILQ_ENTRY(acpi_pci_intr) pi_list; 96 }; 97 98 static TAILQ_HEAD(, acpi_pci_intr) acpi_pci_intrs = 99 TAILQ_HEAD_INITIALIZER(acpi_pci_intrs); 100 101 static const struct acpi_pci_quirk acpi_pci_mcfg_quirks[] = { 102 /* OEM ID OEM Table ID Revision Seg Func */ 103 { "AMAZON", "GRAVITON", 0, -1, acpi_pci_graviton_init }, 104 { "ARMLTD", "ARMN1SDP", 0x20181101, 0, acpi_pci_n1sdp_init }, 105 { "ARMLTD", "ARMN1SDP", 0x20181101, 1, acpi_pci_n1sdp_init }, 106 { "NXP ", "LX2160 ", 0, -1, acpi_pci_layerscape_gen4_init }, 107 }; 108 109 #ifdef PCI_SMCCC 110 static const struct acpi_pci_quirk acpi_pci_smccc_quirk = { 111 .q_segment = -1, 112 .q_init = acpi_pci_smccc_init, 113 }; 114 #endif 115 116 pci_chipset_tag_t acpi_pci_md_get_chipset_tag(struct acpi_softc *, int, int); 117 118 static void acpi_pci_md_attach_hook(device_t, device_t, 119 struct pcibus_attach_args *); 120 static int acpi_pci_md_bus_maxdevs(void *, int); 121 static pcitag_t acpi_pci_md_make_tag(void *, int, int, int); 122 static void acpi_pci_md_decompose_tag(void *, pcitag_t, int *, int *, int *); 123 static u_int acpi_pci_md_get_segment(void *); 124 static uint32_t acpi_pci_md_get_devid(void *, uint32_t); 125 static uint32_t acpi_pci_md_get_frameid(void *, uint32_t); 126 static pcireg_t acpi_pci_md_conf_read(void *, pcitag_t, int); 127 static void acpi_pci_md_conf_write(void *, pcitag_t, int, pcireg_t); 128 static int acpi_pci_md_conf_hook(void *, int, int, int, pcireg_t); 129 static void acpi_pci_md_conf_interrupt(void *, int, int, int, int, int *); 130 131 static int acpi_pci_md_intr_map(const struct pci_attach_args *, 132 pci_intr_handle_t *); 133 static const char *acpi_pci_md_intr_string(void *, pci_intr_handle_t, 134 char *, size_t); 135 static const struct evcnt *acpi_pci_md_intr_evcnt(void *, pci_intr_handle_t); 136 static int acpi_pci_md_intr_setattr(void *, pci_intr_handle_t *, int, 137 uint64_t); 138 static void * acpi_pci_md_intr_establish(void *, pci_intr_handle_t, 139 int, int (*)(void *), void *, 140 const char *); 141 static void acpi_pci_md_intr_disestablish(void *, void *); 142 143 struct md_pci_chipset arm_acpi_pci_chipset = { 144 .pc_attach_hook = acpi_pci_md_attach_hook, 145 .pc_bus_maxdevs = acpi_pci_md_bus_maxdevs, 146 .pc_make_tag = acpi_pci_md_make_tag, 147 .pc_decompose_tag = acpi_pci_md_decompose_tag, 148 .pc_get_segment = acpi_pci_md_get_segment, 149 .pc_get_devid = acpi_pci_md_get_devid, 150 .pc_get_frameid = acpi_pci_md_get_frameid, 151 .pc_conf_read = acpi_pci_md_conf_read, 152 .pc_conf_write = acpi_pci_md_conf_write, 153 .pc_conf_hook = acpi_pci_md_conf_hook, 154 .pc_conf_interrupt = acpi_pci_md_conf_interrupt, 155 156 .pc_intr_map = acpi_pci_md_intr_map, 157 .pc_intr_string = acpi_pci_md_intr_string, 158 .pc_intr_evcnt = acpi_pci_md_intr_evcnt, 159 .pc_intr_setattr = acpi_pci_md_intr_setattr, 160 .pc_intr_establish = acpi_pci_md_intr_establish, 161 .pc_intr_disestablish = acpi_pci_md_intr_disestablish, 162 }; 163 164 static ACPI_STATUS 165 acpi_pci_md_pci_link(ACPI_HANDLE handle, pci_chipset_tag_t pc, int bus) 166 { 167 ACPI_PCI_ROUTING_TABLE *prt; 168 ACPI_HANDLE linksrc; 169 ACPI_BUFFER buf; 170 ACPI_STATUS rv; 171 void *linkdev; 172 173 rv = acpi_get(handle, &buf, AcpiGetIrqRoutingTable); 174 if (ACPI_FAILURE(rv)) 175 return rv; 176 177 for (char *p = buf.Pointer; ; p += prt->Length) { 178 prt = (ACPI_PCI_ROUTING_TABLE *)p; 179 if (prt->Length == 0) 180 break; 181 182 const u_int dev = ACPI_HIWORD(prt->Address); 183 if (prt->Source[0] != 0) { 184 aprint_debug("ACPI: %s dev %u INT%c on lnkdev %s\n", 185 acpi_name(handle), dev, 'A' + (prt->Pin & 3), prt->Source); 186 rv = AcpiGetHandle(ACPI_ROOT_OBJECT, prt->Source, &linksrc); 187 if (ACPI_FAILURE(rv)) { 188 aprint_debug("ACPI: AcpiGetHandle failed for '%s': %s\n", 189 prt->Source, AcpiFormatException(rv)); 190 continue; 191 } 192 193 linkdev = acpi_pci_link_devbyhandle(linksrc); 194 acpi_pci_link_add_reference(linkdev, pc, 0, bus, dev, prt->Pin & 3); 195 } else { 196 aprint_debug("ACPI: %s dev %u INT%c on globint %d\n", 197 acpi_name(handle), dev, 'A' + (prt->Pin & 3), prt->SourceIndex); 198 } 199 } 200 201 return AE_OK; 202 } 203 204 static void 205 acpi_pci_md_attach_hook(device_t parent, device_t self, 206 struct pcibus_attach_args *pba) 207 { 208 struct acpi_pci_context *ap = pba->pba_pc->pc_conf_v; 209 struct acpi_pci_prt *prt, *prtp; 210 struct acpi_devnode *ad; 211 ACPI_HANDLE handle; 212 int seg, bus, dev, func; 213 u_int bridge_dev = 0; 214 bool derived = false; 215 216 seg = ap->ap_seg; 217 handle = NULL; 218 219 if (pba->pba_bridgetag) { 220 /* 221 * Find the PCI address of our parent bridge and look for the 222 * corresponding ACPI device node. If there is no node for this 223 * bus, use the parent bridge routing information. 224 */ 225 acpi_pci_md_decompose_tag(NULL, *pba->pba_bridgetag, &bus, &dev, &func); 226 ad = acpi_pcidev_find(seg, bus, dev, func); 227 if (ad != NULL) { 228 handle = ad->ad_handle; 229 } else { 230 /* No routes defined for this bus, derive from parent */ 231 TAILQ_FOREACH(prtp, &acpi_pci_irq_routes, prt_list) 232 if (prtp->prt_bus == bus && 233 prtp->prt_segment == seg) { 234 handle = prtp->prt_handle; 235 bridge_dev = dev; 236 derived = true; 237 break; 238 } 239 } 240 } else { 241 /* 242 * Lookup the ACPI device node for the root bus. 243 */ 244 ad = acpi_pciroot_find(seg, 0); 245 if (ad != NULL) 246 handle = ad->ad_handle; 247 } 248 249 if (handle != NULL) { 250 prt = kmem_alloc(sizeof(*prt), KM_SLEEP); 251 prt->prt_bus = pba->pba_bus; 252 prt->prt_segment = seg; 253 prt->prt_handle = handle; 254 prt->prt_bridge_dev = bridge_dev; 255 prt->prt_derived = derived; 256 TAILQ_INSERT_TAIL(&acpi_pci_irq_routes, prt, prt_list); 257 } 258 259 acpimcfg_map_bus(self, pba->pba_pc, pba->pba_bus); 260 261 if (ad != NULL) { 262 /* 263 * This is a new ACPI managed bus. Add PCI link references. 264 */ 265 acpi_pci_md_pci_link(ad->ad_handle, pba->pba_pc, pba->pba_bus); 266 } 267 } 268 269 static int 270 acpi_pci_md_bus_maxdevs(void *v, int busno) 271 { 272 return 32; 273 } 274 275 static pcitag_t 276 acpi_pci_md_make_tag(void *v, int b, int d, int f) 277 { 278 return (b << 16) | (d << 11) | (f << 8); 279 } 280 281 static void 282 acpi_pci_md_decompose_tag(void *v, pcitag_t tag, int *bp, int *dp, int *fp) 283 { 284 if (bp) 285 *bp = (tag >> 16) & 0xff; 286 if (dp) 287 *dp = (tag >> 11) & 0x1f; 288 if (fp) 289 *fp = (tag >> 8) & 0x7; 290 } 291 292 static u_int 293 acpi_pci_md_get_segment(void *v) 294 { 295 struct acpi_pci_context * const ap = v; 296 297 return ap->ap_seg; 298 } 299 300 static uint32_t 301 acpi_pci_md_get_devid(void *v, uint32_t devid) 302 { 303 struct acpi_pci_context * const ap = v; 304 305 return acpi_iort_pci_root_map(ap->ap_seg, devid); 306 } 307 308 static uint32_t 309 acpi_pci_md_get_frameid(void *v, uint32_t devid) 310 { 311 struct acpi_pci_context * const ap = v; 312 313 return acpi_iort_its_id_map(ap->ap_seg, devid); 314 } 315 316 static pcireg_t 317 acpi_pci_md_conf_read(void *v, pcitag_t tag, int offset) 318 { 319 struct acpi_pci_context * const ap = v; 320 pcireg_t val; 321 322 if (offset < 0 || offset >= PCI_EXTCONF_SIZE) 323 return (pcireg_t) -1; 324 325 if (ap->ap_conf_read != NULL) 326 ap->ap_conf_read(&ap->ap_pc, tag, offset, &val); 327 else 328 acpimcfg_conf_read(&ap->ap_pc, tag, offset, &val); 329 330 return val; 331 } 332 333 static void 334 acpi_pci_md_conf_write(void *v, pcitag_t tag, int offset, pcireg_t val) 335 { 336 struct acpi_pci_context * const ap = v; 337 338 if (offset < 0 || offset >= PCI_EXTCONF_SIZE) 339 return; 340 341 if (ap->ap_conf_write != NULL) 342 ap->ap_conf_write(&ap->ap_pc, tag, offset, val); 343 else 344 acpimcfg_conf_write(&ap->ap_pc, tag, offset, val); 345 } 346 347 static int 348 acpi_pci_md_conf_hook(void *v, int b, int d, int f, pcireg_t id) 349 { 350 return PCI_CONF_DEFAULT; 351 } 352 353 static void 354 acpi_pci_md_conf_interrupt(void *v, int bus, int dev, int ipin, int sqiz, int *ilinep) 355 { 356 } 357 358 static struct acpi_pci_prt * 359 acpi_pci_md_intr_find_prt(pci_chipset_tag_t pc, u_int bus) 360 { 361 struct acpi_pci_prt *prt, *prtp; 362 u_int segment; 363 364 segment = pci_get_segment(pc); 365 366 prt = NULL; 367 TAILQ_FOREACH(prtp, &acpi_pci_irq_routes, prt_list) 368 if (prtp->prt_segment == segment && prtp->prt_bus == bus) { 369 prt = prtp; 370 break; 371 } 372 373 return prt; 374 } 375 376 static int 377 acpi_pci_md_intr_map(const struct pci_attach_args *pa, pci_intr_handle_t *ih) 378 { 379 struct acpi_pci_prt *prt; 380 ACPI_PCI_ROUTING_TABLE *tab; 381 int line, pol, trig, error; 382 ACPI_HANDLE linksrc; 383 ACPI_BUFFER buf; 384 void *linkdev; 385 u_int pin; 386 387 if (pa->pa_intrpin == PCI_INTERRUPT_PIN_NONE) 388 return EINVAL; 389 390 prt = acpi_pci_md_intr_find_prt(pa->pa_pc, pa->pa_bus); 391 if (prt == NULL) 392 return ENXIO; 393 394 if (ACPI_FAILURE(acpi_get(prt->prt_handle, &buf, AcpiGetIrqRoutingTable))) 395 return EIO; 396 397 /* 398 * For busses with no direct _PRT entry, derive the pin from the 399 * parent bridge. 400 */ 401 if (prt->prt_derived) { 402 pin = (((pa->pa_rawintrpin + prt->prt_bridge_dev) - 1) % 4) + 1; 403 } else { 404 pin = pa->pa_intrpin; 405 } 406 407 aprint_debug("%s: bus=%u pin=%u pa_rawintrpin=%u pa_intrpin=%u " 408 "pa_intrswiz=%u prt_bridge_dev=%u\n", 409 __func__, pa->pa_bus, pin, pa->pa_rawintrpin, 410 pa->pa_intrpin, pa->pa_intrswiz, prt->prt_bridge_dev); 411 412 error = ENOENT; 413 for (char *p = buf.Pointer; ; p += tab->Length) { 414 tab = (ACPI_PCI_ROUTING_TABLE *)p; 415 if (tab->Length == 0) 416 break; 417 418 if (pa->pa_device == ACPI_HIWORD(tab->Address) && 419 (pin - 1) == (tab->Pin & 3)) { 420 if (tab->Source[0] != 0) { 421 if (ACPI_FAILURE(AcpiGetHandle(ACPI_ROOT_OBJECT, tab->Source, &linksrc))) 422 goto done; 423 linkdev = acpi_pci_link_devbyhandle(linksrc); 424 *ih = acpi_pci_link_route_interrupt(linkdev, 425 pa->pa_pc, tab->SourceIndex, 426 &line, &pol, &trig); 427 error = 0; 428 goto done; 429 } else { 430 *ih = tab->SourceIndex; 431 error = 0; 432 goto done; 433 } 434 } 435 } 436 437 done: 438 ACPI_FREE(buf.Pointer); 439 return error; 440 } 441 442 static const char * 443 acpi_pci_md_intr_string(void *v, pci_intr_handle_t ih, char *buf, size_t len) 444 { 445 const int irq = __SHIFTOUT(ih, MD_PCI_INTR_IRQ); 446 const int vec = __SHIFTOUT(ih, MD_PCI_INTR_MSI_VEC); 447 448 if (ih & MD_PCI_INTR_MSIX) 449 snprintf(buf, len, "irq %d (MSI-X vec %d)", irq, vec); 450 else if (ih & MD_PCI_INTR_MSI) 451 snprintf(buf, len, "irq %d (MSI vec %d)", irq, vec); 452 else 453 snprintf(buf, len, "irq %d", irq); 454 455 return buf; 456 } 457 458 static const struct evcnt * 459 acpi_pci_md_intr_evcnt(void *v, pci_intr_handle_t ih) 460 { 461 return NULL; 462 } 463 464 static int 465 acpi_pci_md_intr_setattr(void *v, pci_intr_handle_t *ih, int attr, uint64_t data) 466 { 467 switch (attr) { 468 case PCI_INTR_MPSAFE: 469 if (data) 470 *ih |= MD_PCI_INTR_MPSAFE; 471 else 472 *ih &= ~MD_PCI_INTR_MPSAFE; 473 return 0; 474 default: 475 return ENODEV; 476 } 477 } 478 479 static struct acpi_pci_intr * 480 acpi_pci_md_intr_lookup(int irq) 481 { 482 struct acpi_pci_intr *pi; 483 484 TAILQ_FOREACH(pi, &acpi_pci_intrs, pi_list) 485 if (pi->pi_irq == irq) 486 return pi; 487 488 return NULL; 489 } 490 491 static void 492 acpi_pci_md_unblock_irqs(struct pic_softc *pic, size_t irqbase, uint32_t irqmask) 493 { 494 struct acpi_pci_intr * const pi = (struct acpi_pci_intr *)pic; 495 496 pi->pi_unblocked |= irqmask; 497 } 498 499 static void 500 acpi_pci_md_block_irqs(struct pic_softc *pic, size_t irqbase, uint32_t irqmask) 501 { 502 struct acpi_pci_intr * const pi = (struct acpi_pci_intr *)pic; 503 504 pi->pi_unblocked &= ~irqmask; 505 } 506 507 static int 508 acpi_pci_md_find_pending_irqs(struct pic_softc *pic) 509 { 510 struct acpi_pci_intr * const pi = (struct acpi_pci_intr *)pic; 511 512 pic_mark_pending_sources(pic, 0, pi->pi_unblocked); 513 514 return 1; 515 } 516 517 static void 518 acpi_pci_md_establish_irq(struct pic_softc *pic, struct intrsource *is) 519 { 520 } 521 522 static void 523 acpi_pci_md_source_name(struct pic_softc *pic, int irq, char *buf, size_t len) 524 { 525 snprintf(buf, len, "slot %d", irq); 526 } 527 528 static struct pic_ops acpi_pci_pic_ops = { 529 .pic_unblock_irqs = acpi_pci_md_unblock_irqs, 530 .pic_block_irqs = acpi_pci_md_block_irqs, 531 .pic_find_pending_irqs = acpi_pci_md_find_pending_irqs, 532 .pic_establish_irq = acpi_pci_md_establish_irq, 533 .pic_source_name = acpi_pci_md_source_name, 534 }; 535 536 static void * 537 acpi_pci_md_intr_establish(void *v, pci_intr_handle_t ih, int ipl, 538 int (*callback)(void *), void *arg, const char *xname) 539 { 540 struct acpi_pci_context * const ap = v; 541 struct acpi_pci_intr *pi; 542 int slot; 543 544 if ((ih & (MD_PCI_INTR_MSI | MD_PCI_INTR_MSIX)) != 0) 545 return md_pci_msi_intr_establish(&ap->ap_pc, ih, ipl, callback, arg, xname); 546 547 const int irq = (int)__SHIFTOUT(ih, MD_PCI_INTR_IRQ); 548 const int mpsafe = (ih & MD_PCI_INTR_MPSAFE) ? IST_MPSAFE : 0; 549 550 pi = acpi_pci_md_intr_lookup(irq); 551 if (pi == NULL) { 552 pi = kmem_zalloc(sizeof(*pi), KM_SLEEP); 553 pi->pi_irq = irq; 554 snprintf(pi->pi_pic.pic_name, sizeof(pi->pi_pic.pic_name), 555 "PCI irq %d", irq); 556 pi->pi_pic.pic_maxsources = 32; 557 pi->pi_pic.pic_ops = &acpi_pci_pic_ops; 558 pi->pi_irqbase = pic_add(&pi->pi_pic, PIC_IRQBASE_ALLOC); 559 TAILQ_INSERT_TAIL(&acpi_pci_intrs, pi, pi_list); 560 pi->pi_ih = intr_establish_xname(irq, IPL_VM, IST_LEVEL | IST_MPSAFE, 561 pic_handle_intr, &pi->pi_pic, device_xname(ap->ap_dev)); 562 } 563 if (pi->pi_ih == NULL) 564 return NULL; 565 566 /* Find a free slot */ 567 for (slot = 0; slot < pi->pi_pic.pic_maxsources; slot++) 568 if (pi->pi_pic.pic_sources[slot] == NULL) 569 break; 570 if (slot == pi->pi_pic.pic_maxsources) 571 return NULL; 572 573 return intr_establish_xname(pi->pi_irqbase + slot, ipl, IST_LEVEL | mpsafe, 574 callback, arg, xname); 575 } 576 577 static void 578 acpi_pci_md_intr_disestablish(void *v, void *vih) 579 { 580 intr_disestablish(vih); 581 } 582 583 const struct acpi_pci_quirk * 584 acpi_pci_md_find_quirk(int seg) 585 { 586 ACPI_STATUS rv; 587 ACPI_TABLE_MCFG *mcfg; 588 u_int n; 589 590 rv = AcpiGetTable(ACPI_SIG_MCFG, 0, (ACPI_TABLE_HEADER **)&mcfg); 591 if (ACPI_FAILURE(rv)) { 592 #ifdef PCI_SMCCC 593 uint32_t ver = pci_smccc_version(); 594 aprint_debug("%s: SMCCC version %#x\n", __func__, ver); 595 if (PCI_SMCCC_SUCCESS(ver)) { 596 return &acpi_pci_smccc_quirk; 597 } 598 #endif 599 return NULL; 600 } 601 602 for (n = 0; n < __arraycount(acpi_pci_mcfg_quirks); n++) { 603 const struct acpi_pci_quirk *q = &acpi_pci_mcfg_quirks[n]; 604 if (memcmp(q->q_oemid, mcfg->Header.OemId, ACPI_OEM_ID_SIZE) == 0 && 605 memcmp(q->q_oemtableid, mcfg->Header.OemTableId, ACPI_OEM_TABLE_ID_SIZE) == 0 && 606 q->q_oemrevision == mcfg->Header.OemRevision && 607 (q->q_segment == -1 || q->q_segment == seg)) 608 return q; 609 } 610 611 return NULL; 612 } 613 614 pci_chipset_tag_t 615 acpi_pci_md_get_chipset_tag(struct acpi_softc *sc, int seg, int bbn) 616 { 617 struct acpi_pci_pct *pct = NULL, *pctp; 618 const struct acpi_pci_quirk *q; 619 620 TAILQ_FOREACH(pctp, &acpi_pci_chipset_tags, pct_list) 621 if (pctp->pct_ap.ap_seg == seg) { 622 pct = pctp; 623 break; 624 } 625 626 if (pct == NULL) { 627 pct = kmem_zalloc(sizeof(*pct), KM_SLEEP); 628 pct->pct_ap.ap_dev = sc->sc_dev; 629 pct->pct_ap.ap_pc = arm_acpi_pci_chipset; 630 pct->pct_ap.ap_pc.pc_conf_v = &pct->pct_ap; 631 pct->pct_ap.ap_pc.pc_intr_v = &pct->pct_ap; 632 pct->pct_ap.ap_seg = seg; 633 pct->pct_ap.ap_bus = bbn; 634 pct->pct_ap.ap_maxbus = -1; 635 pct->pct_ap.ap_bst = acpi_softc->sc_memt; 636 637 q = acpi_pci_md_find_quirk(seg); 638 if (q != NULL) 639 q->q_init(&pct->pct_ap); 640 641 TAILQ_INSERT_TAIL(&acpi_pci_chipset_tags, pct, pct_list); 642 } 643 644 return &pct->pct_ap.ap_pc; 645 } 646 __strong_alias(acpi_get_pci_chipset_tag,acpi_pci_md_get_chipset_tag); 647
Indexes created Sun Oct 25 00:26:45 UTC 2026