| /src/external/apache2/llvm/dist/clang/lib/Driver/ |
| Phases.cpp | 1 //===--- Phases.cpp - Transformations on Driver Types ---------------------===// 9 #include "clang/Driver/Phases.h" 15 const char *phases::getPhaseName(ID Id) {
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| Types.cpp | 31 constexpr PhasesBitSet(std::initializer_list<phases::ID> Phases) { 32 for (auto Id : Phases) 35 bool contains(phases::ID Id) const { return Bits & (1 << Id); } 36 } Phases; 58 assert((getInfo(Id).Phases.contains(phases::Preprocess) != 94 return getInfo(Id).Phases.contains(phases::Precompile) && 312 llvm::SmallVector<phases::ID, phases::MaxNumberOfPhases [all...] |
| Driver.cpp | 287 // affect the phase, starting with the earliest phases, and record which 289 phases::ID Driver::getFinalPhase(const DerivedArgList &DAL, 292 phases::ID FinalPhase; 299 FinalPhase = phases::Preprocess; 303 FinalPhase = phases::Precompile; 315 FinalPhase = phases::Compile; 319 FinalPhase = phases::Backend; 323 FinalPhase = phases::Assemble; 327 FinalPhase = phases::Link; 2390 typedef const llvm::SmallVectorImpl<phases::ID> PhasesTy [all...] |
| /src/external/apache2/llvm/dist/clang/include/clang/Driver/ |
| Types.h | 12 #include "clang/Driver/Phases.h" 103 /// getCompilationPhases - Get the list of compilation phases ('Phases') to be 105 llvm::SmallVector<phases::ID, phases::MaxNumberOfPhases> 106 getCompilationPhases(ID Id, phases::ID LastPhase = phases::LastPhase); 107 llvm::SmallVector<phases::ID, phases::MaxNumberOfPhases>
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| Phases.h | 1 //===--- Phases.h - Transformations on Driver Types -------------*- C++ -*-===// 14 namespace phases { namespace in namespace:clang::driver 34 } // end namespace phases
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| Driver.h | 16 #include "clang/Driver/Phases.h" 278 phases::ID getFinalPhase(const llvm::opt::DerivedArgList &DAL, 505 Compilation &C, const llvm::opt::ArgList &Args, phases::ID Phase,
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| /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/ |
| hwmgr_ppt.h | 43 uint8_t phases; member in struct:phm_ppt_v1_clock_voltage_dependency_record 70 uint8_t phases; member in struct:phm_ppt_v1_mm_clock_voltage_dependency_record
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| amdgpu_smu_helper.c | 701 dep_table->entries[i].phases = allowed_dep_table->entries[i].phases;
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| /src/sys/external/bsd/drm2/dist/drm/i915/gem/ |
| i915_gem_pm.c | 52 struct list_head *phases[] = { local 82 for (phase = phases; *phase; phase++) {
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| i915_gem_shrinker.c | 118 } phases[] = { local 171 for (phase = phases; phase->list; phase++) {
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| /src/sys/external/bsd/drm2/dist/drm/i915/gt/ |
| selftest_timeline.c | 119 } phases[] = { local 149 for (p = phases; p->name; p++) {
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| selftest_hangcheck.c | 985 } phases[] = { local 1001 typeof(*phases) *p; 1004 for (p = phases; p->name; p++) {
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| selftest_lrc.c | 3218 * to ensure parallel execution of its phases as it requires. 3223 * With the submit-fence, we have identified three possible phases 3375 } phases[] = { local 3403 for (p = phases; p->name; p++) {
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| /src/external/bsd/pcc/dist/pcc/cc/driver/ |
| driver.c | 61 enum phases { DEFAULT, PREPROCESS, COMPILE, ASSEMBLE, LINK } last_phase = enum 129 set_last_phase(enum phases phase)
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| /src/external/gpl3/gcc/dist/contrib/ |
| compareSumTests3 | 50 subtests. For these tests, if one of the phases fails, we
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| /src/external/gpl3/gcc.old/dist/contrib/ |
| compareSumTests3 | 50 subtests. For these tests, if one of the phases fails, we
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| /src/sys/external/bsd/drm2/dist/drm/i915/selftests/ |
| i915_vma.c | 711 } phases[] = { local 728 for (p = phases; p->name; p++) { /* exercise both create/lookup */
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| i915_gem_gtt.c | 375 } phases[] = { local 391 for (p = phases; p->name; p++) {
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| /src/sys/external/bsd/drm2/dist/drm/i915/gem/selftests/ |
| i915_gem_context.c | 1329 } *phase, phases[] = { local 1340 for (i = 0, phase = phases; ret == 0 && i < ARRAY_SIZE(phases);
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| /src/sys/dev/microcode/siop/ |
| ncr53cxxx.c | 132 char *phases[] = { variable 722 if (reserved (phases[i], t)) {
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| /src/sys/dev/pci/ |
| pci_subr.c | 3009 * phases: Number of phases in the arbitration tables. 3015 const int phases, int arbsize, bool indent) 3022 for (i = 0; i < phases; i += num_per_reg) { 3061 onoff("WRR arbitration with 32 phases", 3063 onoff("WRR arbitration with 64 phases", 3065 onoff("WRR arbitration with 128 phases", 3090 onoff(" WRR arbitration with 32 phases", 3092 onoff(" WRR arbitration with 64 phases", 3094 onoff(" WRR arbitration with 128 phases", [all...] |