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  /src/external/bsd/nsd/dist/simdzone/src/haswell/
simd.h 2 * haswell.h -- SIMD abstractions targeting AVX2
37 static really_inline void simd_loadu_8x(simd_8x_t *simd, const void *address)
39 simd->chunks[0] = _mm256_loadu_si256((const __m256i *)(address));
43 static really_inline void simd_storeu_8x(void *address, simd_8x_t *simd)
45 _mm256_storeu_si256((__m256i *)address, simd->chunks[0]);
49 static really_inline uint64_t simd_find_8x(const simd_8x_t *simd, char key)
52 const __m256i r = _mm256_cmpeq_epi8(simd->chunks[0], k);
58 const simd_8x_t *simd, const simd_table_t table)
62 _mm256_shuffle_epi8(t, simd->chunks[0]), simd->chunks[0])
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  /src/external/bsd/nsd/dist/simdzone/src/westmere/
simd.h 2 * simd.h -- SIMD abstractions targeting SSE4.2
35 static really_inline void simd_loadu_8x(simd_8x_t *simd, const uint8_t *address)
37 simd->chunks[0] = _mm_loadu_si128((const __m128i *)address);
41 static really_inline void simd_storeu_8x(uint8_t *address, const simd_8x_t *simd)
43 _mm_storeu_si128((__m128i *)address, simd->chunks[0]);
47 static really_inline uint64_t simd_find_8x(const simd_8x_t *simd, char key)
50 const __m128i r = _mm_cmpeq_epi8(simd->chunks[0], k);
56 const simd_8x_t *simd, const simd_table_t table)
60 _mm_shuffle_epi8(t, simd->chunks[0]), simd->chunks[0])
    [all...]
  /src/external/gpl3/gcc/dist/libstdc++-v3/include/pstl/
pstl_config.h 61 // Enable SIMD for compilers that support OpenMP 4.0
66 # define _PSTL_PRAGMA_SIMD _PSTL_PRAGMA(omp simd)
67 # define _PSTL_PRAGMA_DECLARE_SIMD _PSTL_PRAGMA(omp declare simd)
68 # define _PSTL_PRAGMA_SIMD_REDUCTION(PRM) _PSTL_PRAGMA(omp simd reduction(PRM))
69 #elif !defined(_MSC_VER) //#pragma simd
70 # define _PSTL_PRAGMA_SIMD _PSTL_PRAGMA(simd)
72 # define _PSTL_PRAGMA_SIMD_REDUCTION(PRM) _PSTL_PRAGMA(simd reduction(PRM))
73 #else //no simd
77 #endif //Enable SIMD
87 # define _PSTL_PRAGMA_SIMD_SCAN(PRM) _PSTL_PRAGMA(omp simd reduction(inscan, PRM)
    [all...]
  /src/external/gpl3/gcc.old/dist/libstdc++-v3/include/pstl/
pstl_config.h 61 // Enable SIMD for compilers that support OpenMP 4.0
64 # define _PSTL_PRAGMA_SIMD _PSTL_PRAGMA(omp simd)
65 # define _PSTL_PRAGMA_DECLARE_SIMD _PSTL_PRAGMA(omp declare simd)
66 # define _PSTL_PRAGMA_SIMD_REDUCTION(PRM) _PSTL_PRAGMA(omp simd reduction(PRM))
67 #elif !defined(_MSC_VER) //#pragma simd
68 # define _PSTL_PRAGMA_SIMD _PSTL_PRAGMA(simd)
70 # define _PSTL_PRAGMA_SIMD_REDUCTION(PRM) _PSTL_PRAGMA(simd reduction(PRM))
71 #else //no simd
75 #endif //Enable SIMD
84 # define _PSTL_PRAGMA_SIMD_SCAN(PRM) _PSTL_PRAGMA(omp simd reduction(inscan, PRM)
    [all...]
  /src/external/gpl3/gcc/dist/libstdc++-v3/include/experimental/bits/
simd_math.h 1 // Math overloads for simd -*- C++ -*-
47 { using type = simd<_Tp, _Abi>; };
65 __name(simd<_Tp, _Abi> __x) \
76 using type = simd<_Tp, _Abi>*;
99 using type = simd<_Tp, _Abi>;
131 __name(const simd<_Tp, _Abi>& __x, const typename _Arg2::type& __y) \
143 negation<is_same<__remove_cvref_t<_Up>, simd<_Tp, _Abi>>>, \
144 is_convertible<_Up, simd<_Tp, _Abi>>, is_floating_point<_Tp>>, \
147 __name(_Up&& __xx, const simd<_Tp, _Abi>& __yy) \
148 { return __name(simd<_Tp, _Abi>(static_cast<_Up&&>(__xx)), __yy);
    [all...]
simd.h 1 // Definition of the public simd interfaces -*- C++ -*-
167 // forward declarations is_simd(_mask), simd(_mask), simd_size {{{
175 class simd;
417 * for using simd in libraries.
849 // simd and simd_mask base for unsupported <_Tp, _Abi>
897 * Tag used for private init constructor of simd and simd_mask
946 // __data(simd/simd_mask) {{{
949 __data(const simd<_Tp, _Ap>& __x);
953 __data(simd<_Tp, _Ap>& __x);
3126 struct rebind_simd<_Tp, simd<_Up, _Abi>
    [all...]
simd_fixed_size.h 0 // Simd fixed_size ABI specific implementations -*- C++ -*-
27 * - simd objects are passed via the stack
28 * - memory layout of `simd<_Tp, _Np>` is equivalent to `array<_Tp, _Np>`
29 * - alignment of `simd<_Tp, _Np>` is `_Np * sizeof(_Tp)` if _Np is __a
54 { using type = simd<_Tp, _A0>; };
109 _GLIBCXX_SIMD_INTRINSIC constexpr simd<_Tp, _A0>
163 using simd_type = simd<_Tp, _Abi>;
378 return simd<_Tp, _Abi0>(__private_init, first);
636 __make_simd_tuple(simd<_Tp, _A0> __x0)
641 __make_simd_tuple(const simd<_Tp, _A0>& __x0, const simd<_Tp, _As>&... __xs
    [all...]
  /src/external/gpl3/gcc.old/dist/libstdc++-v3/include/experimental/bits/
simd_math.h 1 // Math overloads for simd -*- C++ -*-
47 { using type = simd<_Tp, _Abi>; };
65 __name(simd<_Tp, _Abi> __x) \
76 using type = simd<_Tp, _Abi>*;
99 using type = simd<_Tp, _Abi>;
131 __name(const simd<_Tp, _Abi>& __x, const typename _Arg2::type& __y) \
143 negation<is_same<__remove_cvref_t<_Up>, simd<_Tp, _Abi>>>, \
144 is_convertible<_Up, simd<_Tp, _Abi>>, is_floating_point<_Tp>>, \
147 __name(_Up&& __xx, const simd<_Tp, _Abi>& __yy) \
148 { return __name(simd<_Tp, _Abi>(static_cast<_Up&&>(__xx)), __yy);
    [all...]
simd.h 1 // Definition of the public simd interfaces -*- C++ -*-
150 // forward declarations is_simd(_mask), simd(_mask), simd_size {{{
158 class simd;
395 * for using simd in libraries.
817 // simd and simd_mask base for unsupported <_Tp, _Abi>
865 * Tag used for private init constructor of simd and simd_mask
914 // __data(simd/simd_mask) {{{
917 __data(const simd<_Tp, _Ap>& __x);
921 __data(simd<_Tp, _Ap>& __x);
3077 struct rebind_simd<_Tp, simd<_Up, _Abi>
    [all...]
simd_fixed_size.h 0 // Simd fixed_size ABI specific implementations -*- C++ -*-
27 * - simd objects are passed via the stack
28 * - memory layout of `simd<_Tp, _Np>` is equivalent to `array<_Tp, _Np>`
29 * - alignment of `simd<_Tp, _Np>` is `_Np * sizeof(_Tp)` if _Np is __a
54 { using type = simd<_Tp, _A0>; };
109 _GLIBCXX_SIMD_INTRINSIC constexpr simd<_Tp, _A0>
163 using simd_type = simd<_Tp, _Abi>;
378 return simd<_Tp, _Abi0>(__private_init, first);
636 __make_simd_tuple(simd<_Tp, _A0> __x0)
641 __make_simd_tuple(const simd<_Tp, _A0>& __x0, const simd<_Tp, _As>&... __xs
    [all...]
  /src/external/gpl3/gcc/dist/libstdc++-v3/scripts/
create_testsuite_files 53 grep simd/tests/ $tmp.5 > $tests_file_simd
54 grep -v simd/tests/ $tmp.5 > $tmp.6
check_simd 58 # per a/b/c block extract flags and simulator, then make check-simd
69 subdir="simd/$(echo "$flags" | sed 's#[= /-]##g')"
71 $srcdir/testsuite/experimental/simd/generate_makefile.sh \
  /src/external/gpl3/gcc.old/dist/libstdc++-v3/scripts/
create_testsuite_files 53 grep simd/tests/ $tmp.5 > $tests_file_simd
54 grep -v simd/tests/ $tmp.5 > $tmp.6
check_simd 58 # per a/b/c block extract flags and simulator, then make check-simd
69 subdir="simd/$(echo "$flags" | sed 's#[= /-]##g')"
71 $srcdir/testsuite/experimental/simd/generate_makefile.sh \
  /src/external/bsd/libc++/include/experimental/
Makefile 24 simd \
  /src/external/gpl3/gcc/dist/gcc/config/loongarch/
loongarch-opts.h 40 int cpu_arch, int cpu_tune, int fpu, int simd,
112 (la_target.isa.simd == ISA_EXT_SIMD_LSX \
113 || la_target.isa.simd == ISA_EXT_SIMD_LASX)
116 (la_target.isa.simd == ISA_EXT_SIMD_LASX)
loongarch-opts.cc 146 int cpu_arch, int cpu_tune, int fpu, int simd,
157 target->isa.simd = simd;
185 int arch, tune, fpu, simd, abi_base, abi_ext, cmodel, member in struct:__anon13344
191 M_OPT_ABSENT (target->isa.simd) ? 0 : 1,
310 int simd_base = (constrained.arch ? t.isa.simd :
311 (with_default_simd ? DEFAULT_ISA_EXT_SIMD : t.isa.simd));
313 t.isa.simd = constrained.simd ? target->isa.simd : simd_base
    [all...]
loongarch-def.h 151 int simd; /* ISA_EXT_SIMD_ */ member in struct:loongarch_isa
161 base (0), fpu (0), simd (0), evolution (0), evolution_set (0)
165 loongarch_isa simd_ (int _simd) { simd = _simd; return *this; }
loongarch-driver.cc 84 LARCH_DRIVER_PARSE_PARM (la_target.isa.simd, ISA_EXT_SIMD, \
199 APPEND_VAL (loongarch_isa_ext_strings[la_target.isa.simd]);
loongarch-cpu.cc 188 /* Fill: loongarch_cpu_default_isa[ARCH_NATIVE].simd
189 With: SIMD extension type (LSX, LASX)
204 warning (0, "unknown SIMD extension "
205 "(%qs disabled while %qs is enabled), disabling SIMD",
218 if (native_cpu_arch != ARCH_NATIVE && tmp != preset.simd)
219 warning (0, "SIMD extension %qs differs from PRID preset %qs",
221 loongarch_isa_ext_strings[preset.simd]);
225 preset.simd = tmp;
  /src/external/mit/xorg/lib/pixman/
Makefile 75 # ARM SIMD
76 SRCS+= pixman-arm-simd.c \
77 pixman-arm-simd-asm.S \
78 pixman-arm-simd-asm-scaled.S
103 # SIMD instructions use floatpoint registers so we need to enable their use
  /src/external/gpl3/gcc.old/dist/libphobos/testsuite/libphobos.hash/
test_hash.d 104 /// Accept SIMD vectors.
109 static import simd = core.simd;
110 static if (is(simd.int4)) // __traits(isArithmetic)
112 enum simd.int4 val = [1,2,3,4];
114 simd.int4 rtVal = val;
118 static if (is(simd.void16)) // non __traits(isArithmetic)
120 auto h = hashOf(simd.void16.init);
122 static if (is(simd.float4)) // __traits(isArithmetic) and __traits(isFloating)
124 enum simd.float4 val = [1.1f, 2.2f, 3.3f, 4.4f]
    [all...]
  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_gfx.h 197 void (*read_wave_data)(struct amdgpu_device *adev, uint32_t simd,
199 void (*read_wave_vgprs)(struct amdgpu_device *adev, uint32_t simd,
202 void (*read_wave_sgprs)(struct amdgpu_device *adev, uint32_t simd,
amdgpu_debugfs.c 694 * Bits 23..30: CU/{WGP+SIMD} selector
696 * Bits 37..44: SIMD ID selector
708 uint32_t offset, se, sh, cu, wave, simd, data[32]; local
719 simd = (*pos & GENMASK_ULL(44, 37)) >> 37;
731 adev->gfx.funcs->read_wave_data(adev, simd, wave, data, &x);
772 * Bits 28..35: CU/{WGP+SIMD} selector
774 * Bits 37..44: SIMD ID selector
787 uint32_t offset, se, sh, cu, wave, simd, thread, bank, *data; local
798 simd = (*pos & GENMASK_ULL(51, 44)) >> 44;
816 adev->gfx.funcs->read_wave_vgprs(adev, simd, wave, thread, offset, size>>2, data)
    [all...]
amdgpu_gfx_v6_0.c 2991 static uint32_t wave_read_ind(struct amdgpu_device *adev, uint32_t simd, uint32_t wave, uint32_t address)
2995 (simd << SQ_IND_INDEX__SIMD_ID__SHIFT) |
3001 static void wave_read_regs(struct amdgpu_device *adev, uint32_t simd,
3007 (simd << SQ_IND_INDEX__SIMD_ID__SHIFT) |
3016 static void gfx_v6_0_read_wave_data(struct amdgpu_device *adev, uint32_t simd, uint32_t wave, uint32_t *dst, int *no_fields)
3020 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_STATUS);
3021 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_LO);
3022 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_HI);
3023 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_EXEC_LO);
3024 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_EXEC_HI)
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