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  /src/external/gpl3/binutils/dist/config/
bootstrap-debug-lean.mk 5 # This makes it slower than bootstrap-debug alone, for there's
  /src/external/gpl3/binutils.old/dist/config/
bootstrap-debug-lean.mk 5 # This makes it slower than bootstrap-debug alone, for there's
  /src/external/gpl3/gcc/dist/config/
bootstrap-debug-lean.mk 5 # This makes it slower than bootstrap-debug alone, for there's
  /src/external/gpl3/gcc.old/dist/config/
bootstrap-debug-lean.mk 5 # This makes it slower than bootstrap-debug alone, for there's
  /src/external/gpl3/gdb/dist/config/
bootstrap-debug-lean.mk 5 # This makes it slower than bootstrap-debug alone, for there's
  /src/external/gpl3/gdb.old/dist/config/
bootstrap-debug-lean.mk 5 # This makes it slower than bootstrap-debug alone, for there's
  /src/external/bsd/unbound/dist/testdata/redis_reconnect_interval.tdir/
redis.conf 261 # In many cases the disk is slower than the network, and storing and loading
416 slowlog-log-slower-than 10000
  /src/external/bsd/unbound/dist/testdata/redis_replica.tdir/
redis.conf 261 # In many cases the disk is slower than the network, and storing and loading
416 slowlog-log-slower-than 10000
  /src/external/lgpl3/gmp/dist/mpn/x86/pentium/mmx/
hamdist.asm 37 C slower than the plain integer mpn/x86/pentium/popcount.asm.
  /src/external/lgpl3/gmp/dist/mpn/arm/v7a/cora15/neon/
copyd.asm 38 C Cortex-A9 1.75 slower than core register code
copyi.asm 38 C Cortex-A9 1.75 slower than core register code
  /src/external/lgpl3/gmp/dist/mpn/powerpc64/mode64/p7/
aors_n.asm 40 C This is a tad bit slower than the cnd_aors_n.asm code, which is of course an
  /src/external/lgpl3/gmp/dist/mpn/x86/
copyi.asm 51 C P6 - An MMX based copy was tried, but was found to be slower than a rep
  /src/external/lgpl3/gmp/dist/mpn/x86/pentium/
popcount.asm 39 C An arithmetic approach has been found to be slower than the table lookup,
  /src/external/lgpl3/gmp/dist/mpn/m88k/
add_n.s 44 ; but on the 88110, it seems to run much slower, 6.6 clocks/limb.
sub_n.s 44 ; but on the 88110, it seems to run much slower, 6.6 clocks/limb.
  /src/external/lgpl3/gmp/dist/mpn/powerpc32/
mode1o.asm 54 C Using divwu for size==1 measured about 10 cycles slower on 604e, or about
  /src/external/lgpl3/gmp/dist/mpn/x86/k6/k62mmx/
copyd.asm 57 C the attraction of being no slower than a basic rep movsl though.
  /src/external/lgpl3/gmp/dist/mpn/x86/k7/
mode1o.asm 47 C Using a divl for size==1 measures slower than the modexact method, which
  /src/external/lgpl3/gmp/dist/mpn/x86/k6/
mul_basecase.asm 65 C The mul_1 loop is about 8.5 c/l, which is slower than mpn_mul_1 at 6.25
420 dnl slower in this code, hence the defframe empty-if-zero feature is
  /src/external/lgpl3/gmp/dist/mpn/powerpc64/mode64/
aors_n.asm 40 C This code is a little bit slower for POWER3/PPC630 than the simple code used
divrem_1.asm 50 C considerably slower on POWER4/PPC970 and POWER5.
  /src/external/lgpl3/gmp/dist/mpn/sparc64/ultrasparct3/
aormul_2.asm 49 C should run no slower.
  /src/external/lgpl3/gmp/dist/mpn/x86/k6/mmx/
logops_n.asm 94 C Unaligned movq loads and stores are a bit slower than aligned ones. The
  /src/external/lgpl3/gmp/dist/mpn/x86_64/fastsse/
sec_tabselect.asm 46 C Intel atom 4.3 4.3 4.3 slower than plain code

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