/src/sys/compat/linux/common/ |
linux_blkio.h | 46 #define LINUX_BLKROSET _LINUX_IO(0x12, 93) 47 #define LINUX_BLKROGET _LINUX_IO(0x12, 94) 48 #define LINUX_BLKRRPART _LINUX_IO(0x12, 95) 49 #define LINUX_BLKGETSIZE _LINUX_IO(0x12, 96) 50 #define LINUX_BLKFLSBUF _LINUX_IO(0x12, 97) 51 #define LINUX_BLKRASET _LINUX_IO(0x12, 98) 52 #define LINUX_BLKRAGET _LINUX_IO(0x12, 99) 53 #define LINUX_BLKFRASET _LINUX_IO(0x12, 100) 54 #define LINUX_BLKFRAGET _LINUX_IO(0x12, 101) 55 #define LINUX_BLKSECTSET _LINUX_IO(0x12, 102 [all...] |
/src/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/ |
smu7_powertune.h | 29 #define DIDT_SQ_CTRL0__UNUSED_0__SHIFT 0x12 31 #define DIDT_TD_CTRL0__UNUSED_0__SHIFT 0x12 33 #define DIDT_TCP_CTRL0__UNUSED_0__SHIFT 0x12
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/src/sys/dev/pci/bktr/ |
bktr_audio.c | 234 msp_dpl_write(bktr, bktr->msp_addr, 0x12, 0x0000, 0x0000); /* volume to MUTE */ 237 msp_dpl_write(bktr, bktr->msp_addr, 0x12, 0x0000, 0x7300); /* 0 db volume */ 242 msp_dpl_write(bktr, bktr->msp_addr, 0x12, 0x0000, 0x7300); /* 0 db volume */ 243 msp_dpl_write(bktr, bktr->msp_addr, 0x12, 0x000d, 0x1900); /* scart prescale */ 244 msp_dpl_write(bktr, bktr->msp_addr, 0x12, 0x0008, 0x0220); /* SCART | STEREO */ 245 msp_dpl_write(bktr, bktr->msp_addr, 0x12, 0x0013, 0x0000); /* DSP In = SC1_IN_L/R */ 250 msp_dpl_write(bktr, bktr->msp_addr, 0x12, 0x0000, 0x7300); /* 0 db volume */ 251 msp_dpl_write(bktr, bktr->msp_addr, 0x12, 0x000d, 0x1900); /* scart prescale */ 252 msp_dpl_write(bktr, bktr->msp_addr, 0x12, 0x0008, 0x0220); /* SCART | STEREO */ 253 msp_dpl_write(bktr, bktr->msp_addr, 0x12, 0x0013, 0x0200); /* DSP In = SC2_IN_L/R * [all...] |
/src/sys/dev/i2c/ |
mpl115areg.h | 49 #define MPL115A_CONVERT 0x12
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/src/sys/dev/ic/ |
apple_smcreg.h | 49 #define APPLE_SMC_CMD_NTH_KEY 0x12
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/src/sys/dev/isa/ |
if_levar.h | 36 #define NE2100_RAP 0x12
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/src/sys/dev/pci/ |
if_pcnreg.h | 63 #define PCN16_RAP 0x12
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/src/sys/external/gpl2/dts/dist/include/dt-bindings/pmu/ |
exynos_ppmu.h | 21 #define PPMU_RO_LATENCY 0x12
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/src/sys/dev/mii/ |
tlphyreg.h | 46 #define MII_TLPHY_ST 0x12 /* Status register */
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/src/sys/dev/microcode/ral/ |
microcode.h | 27 0x02, 0x1c, 0x12, 0x02, 0x13, 0xcb, 0xc2, 0x8c, 0x22, 0x22, 0x00, 29 0x8a, 0x93, 0xd2, 0xaf, 0x22, 0x02, 0x18, 0xda, 0x12, 0x1b, 0xe8, 31 0x90, 0x00, 0x03, 0xe0, 0x12, 0x08, 0x25, 0x00, 0xb0, 0x00, 0x00, 36 0xe5, 0x03, 0x30, 0x07, 0x03, 0xd2, 0x08, 0x22, 0x12, 0x17, 0xa5, 43 0x12, 0x11, 0x31, 0x90, 0x21, 0x00, 0xe0, 0xf5, 0x31, 0x60, 0x05, 44 0x12, 0x1b, 0x8a, 0x80, 0x03, 0x12, 0x1b, 0x3d, 0xe4, 0x90, 0x21, 45 0x03, 0xf0, 0xaf, 0x2d, 0x12, 0x1c, 0x62, 0x22, 0x75, 0x31, 0xff, 48 0xf0, 0x90, 0x21, 0x03, 0xf0, 0xaf, 0x2d, 0x12, 0x1c, 0x62, 0x22, 49 0x7e, 0x2b, 0x7f, 0x80, 0x7d, 0x03, 0x12, 0x04, 0x0e, 0x90, 0x34 [all...] |
/src/sys/external/isc/libsodium/dist/src/libsodium/crypto_core/hsalsa20/ref2/ |
core_hsalsa20_ref2.c | 23 x9, x10, x11, x12, x13, x14, x15; local in function:crypto_core_hsalsa20 42 x12 = LOAD32_LE(k + 20); 51 x4 ^= ROTL32(x0 + x12, 7); 53 x12 ^= ROTL32(x8 + x4, 13); 54 x0 ^= ROTL32(x12 + x8, 18); 79 x12 ^= ROTL32(x15 + x14, 7); 80 x13 ^= ROTL32(x12 + x15, 9); 81 x14 ^= ROTL32(x13 + x12, 13);
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/src/sys/arch/arm/amlogic/ |
meson_canvasreg.h | 34 #define DC_CAV_LUT_DATAL_REG CANVAS_REG(0x12)
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/src/sys/arch/hpcmips/vr/ |
vrkiureg.h | 47 #define KIUSCANS 0x12
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vrc4173icureg.h | 60 #define VRC4173ICU_MKIUINT 0x12
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/src/sys/netinet/ |
igmp.h | 99 #define IGMP_v1_HOST_MEMBERSHIP_REPORT 0x12 /* v1 membership report */
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/src/sys/external/isc/libsodium/dist/src/libsodium/crypto_core/hchacha20/ |
core_hchacha20.c | 22 uint32_t x8, x9, x10, x11, x12, x13, x14, x15; local in function:crypto_core_hchacha20 43 x12 = LOAD32_LE(in + 0); 49 QUARTERROUND(x0, x4, x8, x12); 54 QUARTERROUND(x1, x6, x11, x12); 63 STORE32_LE(out + 16, x12);
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/src/sys/dev/microcode/rum/ |
microcode.h | 27 0x02, 0x13, 0x25, 0x12, 0x10, 0xd9, 0x02, 0x12, 0x58, 0x02, 0x13, 28 0x58, 0x02, 0x13, 0x5a, 0xc0, 0xd0, 0x75, 0xd0, 0x18, 0x12, 0x13, 48 0x02, 0x12, 0x57, 0xc2, 0x09, 0x90, 0x02, 0x00, 0xe0, 0x44, 0x04, 49 0xf0, 0x74, 0x04, 0x12, 0x0c, 0x3a, 0xc2, 0x04, 0xc2, 0x07, 0x90, 51 0x26, 0xe0, 0x20, 0xe2, 0x03, 0x02, 0x12, 0x57, 0x90, 0x02, 0x08, 52 0xe0, 0x70, 0x1b, 0x20, 0x07, 0x03, 0x02, 0x12, 0x57, 0x90, 0x03, 53 0x12, 0xe0, 0x64, 0x22, 0x60, 0x03, 0x02, 0x12, 0x57, 0xd2, 0x09, 54 0xc2, 0x07, 0x74, 0x02, 0x12, 0x0c, 0x3a, 0x22, 0x90, 0x02, 0x03 [all...] |
/src/sys/dev/sun/ |
eeprom.h | 44 * the true value is 0x12 and false is the usual zero. Such flags 48 #define EE_TRUE 0x12 66 #define EE_SCR_1024X1024 0x12 94 #define EE_CONS_COLOR 0x12 /* - Color FB / keyboard */ 190 * 0x12 = diagnostic mode
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/src/sys/arch/i386/stand/lib/ |
biosmem.S | 48 int $0x12
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/src/sys/dev/cardbus/ |
cardbus_exrom.h | 50 #define CARDBUS_EXROM_DATA_DATA_REV 0x12 /* Revision Level of Code/Data */
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/src/sys/dev/podulebus/ |
powerromreg.h | 25 #define PRID_MORLEY_CACHED 0x12 /* Morley 16 bit Cached SCSI-1 */
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/src/sys/external/gpl2/dts/dist/include/dt-bindings/dma/ |
x1000-dma.h | 23 #define X1000_DMA_UART1_TX 0x12
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x1830-dma.h | 21 #define X1830_DMA_UART1_TX 0x12
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/src/sys/external/isc/libsodium/dist/src/libsodium/crypto_core/salsa/ref/ |
core_salsa_ref.c | 15 uint32_t x0, x1, x2, x3, x4, x5, x6, x7, x8, x9, x10, x11, x12, x13, x14, local in function:crypto_core_salsa 36 j12 = x12 = LOAD32_LE(k + 20); 46 x4 ^= ROTL32(x0 + x12, 7); 48 x12 ^= ROTL32(x8 + x4, 13); 49 x0 ^= ROTL32(x12 + x8, 18); 74 x12 ^= ROTL32(x15 + x14, 7); 75 x13 ^= ROTL32(x12 + x15, 9); 76 x14 ^= ROTL32(x13 + x12, 13); 91 STORE32_LE(out + 48, x12 + j12);
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/src/usr.sbin/btattach/ |
init_st.c | 58 case B230400: rate = 0x12; break;
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