1 /* $NetBSD: x1830-dma.h,v 1.1.1.1 2021/11/07 16:49:57 jmcneill Exp $ */ 2 3 /* SPDX-License-Identifier: GPL-2.0-only */ 4 /* 5 * This header provides macros for X1830 DMA bindings. 6 * 7 * Copyright (c) 2019 (Zhou Yanjie) <zhouyanjie (at) wanyeetech.com> 8 */ 9 10 #ifndef __DT_BINDINGS_DMA_X1830_DMA_H__ 11 #define __DT_BINDINGS_DMA_X1830_DMA_H__ 12 13 /* 14 * Request type numbers for the X1830 DMA controller (written to the DRTn 15 * register for the channel). 16 */ 17 #define X1830_DMA_I2S0_TX 0x6 18 #define X1830_DMA_I2S0_RX 0x7 19 #define X1830_DMA_AUTO 0x8 20 #define X1830_DMA_SADC_RX 0x9 21 #define X1830_DMA_UART1_TX 0x12 22 #define X1830_DMA_UART1_RX 0x13 23 #define X1830_DMA_UART0_TX 0x14 24 #define X1830_DMA_UART0_RX 0x15 25 #define X1830_DMA_SSI0_TX 0x16 26 #define X1830_DMA_SSI0_RX 0x17 27 #define X1830_DMA_SSI1_TX 0x18 28 #define X1830_DMA_SSI1_RX 0x19 29 #define X1830_DMA_MSC0_TX 0x1a 30 #define X1830_DMA_MSC0_RX 0x1b 31 #define X1830_DMA_MSC1_TX 0x1c 32 #define X1830_DMA_MSC1_RX 0x1d 33 #define X1830_DMA_DMIC_RX 0x21 34 #define X1830_DMA_SMB0_TX 0x24 35 #define X1830_DMA_SMB0_RX 0x25 36 #define X1830_DMA_SMB1_TX 0x26 37 #define X1830_DMA_SMB1_RX 0x27 38 #define X1830_DMA_DES_TX 0x2e 39 #define X1830_DMA_DES_RX 0x2f 40 41 #endif /* __DT_BINDINGS_DMA_X1830_DMA_H__ */ 42
Indexes created Mon Sep 29 21:09:56 GMT 2025