1 /* $NetBSD: if_ural.c,v 1.68 2026/08/29 01:59:51 maya Exp $ */ 2 /* $FreeBSD: /repoman/r/ncvs/src/sys/dev/usb/if_ural.c,v 1.40 2006/06/02 23:14:40 sam Exp $ */ 3 4 /*- 5 * Copyright (c) 2005, 2006 6 * Damien Bergamini <damien.bergamini (at) free.fr> 7 * 8 * Permission to use, copy, modify, and distribute this software for any 9 * purpose with or without fee is hereby granted, provided that the above 10 * copyright notice and this permission notice appear in all copies. 11 * 12 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 13 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 14 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 15 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 16 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 17 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 18 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 19 */ 20 21 /*- 22 * Ralink Technology RT2500USB chipset driver 23 * http://www.ralinktech.com/ 24 */ 25 26 #include <sys/cdefs.h> 27 __KERNEL_RCSID(0, "$NetBSD: if_ural.c,v 1.68 2026/08/29 01:59:51 maya Exp $"); 28 29 #ifdef _KERNEL_OPT 30 #include "opt_usb.h" 31 #endif 32 33 #include <sys/param.h> 34 #include <sys/sockio.h> 35 #include <sys/sysctl.h> 36 #include <sys/mbuf.h> 37 #include <sys/kernel.h> 38 #include <sys/socket.h> 39 #include <sys/systm.h> 40 #include <sys/conf.h> 41 #include <sys/device.h> 42 43 #include <sys/bus.h> 44 #include <machine/endian.h> 45 #include <sys/intr.h> 46 47 #include <net/bpf.h> 48 #include <net/if.h> 49 #include <net/if_arp.h> 50 #include <net/if_dl.h> 51 #include <net/if_ether.h> 52 #include <net/if_media.h> 53 #include <net/if_types.h> 54 55 #include <netinet/in.h> 56 #include <netinet/in_systm.h> 57 #include <netinet/in_var.h> 58 #include <netinet/ip.h> 59 60 #include <net80211/ieee80211_netbsd.h> 61 #include <net80211/ieee80211_var.h> 62 #include <net80211/ieee80211_amrr.h> 63 #include <net80211/ieee80211_radiotap.h> 64 65 #include <dev/usb/usb.h> 66 #include <dev/usb/usbdi.h> 67 #include <dev/usb/usbdi_util.h> 68 #include <dev/usb/usbdevs.h> 69 70 #include <dev/usb/if_uralreg.h> 71 #include <dev/usb/if_uralvar.h> 72 73 #ifdef URAL_DEBUG 74 #define DPRINTF(x) do { if (ural_debug) printf x; } while (0) 75 #define DPRINTFN(n, x) do { if (ural_debug >= (n)) printf x; } while (0) 76 int ural_debug = 0; 77 #else 78 #define DPRINTF(x) 79 #define DPRINTFN(n, x) 80 #endif 81 82 /* various supported device vendors/products */ 83 static const struct usb_devno ural_devs[] = { 84 { USB_VENDOR_ASUSTEK, USB_PRODUCT_ASUSTEK_WL167G }, 85 { USB_VENDOR_ASUSTEK, USB_PRODUCT_RALINK_RT2570 }, 86 { USB_VENDOR_BELKIN, USB_PRODUCT_BELKIN_F5D7050 }, 87 { USB_VENDOR_CISCOLINKSYS, USB_PRODUCT_CISCOLINKSYS_WUSB54G }, 88 { USB_VENDOR_CISCOLINKSYS, USB_PRODUCT_CISCOLINKSYS_WUSB54GP }, 89 { USB_VENDOR_CISCOLINKSYS, USB_PRODUCT_CISCOLINKSYS_HU200TS }, 90 { USB_VENDOR_CONCEPTRONIC, USB_PRODUCT_CONCEPTRONIC_C54RU }, 91 { USB_VENDOR_DLINK, USB_PRODUCT_DLINK_DWLG122 }, 92 { USB_VENDOR_GIGABYTE, USB_PRODUCT_GIGABYTE_GNWBKG }, 93 { USB_VENDOR_GUILLEMOT, USB_PRODUCT_GUILLEMOT_HWGUSB254 }, 94 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54 }, 95 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54AI }, 96 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54YB }, 97 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_NINWIFI }, 98 { USB_VENDOR_MSI, USB_PRODUCT_MSI_MS6861 }, 99 { USB_VENDOR_MSI, USB_PRODUCT_MSI_MS6865 }, 100 { USB_VENDOR_MSI, USB_PRODUCT_MSI_MS6869 }, 101 { USB_VENDOR_NOVATECH, USB_PRODUCT_NOVATECH_NV902W }, 102 { USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570 }, 103 { USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570_2 }, 104 { USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570_3 }, 105 { USB_VENDOR_SMC, USB_PRODUCT_SMC_2862WG }, 106 { USB_VENDOR_SPHAIRON, USB_PRODUCT_SPHAIRON_UB801R }, 107 { USB_VENDOR_SURECOM, USB_PRODUCT_SURECOM_EP9001G }, 108 { USB_VENDOR_VTECH, USB_PRODUCT_VTECH_RT2570 }, 109 { USB_VENDOR_ZINWELL, USB_PRODUCT_ZINWELL_ZWXG261 }, 110 }; 111 112 Static int ural_alloc_tx_list(struct ural_softc *); 113 Static void ural_free_tx_list(struct ural_softc *); 114 Static int ural_alloc_rx_list(struct ural_softc *); 115 Static void ural_free_rx_list(struct ural_softc *); 116 Static int ural_media_change(struct ifnet *); 117 Static void ural_next_scan(void *); 118 Static void ural_task(void *); 119 Static int ural_newstate(struct ieee80211com *, 120 enum ieee80211_state, int); 121 Static int ural_rxrate(struct ural_rx_desc *); 122 Static void ural_txeof(struct usbd_xfer *, void *, 123 usbd_status); 124 Static void ural_rxeof(struct usbd_xfer *, void *, 125 usbd_status); 126 Static int ural_ack_rate(struct ieee80211com *, int); 127 Static uint16_t ural_txtime(int, int, uint32_t); 128 Static uint8_t ural_plcp_signal(int); 129 Static void ural_setup_tx_desc(struct ural_softc *, 130 struct ural_tx_desc *, uint32_t, int, int); 131 Static int ural_tx_bcn(struct ural_softc *, struct mbuf *, 132 struct ieee80211_node *); 133 Static int ural_tx_mgt(struct ural_softc *, struct mbuf *, 134 struct ieee80211_node *); 135 Static int ural_tx_data(struct ural_softc *, struct mbuf *, 136 struct ieee80211_node *); 137 Static void ural_start(struct ifnet *); 138 Static void ural_watchdog(struct ifnet *); 139 Static int ural_reset(struct ifnet *); 140 Static int ural_ioctl(struct ifnet *, u_long, void *); 141 Static void ural_set_testmode(struct ural_softc *); 142 Static void ural_eeprom_read(struct ural_softc *, uint16_t, void *, 143 int); 144 Static uint16_t ural_read(struct ural_softc *, uint16_t); 145 Static void ural_read_multi(struct ural_softc *, uint16_t, void *, 146 int); 147 Static void ural_write(struct ural_softc *, uint16_t, uint16_t); 148 Static void ural_write_multi(struct ural_softc *, uint16_t, void *, 149 int); 150 Static void ural_bbp_write(struct ural_softc *, uint8_t, uint8_t); 151 Static uint8_t ural_bbp_read(struct ural_softc *, uint8_t); 152 Static void ural_rf_write(struct ural_softc *, uint8_t, uint32_t); 153 Static void ural_set_chan(struct ural_softc *, 154 struct ieee80211_channel *); 155 Static void ural_disable_rf_tune(struct ural_softc *); 156 Static void ural_enable_tsf_sync(struct ural_softc *); 157 Static void ural_update_slot(struct ifnet *); 158 Static void ural_set_txpreamble(struct ural_softc *); 159 Static void ural_set_basicrates(struct ural_softc *); 160 Static void ural_set_bssid(struct ural_softc *, uint8_t *); 161 Static void ural_set_macaddr(struct ural_softc *, uint8_t *); 162 Static void ural_update_promisc(struct ural_softc *); 163 Static const char *ural_get_rf(int); 164 Static void ural_read_eeprom(struct ural_softc *); 165 Static int ural_bbp_init(struct ural_softc *); 166 Static void ural_set_txantenna(struct ural_softc *, int); 167 Static void ural_set_rxantenna(struct ural_softc *, int); 168 Static int ural_init(struct ifnet *); 169 Static void ural_stop(struct ifnet *, int); 170 Static void ural_amrr_start(struct ural_softc *, 171 struct ieee80211_node *); 172 Static void ural_amrr_timeout(void *); 173 Static void ural_amrr_update(struct usbd_xfer *, void *, 174 usbd_status status); 175 176 /* 177 * Default values for MAC registers; values taken from the reference driver. 178 */ 179 static const struct { 180 uint16_t reg; 181 uint16_t val; 182 } ural_def_mac[] = { 183 { RAL_TXRX_CSR5, 0x8c8d }, 184 { RAL_TXRX_CSR6, 0x8b8a }, 185 { RAL_TXRX_CSR7, 0x8687 }, 186 { RAL_TXRX_CSR8, 0x0085 }, 187 { RAL_MAC_CSR13, 0x1111 }, 188 { RAL_MAC_CSR14, 0x1e11 }, 189 { RAL_TXRX_CSR21, 0xe78f }, 190 { RAL_MAC_CSR9, 0xff1d }, 191 { RAL_MAC_CSR11, 0x0002 }, 192 { RAL_MAC_CSR22, 0x0053 }, 193 { RAL_MAC_CSR15, 0x0000 }, 194 { RAL_MAC_CSR8, 0x0780 }, 195 { RAL_TXRX_CSR19, 0x0000 }, 196 { RAL_TXRX_CSR18, 0x005a }, 197 { RAL_PHY_CSR2, 0x0000 }, 198 { RAL_TXRX_CSR0, 0x1ec0 }, 199 { RAL_PHY_CSR4, 0x000f } 200 }; 201 202 /* 203 * Default values for BBP registers; values taken from the reference driver. 204 */ 205 static const struct { 206 uint8_t reg; 207 uint8_t val; 208 } ural_def_bbp[] = { 209 { 3, 0x02 }, 210 { 4, 0x19 }, 211 { 14, 0x1c }, 212 { 15, 0x30 }, 213 { 16, 0xac }, 214 { 17, 0x48 }, 215 { 18, 0x18 }, 216 { 19, 0xff }, 217 { 20, 0x1e }, 218 { 21, 0x08 }, 219 { 22, 0x08 }, 220 { 23, 0x08 }, 221 { 24, 0x80 }, 222 { 25, 0x50 }, 223 { 26, 0x08 }, 224 { 27, 0x23 }, 225 { 30, 0x10 }, 226 { 31, 0x2b }, 227 { 32, 0xb9 }, 228 { 34, 0x12 }, 229 { 35, 0x50 }, 230 { 39, 0xc4 }, 231 { 40, 0x02 }, 232 { 41, 0x60 }, 233 { 53, 0x10 }, 234 { 54, 0x18 }, 235 { 56, 0x08 }, 236 { 57, 0x10 }, 237 { 58, 0x08 }, 238 { 61, 0x60 }, 239 { 62, 0x10 }, 240 { 75, 0xff } 241 }; 242 243 /* 244 * Default values for RF register R2 indexed by channel numbers. 245 */ 246 static const uint32_t ural_rf2522_r2[] = { 247 0x307f6, 0x307fb, 0x30800, 0x30805, 0x3080a, 0x3080f, 0x30814, 248 0x30819, 0x3081e, 0x30823, 0x30828, 0x3082d, 0x30832, 0x3083e 249 }; 250 251 static const uint32_t ural_rf2523_r2[] = { 252 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d, 253 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346 254 }; 255 256 static const uint32_t ural_rf2524_r2[] = { 257 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d, 258 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346 259 }; 260 261 static const uint32_t ural_rf2525_r2[] = { 262 0x20327, 0x20328, 0x20329, 0x2032a, 0x2032b, 0x2032c, 0x2032d, 263 0x2032e, 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20346 264 }; 265 266 static const uint32_t ural_rf2525_hi_r2[] = { 267 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20344, 0x20345, 268 0x20346, 0x20347, 0x20348, 0x20349, 0x2034a, 0x2034b, 0x2034e 269 }; 270 271 static const uint32_t ural_rf2525e_r2[] = { 272 0x2044d, 0x2044e, 0x2044f, 0x20460, 0x20461, 0x20462, 0x20463, 273 0x20464, 0x20465, 0x20466, 0x20467, 0x20468, 0x20469, 0x2046b 274 }; 275 276 static const uint32_t ural_rf2526_hi_r2[] = { 277 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d, 0x0022d, 278 0x0022e, 0x0022e, 0x0022f, 0x0022d, 0x00240, 0x00240, 0x00241 279 }; 280 281 static const uint32_t ural_rf2526_r2[] = { 282 0x00226, 0x00227, 0x00227, 0x00228, 0x00228, 0x00229, 0x00229, 283 0x0022a, 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d 284 }; 285 286 /* 287 * For dual-band RF, RF registers R1 and R4 also depend on channel number; 288 * values taken from the reference driver. 289 */ 290 static const struct { 291 uint8_t chan; 292 uint32_t r1; 293 uint32_t r2; 294 uint32_t r4; 295 } ural_rf5222[] = { 296 { 1, 0x08808, 0x0044d, 0x00282 }, 297 { 2, 0x08808, 0x0044e, 0x00282 }, 298 { 3, 0x08808, 0x0044f, 0x00282 }, 299 { 4, 0x08808, 0x00460, 0x00282 }, 300 { 5, 0x08808, 0x00461, 0x00282 }, 301 { 6, 0x08808, 0x00462, 0x00282 }, 302 { 7, 0x08808, 0x00463, 0x00282 }, 303 { 8, 0x08808, 0x00464, 0x00282 }, 304 { 9, 0x08808, 0x00465, 0x00282 }, 305 { 10, 0x08808, 0x00466, 0x00282 }, 306 { 11, 0x08808, 0x00467, 0x00282 }, 307 { 12, 0x08808, 0x00468, 0x00282 }, 308 { 13, 0x08808, 0x00469, 0x00282 }, 309 { 14, 0x08808, 0x0046b, 0x00286 }, 310 311 { 36, 0x08804, 0x06225, 0x00287 }, 312 { 40, 0x08804, 0x06226, 0x00287 }, 313 { 44, 0x08804, 0x06227, 0x00287 }, 314 { 48, 0x08804, 0x06228, 0x00287 }, 315 { 52, 0x08804, 0x06229, 0x00287 }, 316 { 56, 0x08804, 0x0622a, 0x00287 }, 317 { 60, 0x08804, 0x0622b, 0x00287 }, 318 { 64, 0x08804, 0x0622c, 0x00287 }, 319 320 { 100, 0x08804, 0x02200, 0x00283 }, 321 { 104, 0x08804, 0x02201, 0x00283 }, 322 { 108, 0x08804, 0x02202, 0x00283 }, 323 { 112, 0x08804, 0x02203, 0x00283 }, 324 { 116, 0x08804, 0x02204, 0x00283 }, 325 { 120, 0x08804, 0x02205, 0x00283 }, 326 { 124, 0x08804, 0x02206, 0x00283 }, 327 { 128, 0x08804, 0x02207, 0x00283 }, 328 { 132, 0x08804, 0x02208, 0x00283 }, 329 { 136, 0x08804, 0x02209, 0x00283 }, 330 { 140, 0x08804, 0x0220a, 0x00283 }, 331 332 { 149, 0x08808, 0x02429, 0x00281 }, 333 { 153, 0x08808, 0x0242b, 0x00281 }, 334 { 157, 0x08808, 0x0242d, 0x00281 }, 335 { 161, 0x08808, 0x0242f, 0x00281 } 336 }; 337 338 static int ural_match(device_t, cfdata_t, void *); 339 static void ural_attach(device_t, device_t, void *); 340 static int ural_detach(device_t, int); 341 static int ural_activate(device_t, enum devact); 342 343 CFATTACH_DECL_NEW(ural, sizeof(struct ural_softc), ural_match, ural_attach, 344 ural_detach, ural_activate); 345 346 static int 347 ural_match(device_t parent, cfdata_t match, void *aux) 348 { 349 struct usb_attach_arg *uaa = aux; 350 351 return (usb_lookup(ural_devs, uaa->uaa_vendor, uaa->uaa_product) != NULL) ? 352 UMATCH_VENDOR_PRODUCT : UMATCH_NONE; 353 } 354 355 static void 356 ural_attach(device_t parent, device_t self, void *aux) 357 { 358 struct ural_softc *sc = device_private(self); 359 struct usb_attach_arg *uaa = aux; 360 struct ieee80211com *ic = &sc->sc_ic; 361 struct ifnet *ifp = &sc->sc_if; 362 usb_interface_descriptor_t *id; 363 usb_endpoint_descriptor_t *ed; 364 usbd_status error; 365 char *devinfop; 366 int i; 367 368 sc->sc_dev = self; 369 sc->sc_udev = uaa->uaa_device; 370 sc->sc_init_state = URAL_INIT_NONE; 371 372 aprint_naive("\n"); 373 aprint_normal("\n"); 374 375 devinfop = usbd_devinfo_alloc(sc->sc_udev, 0); 376 aprint_normal_dev(self, "%s\n", devinfop); 377 usbd_devinfo_free(devinfop); 378 379 error = usbd_set_config_no(sc->sc_udev, RAL_CONFIG_NO, 0); 380 if (error != 0) { 381 aprint_error_dev(self, "failed to set configuration" 382 ", err=%s\n", usbd_errstr(error)); 383 return; 384 } 385 386 /* get the first interface handle */ 387 error = usbd_device2interface_handle(sc->sc_udev, RAL_IFACE_INDEX, 388 &sc->sc_iface); 389 if (error != 0) { 390 aprint_error_dev(self, "could not get interface handle\n"); 391 return; 392 } 393 394 /* 395 * Find endpoints. 396 */ 397 id = usbd_get_interface_descriptor(sc->sc_iface); 398 399 sc->sc_rx_no = sc->sc_tx_no = -1; 400 for (i = 0; i < id->bNumEndpoints; i++) { 401 ed = usbd_interface2endpoint_descriptor(sc->sc_iface, i); 402 if (ed == NULL) { 403 aprint_error_dev(self, 404 "no endpoint descriptor for %d\n", i); 405 return; 406 } 407 408 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN && 409 UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK) 410 sc->sc_rx_no = ed->bEndpointAddress; 411 else if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_OUT && 412 UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK) 413 sc->sc_tx_no = ed->bEndpointAddress; 414 } 415 if (sc->sc_rx_no == -1 || sc->sc_tx_no == -1) { 416 aprint_error_dev(self, "missing endpoint\n"); 417 return; 418 } 419 420 usb_init_task(&sc->sc_task, ural_task, sc, 0); 421 callout_init(&sc->sc_scan_ch, 0); 422 sc->amrr.amrr_min_success_threshold = 1; 423 sc->amrr.amrr_max_success_threshold = 15; 424 callout_init(&sc->sc_amrr_ch, 0); 425 426 /* retrieve RT2570 rev. no */ 427 sc->asic_rev = ural_read(sc, RAL_MAC_CSR0); 428 429 /* retrieve MAC address and various other things from EEPROM */ 430 ural_read_eeprom(sc); 431 432 aprint_normal_dev(self, "MAC/BBP RT2570 (rev 0x%02x), RF %s\n", 433 sc->asic_rev, ural_get_rf(sc->rf_rev)); 434 435 ifp->if_softc = sc; 436 memcpy(ifp->if_xname, device_xname(sc->sc_dev), IFNAMSIZ); 437 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 438 ifp->if_init = ural_init; 439 ifp->if_ioctl = ural_ioctl; 440 ifp->if_start = ural_start; 441 ifp->if_watchdog = ural_watchdog; 442 IFQ_SET_MAXLEN(&ifp->if_snd, IFQ_MAXLEN); 443 IFQ_SET_READY(&ifp->if_snd); 444 445 ic->ic_ifp = ifp; 446 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ 447 ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */ 448 ic->ic_state = IEEE80211_S_INIT; 449 450 /* set device capabilities */ 451 ic->ic_caps = 452 IEEE80211_C_IBSS | /* IBSS mode supported */ 453 IEEE80211_C_MONITOR | /* monitor mode supported */ 454 IEEE80211_C_HOSTAP | /* HostAp mode supported */ 455 IEEE80211_C_TXPMGT | /* tx power management */ 456 IEEE80211_C_SHPREAMBLE | /* short preamble supported */ 457 IEEE80211_C_SHSLOT | /* short slot time supported */ 458 IEEE80211_C_WPA; /* 802.11i */ 459 460 if (sc->rf_rev == RAL_RF_5222) { 461 /* set supported .11a rates */ 462 ic->ic_sup_rates[IEEE80211_MODE_11A] = ieee80211_std_rateset_11a; 463 464 /* set supported .11a channels */ 465 for (i = 36; i <= 64; i += 4) { 466 ic->ic_channels[i].ic_freq = 467 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 468 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 469 } 470 for (i = 100; i <= 140; i += 4) { 471 ic->ic_channels[i].ic_freq = 472 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 473 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 474 } 475 for (i = 149; i <= 161; i += 4) { 476 ic->ic_channels[i].ic_freq = 477 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 478 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 479 } 480 } 481 482 /* set supported .11b and .11g rates */ 483 ic->ic_sup_rates[IEEE80211_MODE_11B] = ieee80211_std_rateset_11b; 484 ic->ic_sup_rates[IEEE80211_MODE_11G] = ieee80211_std_rateset_11g; 485 486 /* set supported .11b and .11g channels (1 through 14) */ 487 for (i = 1; i <= 14; i++) { 488 ic->ic_channels[i].ic_freq = 489 ieee80211_ieee2mhz(i, IEEE80211_CHAN_2GHZ); 490 ic->ic_channels[i].ic_flags = 491 IEEE80211_CHAN_CCK | IEEE80211_CHAN_OFDM | 492 IEEE80211_CHAN_DYN | IEEE80211_CHAN_2GHZ; 493 } 494 495 if_initialize(ifp); 496 ieee80211_ifattach(ic); 497 ic->ic_reset = ural_reset; 498 499 /* override state transition machine */ 500 sc->sc_newstate = ic->ic_newstate; 501 ic->ic_newstate = ural_newstate; 502 503 /* XXX media locking needs revisiting */ 504 mutex_init(&sc->sc_media_mtx, MUTEX_DEFAULT, IPL_SOFTUSB); 505 ieee80211_media_init_with_lock(ic, 506 ural_media_change, ieee80211_media_status, &sc->sc_media_mtx); 507 508 bpf_attach2(ifp, DLT_IEEE802_11_RADIO, 509 sizeof(struct ieee80211_frame) + 64, &sc->sc_drvbpf); 510 511 sc->sc_rxtap_len = sizeof(sc->sc_rxtapu); 512 sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len); 513 sc->sc_rxtap.wr_ihdr.it_present = htole32(RAL_RX_RADIOTAP_PRESENT); 514 515 sc->sc_txtap_len = sizeof(sc->sc_txtapu); 516 sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len); 517 sc->sc_txtap.wt_ihdr.it_present = htole32(RAL_TX_RADIOTAP_PRESENT); 518 519 ifp->if_percpuq = if_percpuq_create(ifp); 520 if_register(ifp); 521 522 ieee80211_announce(ic); 523 524 sc->sc_init_state = URAL_INIT_INITED; 525 526 usbd_add_drv_event(USB_EVENT_DRIVER_ATTACH, sc->sc_udev, sc->sc_dev); 527 528 if (!pmf_device_register(self, NULL, NULL)) 529 aprint_error_dev(self, "couldn't establish power handler\n"); 530 531 return; 532 } 533 534 static int 535 ural_detach(device_t self, int flags) 536 { 537 struct ural_softc *sc = device_private(self); 538 struct ieee80211com *ic = &sc->sc_ic; 539 struct ifnet *ifp = &sc->sc_if; 540 int s; 541 542 if (sc->sc_init_state < URAL_INIT_INITED) 543 return 0; 544 545 pmf_device_deregister(self); 546 547 s = splusb(); 548 549 ural_stop(ifp, 1); 550 callout_halt(&sc->sc_scan_ch, NULL); 551 callout_halt(&sc->sc_amrr_ch, NULL); 552 usb_rem_task_wait(sc->sc_udev, &sc->sc_task, USB_TASKQ_DRIVER, NULL); 553 554 bpf_detach(ifp); 555 ieee80211_ifdetach(ic); 556 if_detach(ifp); 557 558 splx(s); 559 560 usbd_add_drv_event(USB_EVENT_DRIVER_DETACH, sc->sc_udev, sc->sc_dev); 561 562 return 0; 563 } 564 565 Static int 566 ural_alloc_tx_list(struct ural_softc *sc) 567 { 568 struct ural_tx_data *data; 569 int i, error; 570 571 sc->tx_queued = 0; 572 573 for (i = 0; i < RAL_TX_LIST_COUNT; i++) { 574 data = &sc->tx_data[i]; 575 576 data->sc = sc; 577 error = usbd_create_xfer(sc->sc_tx_pipeh, 578 RAL_TX_DESC_SIZE + MCLBYTES, USBD_FORCE_SHORT_XFER, 0, 579 &data->xfer); 580 if (error) { 581 printf("%s: could not allocate tx xfer\n", 582 device_xname(sc->sc_dev)); 583 goto fail; 584 } 585 586 data->buf = usbd_get_buffer(data->xfer); 587 } 588 589 return 0; 590 591 fail: ural_free_tx_list(sc); 592 return error; 593 } 594 595 Static void 596 ural_free_tx_list(struct ural_softc *sc) 597 { 598 struct ural_tx_data *data; 599 int i; 600 601 for (i = 0; i < RAL_TX_LIST_COUNT; i++) { 602 data = &sc->tx_data[i]; 603 604 if (data->xfer != NULL) { 605 usbd_destroy_xfer(data->xfer); 606 data->xfer = NULL; 607 } 608 609 if (data->ni != NULL) { 610 ieee80211_free_node(data->ni); 611 data->ni = NULL; 612 } 613 } 614 } 615 616 Static int 617 ural_alloc_rx_list(struct ural_softc *sc) 618 { 619 struct ural_rx_data *data; 620 int i, error; 621 622 for (i = 0; i < RAL_RX_LIST_COUNT; i++) { 623 data = &sc->rx_data[i]; 624 625 data->sc = sc; 626 627 error = usbd_create_xfer(sc->sc_rx_pipeh, MCLBYTES, 628 0, 0, &data->xfer); 629 if (error) { 630 printf("%s: could not allocate rx xfer\n", 631 device_xname(sc->sc_dev)); 632 goto fail; 633 } 634 635 MGETHDR(data->m, M_DONTWAIT, MT_DATA); 636 if (data->m == NULL) { 637 printf("%s: could not allocate rx mbuf\n", 638 device_xname(sc->sc_dev)); 639 error = ENOMEM; 640 goto fail; 641 } 642 643 MCLGET(data->m, M_DONTWAIT); 644 if (!(data->m->m_flags & M_EXT)) { 645 printf("%s: could not allocate rx mbuf cluster\n", 646 device_xname(sc->sc_dev)); 647 error = ENOMEM; 648 goto fail; 649 } 650 651 data->buf = mtod(data->m, uint8_t *); 652 } 653 654 return 0; 655 656 fail: ural_free_rx_list(sc); 657 return error; 658 } 659 660 Static void 661 ural_free_rx_list(struct ural_softc *sc) 662 { 663 struct ural_rx_data *data; 664 int i; 665 666 for (i = 0; i < RAL_RX_LIST_COUNT; i++) { 667 data = &sc->rx_data[i]; 668 669 if (data->xfer != NULL) { 670 usbd_destroy_xfer(data->xfer); 671 data->xfer = NULL; 672 } 673 674 m_freem(data->m); 675 data->m = NULL; 676 } 677 } 678 679 Static int 680 ural_media_change(struct ifnet *ifp) 681 { 682 int error; 683 684 error = ieee80211_media_change(ifp); 685 if (error != ENETRESET) 686 return error; 687 688 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == (IFF_UP | IFF_RUNNING)) 689 ural_init(ifp); 690 691 return 0; 692 } 693 694 /* 695 * This function is called periodically (every 200ms) during scanning to 696 * switch from one channel to another. 697 */ 698 Static void 699 ural_next_scan(void *arg) 700 { 701 struct ural_softc *sc = arg; 702 struct ieee80211com *ic = &sc->sc_ic; 703 704 if (ic->ic_state == IEEE80211_S_SCAN) 705 ieee80211_next_scan(ic); 706 } 707 708 Static void 709 ural_task(void *arg) 710 { 711 struct ural_softc *sc = arg; 712 struct ieee80211com *ic = &sc->sc_ic; 713 enum ieee80211_state ostate; 714 struct ieee80211_node *ni; 715 struct mbuf *m; 716 717 ostate = ic->ic_state; 718 719 switch (sc->sc_state) { 720 case IEEE80211_S_INIT: 721 if (ostate == IEEE80211_S_RUN) { 722 /* abort TSF synchronization */ 723 ural_write(sc, RAL_TXRX_CSR19, 0); 724 725 /* force tx led to stop blinking */ 726 ural_write(sc, RAL_MAC_CSR20, 0); 727 } 728 break; 729 730 case IEEE80211_S_SCAN: 731 ural_set_chan(sc, ic->ic_curchan); 732 callout_reset(&sc->sc_scan_ch, hz / 5, ural_next_scan, sc); 733 break; 734 735 case IEEE80211_S_AUTH: 736 ural_set_chan(sc, ic->ic_curchan); 737 break; 738 739 case IEEE80211_S_ASSOC: 740 ural_set_chan(sc, ic->ic_curchan); 741 break; 742 743 case IEEE80211_S_RUN: 744 ural_set_chan(sc, ic->ic_curchan); 745 746 ni = ic->ic_bss; 747 748 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 749 ural_update_slot(ic->ic_ifp); 750 ural_set_txpreamble(sc); 751 ural_set_basicrates(sc); 752 ural_set_bssid(sc, ni->ni_bssid); 753 } 754 755 if (ic->ic_opmode == IEEE80211_M_HOSTAP || 756 ic->ic_opmode == IEEE80211_M_IBSS) { 757 m = ieee80211_beacon_alloc(ic, ni, &sc->sc_bo); 758 if (m == NULL) { 759 printf("%s: could not allocate beacon\n", 760 device_xname(sc->sc_dev)); 761 return; 762 } 763 764 if (ural_tx_bcn(sc, m, ni) != 0) { 765 m_freem(m); 766 printf("%s: could not send beacon\n", 767 device_xname(sc->sc_dev)); 768 return; 769 } 770 771 /* beacon is no longer needed */ 772 m_freem(m); 773 } 774 775 /* make tx led blink on tx (controlled by ASIC) */ 776 ural_write(sc, RAL_MAC_CSR20, 1); 777 778 if (ic->ic_opmode != IEEE80211_M_MONITOR) 779 ural_enable_tsf_sync(sc); 780 781 /* enable automatic rate adaptation in STA mode */ 782 if (ic->ic_opmode == IEEE80211_M_STA && 783 ic->ic_fixed_rate == IEEE80211_FIXED_RATE_NONE) 784 ural_amrr_start(sc, ni); 785 786 break; 787 } 788 789 sc->sc_newstate(ic, sc->sc_state, -1); 790 } 791 792 Static int 793 ural_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, 794 int arg) 795 { 796 struct ural_softc *sc = ic->ic_ifp->if_softc; 797 798 /* 799 * XXXSMP: This does not wait for the task, if it is in flight, 800 * to complete. If this code works at all, it must rely on the 801 * kernel lock to serialize with the USB task thread. 802 */ 803 usb_rem_task(sc->sc_udev, &sc->sc_task); 804 callout_stop(&sc->sc_scan_ch); 805 callout_stop(&sc->sc_amrr_ch); 806 807 /* do it in a process context */ 808 sc->sc_state = nstate; 809 usb_add_task(sc->sc_udev, &sc->sc_task, USB_TASKQ_DRIVER); 810 811 return 0; 812 } 813 814 /* quickly determine if a given rate is CCK or OFDM */ 815 #define RAL_RATE_IS_OFDM(rate) ((rate) >= 12 && (rate) != 22) 816 817 #define RAL_ACK_SIZE 14 /* 10 + 4(FCS) */ 818 #define RAL_CTS_SIZE 14 /* 10 + 4(FCS) */ 819 820 #define RAL_SIFS 10 /* us */ 821 822 #define RAL_RXTX_TURNAROUND 5 /* us */ 823 824 /* 825 * This function is only used by the Rx radiotap code. 826 */ 827 Static int 828 ural_rxrate(struct ural_rx_desc *desc) 829 { 830 if (le32toh(desc->flags) & RAL_RX_OFDM) { 831 /* reverse function of ural_plcp_signal */ 832 switch (desc->rate) { 833 case 0xb: return 12; 834 case 0xf: return 18; 835 case 0xa: return 24; 836 case 0xe: return 36; 837 case 0x9: return 48; 838 case 0xd: return 72; 839 case 0x8: return 96; 840 case 0xc: return 108; 841 } 842 } else { 843 if (desc->rate == 10) 844 return 2; 845 if (desc->rate == 20) 846 return 4; 847 if (desc->rate == 55) 848 return 11; 849 if (desc->rate == 110) 850 return 22; 851 } 852 return 2; /* should not get there */ 853 } 854 855 Static void 856 ural_txeof(struct usbd_xfer *xfer, void * priv, 857 usbd_status status) 858 { 859 struct ural_tx_data *data = priv; 860 struct ural_softc *sc = data->sc; 861 struct ifnet *ifp = &sc->sc_if; 862 int s; 863 864 if (status != USBD_NORMAL_COMPLETION) { 865 if (status == USBD_NOT_STARTED || status == USBD_CANCELLED) 866 return; 867 868 printf("%s: could not transmit buffer: %s\n", 869 device_xname(sc->sc_dev), usbd_errstr(status)); 870 871 if (status == USBD_STALLED) 872 usbd_clear_endpoint_stall_async(sc->sc_tx_pipeh); 873 874 if_statinc(ifp, if_oerrors); 875 return; 876 } 877 878 s = splnet(); 879 880 m_freem(data->m); 881 data->m = NULL; 882 ieee80211_free_node(data->ni); 883 data->ni = NULL; 884 885 sc->tx_queued--; 886 if_statinc(ifp, if_opackets); 887 888 DPRINTFN(10, ("tx done\n")); 889 890 sc->sc_tx_timer = 0; 891 ifp->if_flags &= ~IFF_OACTIVE; 892 ural_start(ifp); 893 894 splx(s); 895 } 896 897 Static void 898 ural_rxeof(struct usbd_xfer *xfer, void * priv, usbd_status status) 899 { 900 struct ural_rx_data *data = priv; 901 struct ural_softc *sc = data->sc; 902 struct ieee80211com *ic = &sc->sc_ic; 903 struct ifnet *ifp = &sc->sc_if; 904 struct ural_rx_desc *desc; 905 struct ieee80211_frame *wh; 906 struct ieee80211_node *ni; 907 struct mbuf *mnew, *m; 908 int s, len; 909 910 if (status != USBD_NORMAL_COMPLETION) { 911 if (status == USBD_NOT_STARTED || status == USBD_CANCELLED) 912 return; 913 914 if (status == USBD_STALLED) 915 usbd_clear_endpoint_stall_async(sc->sc_rx_pipeh); 916 goto skip; 917 } 918 919 usbd_get_xfer_status(xfer, NULL, NULL, &len, NULL); 920 921 if (len < RAL_RX_DESC_SIZE + IEEE80211_MIN_LEN) { 922 DPRINTF(("%s: xfer too short %d\n", device_xname(sc->sc_dev), 923 len)); 924 if_statinc(ifp, if_ierrors); 925 goto skip; 926 } 927 928 /* rx descriptor is located at the end */ 929 desc = (struct ural_rx_desc *)(data->buf + len - RAL_RX_DESC_SIZE); 930 931 if ((le32toh(desc->flags) & RAL_RX_PHY_ERROR) || 932 (le32toh(desc->flags) & RAL_RX_CRC_ERROR)) { 933 /* 934 * This should not happen since we did not request to receive 935 * those frames when we filled RAL_TXRX_CSR2. 936 */ 937 DPRINTFN(5, ("PHY or CRC error\n")); 938 if_statinc(ifp, if_ierrors); 939 goto skip; 940 } 941 942 MGETHDR(mnew, M_DONTWAIT, MT_DATA); 943 if (mnew == NULL) { 944 if_statinc(ifp, if_ierrors); 945 goto skip; 946 } 947 948 MCLGET(mnew, M_DONTWAIT); 949 if (!(mnew->m_flags & M_EXT)) { 950 if_statinc(ifp, if_ierrors); 951 m_freem(mnew); 952 goto skip; 953 } 954 955 m = data->m; 956 data->m = mnew; 957 data->buf = mtod(data->m, uint8_t *); 958 959 /* finalize mbuf */ 960 m_set_rcvif(m, ifp); 961 m->m_pkthdr.len = m->m_len = (le32toh(desc->flags) >> 16) & 0xfff; 962 m->m_flags |= M_HASFCS; /* h/w leaves FCS */ 963 964 s = splnet(); 965 966 if (sc->sc_drvbpf != NULL) { 967 struct ural_rx_radiotap_header *tap = &sc->sc_rxtap; 968 969 tap->wr_flags = IEEE80211_RADIOTAP_F_FCS; 970 tap->wr_rate = ural_rxrate(desc); 971 tap->wr_chan_freq = htole16(ic->ic_curchan->ic_freq); 972 tap->wr_chan_flags = htole16(ic->ic_curchan->ic_flags); 973 tap->wr_antenna = sc->rx_ant; 974 tap->wr_antsignal = desc->rssi; 975 976 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_rxtap_len, m, BPF_D_IN); 977 } 978 979 wh = mtod(m, struct ieee80211_frame *); 980 ni = ieee80211_find_rxnode(ic, (struct ieee80211_frame_min *)wh); 981 982 /* send the frame to the 802.11 layer */ 983 ieee80211_input(ic, m, ni, desc->rssi, 0); 984 985 /* node is no longer needed */ 986 ieee80211_free_node(ni); 987 988 splx(s); 989 990 DPRINTFN(15, ("rx done\n")); 991 992 skip: /* setup a new transfer */ 993 usbd_setup_xfer(xfer, data, data->buf, MCLBYTES, 994 USBD_SHORT_XFER_OK, USBD_NO_TIMEOUT, ural_rxeof); 995 usbd_transfer(xfer); 996 } 997 998 /* 999 * Return the expected ack rate for a frame transmitted at rate `rate'. 1000 * XXX: this should depend on the destination node basic rate set. 1001 */ 1002 Static int 1003 ural_ack_rate(struct ieee80211com *ic, int rate) 1004 { 1005 switch (rate) { 1006 /* CCK rates */ 1007 case 2: 1008 return 2; 1009 case 4: 1010 case 11: 1011 case 22: 1012 return (ic->ic_curmode == IEEE80211_MODE_11B) ? 4 : rate; 1013 1014 /* OFDM rates */ 1015 case 12: 1016 case 18: 1017 return 12; 1018 case 24: 1019 case 36: 1020 return 24; 1021 case 48: 1022 case 72: 1023 case 96: 1024 case 108: 1025 return 48; 1026 } 1027 1028 /* default to 1Mbps */ 1029 return 2; 1030 } 1031 1032 /* 1033 * Compute the duration (in us) needed to transmit `len' bytes at rate `rate'. 1034 * The function automatically determines the operating mode depending on the 1035 * given rate. `flags' indicates whether short preamble is in use or not. 1036 */ 1037 Static uint16_t 1038 ural_txtime(int len, int rate, uint32_t flags) 1039 { 1040 uint16_t txtime; 1041 1042 if (RAL_RATE_IS_OFDM(rate)) { 1043 /* IEEE Std 802.11g-2003, pp. 37 */ 1044 txtime = (8 + 4 * len + 3 + rate - 1) / rate; 1045 txtime = 16 + 4 + 4 * txtime + 6; 1046 } else { 1047 /* IEEE Std 802.11b-1999, pp. 28 */ 1048 txtime = (16 * len + rate - 1) / rate; 1049 if (rate != 2 && (flags & IEEE80211_F_SHPREAMBLE)) 1050 txtime += 72 + 24; 1051 else 1052 txtime += 144 + 48; 1053 } 1054 return txtime; 1055 } 1056 1057 Static uint8_t 1058 ural_plcp_signal(int rate) 1059 { 1060 switch (rate) { 1061 /* CCK rates (returned values are device-dependent) */ 1062 case 2: return 0x0; 1063 case 4: return 0x1; 1064 case 11: return 0x2; 1065 case 22: return 0x3; 1066 1067 /* OFDM rates (cf IEEE Std 802.11a-1999, pp. 14 Table 80) */ 1068 case 12: return 0xb; 1069 case 18: return 0xf; 1070 case 24: return 0xa; 1071 case 36: return 0xe; 1072 case 48: return 0x9; 1073 case 72: return 0xd; 1074 case 96: return 0x8; 1075 case 108: return 0xc; 1076 1077 /* unsupported rates (should not get there) */ 1078 default: return 0xff; 1079 } 1080 } 1081 1082 Static void 1083 ural_setup_tx_desc(struct ural_softc *sc, struct ural_tx_desc *desc, 1084 uint32_t flags, int len, int rate) 1085 { 1086 struct ieee80211com *ic = &sc->sc_ic; 1087 uint16_t plcp_length; 1088 int remainder; 1089 1090 desc->flags = htole32(flags); 1091 desc->flags |= htole32(RAL_TX_NEWSEQ); 1092 desc->flags |= htole32(len << 16); 1093 1094 desc->wme = htole16(RAL_AIFSN(2) | RAL_LOGCWMIN(3) | RAL_LOGCWMAX(5)); 1095 desc->wme |= htole16(RAL_IVOFFSET(sizeof(struct ieee80211_frame))); 1096 1097 /* setup PLCP fields */ 1098 desc->plcp_signal = ural_plcp_signal(rate); 1099 desc->plcp_service = 4; 1100 1101 len += IEEE80211_CRC_LEN; 1102 if (RAL_RATE_IS_OFDM(rate)) { 1103 desc->flags |= htole32(RAL_TX_OFDM); 1104 1105 plcp_length = len & 0xfff; 1106 desc->plcp_length_hi = plcp_length >> 6; 1107 desc->plcp_length_lo = plcp_length & 0x3f; 1108 } else { 1109 plcp_length = (16 * len + rate - 1) / rate; 1110 if (rate == 22) { 1111 remainder = (16 * len) % 22; 1112 if (remainder != 0 && remainder < 7) 1113 desc->plcp_service |= RAL_PLCP_LENGEXT; 1114 } 1115 desc->plcp_length_hi = plcp_length >> 8; 1116 desc->plcp_length_lo = plcp_length & 0xff; 1117 1118 if (rate != 2 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE)) 1119 desc->plcp_signal |= 0x08; 1120 } 1121 1122 desc->iv = 0; 1123 desc->eiv = 0; 1124 } 1125 1126 #define RAL_TX_TIMEOUT 5000 1127 1128 Static int 1129 ural_tx_bcn(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni) 1130 { 1131 struct ural_tx_desc *desc; 1132 struct usbd_xfer *xfer; 1133 uint8_t cmd = 0; 1134 usbd_status error; 1135 uint8_t *buf; 1136 int xferlen, rate; 1137 1138 rate = IEEE80211_IS_CHAN_5GHZ(ni->ni_chan) ? 12 : 2; 1139 1140 /* xfer length needs to be a multiple of two! */ 1141 xferlen = (RAL_TX_DESC_SIZE + m0->m_pkthdr.len + 1) & ~1; 1142 1143 error = usbd_create_xfer(sc->sc_tx_pipeh, xferlen, 1144 USBD_FORCE_SHORT_XFER, 0, &xfer); 1145 if (error) 1146 return error; 1147 1148 buf = usbd_get_buffer(xfer); 1149 1150 usbd_setup_xfer(xfer, NULL, &cmd, sizeof(cmd), USBD_FORCE_SHORT_XFER, 1151 RAL_TX_TIMEOUT, NULL); 1152 1153 error = usbd_sync_transfer(xfer); 1154 if (error != 0) { 1155 usbd_destroy_xfer(xfer); 1156 return error; 1157 } 1158 1159 desc = (struct ural_tx_desc *)buf; 1160 1161 m_copydata(m0, 0, m0->m_pkthdr.len, buf + RAL_TX_DESC_SIZE); 1162 ural_setup_tx_desc(sc, desc, RAL_TX_IFS_NEWBACKOFF | RAL_TX_TIMESTAMP, 1163 m0->m_pkthdr.len, rate); 1164 1165 DPRINTFN(10, ("sending beacon frame len=%u rate=%u xfer len=%u\n", 1166 m0->m_pkthdr.len, rate, xferlen)); 1167 1168 usbd_setup_xfer(xfer, NULL, buf, xferlen, USBD_FORCE_SHORT_XFER, 1169 RAL_TX_TIMEOUT, NULL); 1170 1171 error = usbd_sync_transfer(xfer); 1172 usbd_destroy_xfer(xfer); 1173 1174 return error; 1175 } 1176 1177 Static int 1178 ural_tx_mgt(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni) 1179 { 1180 struct ieee80211com *ic = &sc->sc_ic; 1181 struct ural_tx_desc *desc; 1182 struct ural_tx_data *data; 1183 struct ieee80211_frame *wh; 1184 struct ieee80211_key *k; 1185 uint32_t flags = 0; 1186 uint16_t dur; 1187 usbd_status error; 1188 int xferlen, rate; 1189 1190 data = &sc->tx_data[0]; 1191 desc = (struct ural_tx_desc *)data->buf; 1192 1193 rate = IEEE80211_IS_CHAN_5GHZ(ic->ic_curchan) ? 12 : 2; 1194 1195 wh = mtod(m0, struct ieee80211_frame *); 1196 1197 if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 1198 k = ieee80211_crypto_encap(ic, ni, m0); 1199 if (k == NULL) { 1200 m_freem(m0); 1201 return ENOBUFS; 1202 } 1203 } 1204 1205 data->m = m0; 1206 data->ni = ni; 1207 1208 wh = mtod(m0, struct ieee80211_frame *); 1209 1210 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1211 flags |= RAL_TX_ACK; 1212 1213 dur = ural_txtime(RAL_ACK_SIZE, rate, ic->ic_flags) + RAL_SIFS; 1214 *(uint16_t *)wh->i_dur = htole16(dur); 1215 1216 /* tell hardware to add timestamp for probe responses */ 1217 if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) == 1218 IEEE80211_FC0_TYPE_MGT && 1219 (wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) == 1220 IEEE80211_FC0_SUBTYPE_PROBE_RESP) 1221 flags |= RAL_TX_TIMESTAMP; 1222 } 1223 1224 if (sc->sc_drvbpf != NULL) { 1225 struct ural_tx_radiotap_header *tap = &sc->sc_txtap; 1226 1227 tap->wt_flags = 0; 1228 tap->wt_rate = rate; 1229 tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq); 1230 tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags); 1231 tap->wt_antenna = sc->tx_ant; 1232 1233 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m0, BPF_D_OUT); 1234 } 1235 1236 m_copydata(m0, 0, m0->m_pkthdr.len, data->buf + RAL_TX_DESC_SIZE); 1237 ural_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate); 1238 1239 /* align end on a 2-bytes boundary */ 1240 xferlen = (RAL_TX_DESC_SIZE + m0->m_pkthdr.len + 1) & ~1; 1241 1242 /* 1243 * No space left in the last URB to store the extra 2 bytes, force 1244 * sending of another URB. 1245 */ 1246 if ((xferlen % 64) == 0) 1247 xferlen += 2; 1248 1249 DPRINTFN(10, ("sending mgt frame len=%u rate=%u xfer len=%u\n", 1250 m0->m_pkthdr.len, rate, xferlen)); 1251 1252 usbd_setup_xfer(data->xfer, data, data->buf, xferlen, 1253 USBD_FORCE_SHORT_XFER, RAL_TX_TIMEOUT, ural_txeof); 1254 1255 error = usbd_transfer(data->xfer); 1256 if (error != USBD_NORMAL_COMPLETION && error != USBD_IN_PROGRESS) { 1257 m_freem(m0); 1258 return error; 1259 } 1260 1261 sc->tx_queued++; 1262 1263 return 0; 1264 } 1265 1266 Static int 1267 ural_tx_data(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni) 1268 { 1269 struct ieee80211com *ic = &sc->sc_ic; 1270 struct ural_tx_desc *desc; 1271 struct ural_tx_data *data; 1272 struct ieee80211_frame *wh; 1273 struct ieee80211_key *k; 1274 uint32_t flags = 0; 1275 uint16_t dur; 1276 usbd_status error; 1277 int xferlen, rate; 1278 1279 wh = mtod(m0, struct ieee80211_frame *); 1280 1281 if (ic->ic_fixed_rate != IEEE80211_FIXED_RATE_NONE) 1282 rate = ic->ic_bss->ni_rates.rs_rates[ic->ic_fixed_rate]; 1283 else 1284 rate = ni->ni_rates.rs_rates[ni->ni_txrate]; 1285 1286 rate &= IEEE80211_RATE_VAL; 1287 1288 if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 1289 k = ieee80211_crypto_encap(ic, ni, m0); 1290 if (k == NULL) { 1291 m_freem(m0); 1292 return ENOBUFS; 1293 } 1294 1295 /* packet header may have moved, reset our local pointer */ 1296 wh = mtod(m0, struct ieee80211_frame *); 1297 } 1298 1299 data = &sc->tx_data[0]; 1300 desc = (struct ural_tx_desc *)data->buf; 1301 1302 data->m = m0; 1303 data->ni = ni; 1304 1305 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1306 flags |= RAL_TX_ACK; 1307 flags |= RAL_TX_RETRY(7); 1308 1309 dur = ural_txtime(RAL_ACK_SIZE, ural_ack_rate(ic, rate), 1310 ic->ic_flags) + RAL_SIFS; 1311 *(uint16_t *)wh->i_dur = htole16(dur); 1312 } 1313 1314 if (sc->sc_drvbpf != NULL) { 1315 struct ural_tx_radiotap_header *tap = &sc->sc_txtap; 1316 1317 tap->wt_flags = 0; 1318 tap->wt_rate = rate; 1319 tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq); 1320 tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags); 1321 tap->wt_antenna = sc->tx_ant; 1322 1323 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m0, BPF_D_OUT); 1324 } 1325 1326 m_copydata(m0, 0, m0->m_pkthdr.len, data->buf + RAL_TX_DESC_SIZE); 1327 ural_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate); 1328 1329 /* align end on a 2-bytes boundary */ 1330 xferlen = (RAL_TX_DESC_SIZE + m0->m_pkthdr.len + 1) & ~1; 1331 1332 /* 1333 * No space left in the last URB to store the extra 2 bytes, force 1334 * sending of another URB. 1335 */ 1336 if ((xferlen % 64) == 0) 1337 xferlen += 2; 1338 1339 DPRINTFN(10, ("sending data frame len=%u rate=%u xfer len=%u\n", 1340 m0->m_pkthdr.len, rate, xferlen)); 1341 usbd_setup_xfer(data->xfer, data, data->buf, xferlen, 1342 USBD_FORCE_SHORT_XFER, RAL_TX_TIMEOUT, ural_txeof); 1343 1344 error = usbd_transfer(data->xfer); 1345 if (error != USBD_NORMAL_COMPLETION && error != USBD_IN_PROGRESS) 1346 return error; 1347 1348 sc->tx_queued++; 1349 1350 return 0; 1351 } 1352 1353 Static void 1354 ural_start(struct ifnet *ifp) 1355 { 1356 struct ural_softc *sc = ifp->if_softc; 1357 struct ieee80211com *ic = &sc->sc_ic; 1358 struct mbuf *m0; 1359 struct ether_header *eh; 1360 struct ieee80211_node *ni; 1361 1362 for (;;) { 1363 IF_POLL(&ic->ic_mgtq, m0); 1364 if (m0 != NULL) { 1365 if (sc->tx_queued >= RAL_TX_LIST_COUNT) { 1366 ifp->if_flags |= IFF_OACTIVE; 1367 break; 1368 } 1369 IF_DEQUEUE(&ic->ic_mgtq, m0); 1370 1371 ni = M_GETCTX(m0, struct ieee80211_node *); 1372 M_CLEARCTX(m0); 1373 bpf_mtap3(ic->ic_rawbpf, m0, BPF_D_OUT); 1374 if (ural_tx_mgt(sc, m0, ni) != 0) 1375 break; 1376 1377 } else { 1378 if (ic->ic_state != IEEE80211_S_RUN) 1379 break; 1380 IFQ_POLL(&ifp->if_snd, m0); 1381 if (m0 == NULL) 1382 break; 1383 if (sc->tx_queued >= RAL_TX_LIST_COUNT) { 1384 ifp->if_flags |= IFF_OACTIVE; 1385 break; 1386 } 1387 IFQ_DEQUEUE(&ifp->if_snd, m0); 1388 1389 if (m0->m_len < sizeof(struct ether_header) && 1390 !(m0 = m_pullup(m0, sizeof(struct ether_header)))) 1391 continue; 1392 1393 eh = mtod(m0, struct ether_header *); 1394 ni = ieee80211_find_txnode(ic, eh->ether_dhost); 1395 if (ni == NULL) { 1396 m_freem(m0); 1397 continue; 1398 } 1399 bpf_mtap(ifp, m0, BPF_D_OUT); 1400 m0 = ieee80211_encap(ic, m0, ni); 1401 if (m0 == NULL) { 1402 ieee80211_free_node(ni); 1403 continue; 1404 } 1405 bpf_mtap3(ic->ic_rawbpf, m0, BPF_D_OUT); 1406 if (ural_tx_data(sc, m0, ni) != 0) { 1407 ieee80211_free_node(ni); 1408 if_statinc(ifp, if_oerrors); 1409 break; 1410 } 1411 } 1412 1413 sc->sc_tx_timer = 5; 1414 ifp->if_timer = 1; 1415 } 1416 } 1417 1418 Static void 1419 ural_watchdog(struct ifnet *ifp) 1420 { 1421 struct ural_softc *sc = ifp->if_softc; 1422 struct ieee80211com *ic = &sc->sc_ic; 1423 1424 ifp->if_timer = 0; 1425 1426 if (sc->sc_tx_timer > 0) { 1427 if (--sc->sc_tx_timer == 0) { 1428 printf("%s: device timeout\n", device_xname(sc->sc_dev)); 1429 /*ural_init(sc); XXX needs a process context! */ 1430 if_statinc(ifp, if_oerrors); 1431 return; 1432 } 1433 ifp->if_timer = 1; 1434 } 1435 1436 ieee80211_watchdog(ic); 1437 } 1438 1439 /* 1440 * This function allows for fast channel switching in monitor mode (used by 1441 * net-mgmt/kismet). In IBSS mode, we must explicitly reset the interface to 1442 * generate a new beacon frame. 1443 */ 1444 Static int 1445 ural_reset(struct ifnet *ifp) 1446 { 1447 struct ural_softc *sc = ifp->if_softc; 1448 struct ieee80211com *ic = &sc->sc_ic; 1449 1450 if (ic->ic_opmode != IEEE80211_M_MONITOR) 1451 return ENETRESET; 1452 1453 ural_set_chan(sc, ic->ic_curchan); 1454 1455 return 0; 1456 } 1457 1458 Static int 1459 ural_ioctl(struct ifnet *ifp, u_long cmd, void *data) 1460 { 1461 #define IS_RUNNING(ifp) \ 1462 (((ifp)->if_flags & IFF_UP) && ((ifp)->if_flags & IFF_RUNNING)) 1463 1464 struct ural_softc *sc = ifp->if_softc; 1465 struct ieee80211com *ic = &sc->sc_ic; 1466 int s, error = 0; 1467 1468 s = splnet(); 1469 1470 switch (cmd) { 1471 case SIOCSIFFLAGS: 1472 if ((error = ifioctl_common(ifp, cmd, data)) != 0) 1473 break; 1474 /* XXX re-use ether_ioctl() */ 1475 switch (ifp->if_flags & (IFF_UP|IFF_RUNNING)) { 1476 case IFF_UP|IFF_RUNNING: 1477 ural_update_promisc(sc); 1478 break; 1479 case IFF_UP: 1480 ural_init(ifp); 1481 break; 1482 case IFF_RUNNING: 1483 ural_stop(ifp, 1); 1484 break; 1485 case 0: 1486 break; 1487 } 1488 break; 1489 1490 case SIOCADDMULTI: 1491 case SIOCDELMULTI: 1492 if ((error = ether_ioctl(ifp, cmd, data)) == ENETRESET) { 1493 error = 0; 1494 } 1495 break; 1496 1497 default: 1498 error = ieee80211_ioctl(ic, cmd, data); 1499 } 1500 1501 if (error == ENETRESET) { 1502 if (IS_RUNNING(ifp) && 1503 (ic->ic_roaming != IEEE80211_ROAMING_MANUAL)) 1504 ural_init(ifp); 1505 error = 0; 1506 } 1507 1508 splx(s); 1509 1510 return error; 1511 #undef IS_RUNNING 1512 } 1513 1514 Static void 1515 ural_set_testmode(struct ural_softc *sc) 1516 { 1517 usb_device_request_t req; 1518 usbd_status error; 1519 1520 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1521 req.bRequest = RAL_VENDOR_REQUEST; 1522 USETW(req.wValue, 4); 1523 USETW(req.wIndex, 1); 1524 USETW(req.wLength, 0); 1525 1526 error = usbd_do_request(sc->sc_udev, &req, NULL); 1527 if (error != 0) { 1528 printf("%s: could not set test mode: %s\n", 1529 device_xname(sc->sc_dev), usbd_errstr(error)); 1530 } 1531 } 1532 1533 Static void 1534 ural_eeprom_read(struct ural_softc *sc, uint16_t addr, void *buf, int len) 1535 { 1536 usb_device_request_t req; 1537 usbd_status error; 1538 1539 req.bmRequestType = UT_READ_VENDOR_DEVICE; 1540 req.bRequest = RAL_READ_EEPROM; 1541 USETW(req.wValue, 0); 1542 USETW(req.wIndex, addr); 1543 USETW(req.wLength, len); 1544 1545 error = usbd_do_request(sc->sc_udev, &req, buf); 1546 if (error != 0) { 1547 printf("%s: could not read EEPROM: %s\n", 1548 device_xname(sc->sc_dev), usbd_errstr(error)); 1549 } 1550 } 1551 1552 Static uint16_t 1553 ural_read(struct ural_softc *sc, uint16_t reg) 1554 { 1555 usb_device_request_t req; 1556 usbd_status error; 1557 uint16_t val; 1558 1559 req.bmRequestType = UT_READ_VENDOR_DEVICE; 1560 req.bRequest = RAL_READ_MAC; 1561 USETW(req.wValue, 0); 1562 USETW(req.wIndex, reg); 1563 USETW(req.wLength, sizeof(uint16_t)); 1564 1565 error = usbd_do_request(sc->sc_udev, &req, &val); 1566 if (error != 0) { 1567 printf("%s: could not read MAC register: %s\n", 1568 device_xname(sc->sc_dev), usbd_errstr(error)); 1569 return 0; 1570 } 1571 1572 return le16toh(val); 1573 } 1574 1575 Static void 1576 ural_read_multi(struct ural_softc *sc, uint16_t reg, void *buf, int len) 1577 { 1578 usb_device_request_t req; 1579 usbd_status error; 1580 1581 req.bmRequestType = UT_READ_VENDOR_DEVICE; 1582 req.bRequest = RAL_READ_MULTI_MAC; 1583 USETW(req.wValue, 0); 1584 USETW(req.wIndex, reg); 1585 USETW(req.wLength, len); 1586 1587 error = usbd_do_request(sc->sc_udev, &req, buf); 1588 if (error != 0) { 1589 printf("%s: could not read MAC register: %s\n", 1590 device_xname(sc->sc_dev), usbd_errstr(error)); 1591 } 1592 } 1593 1594 Static void 1595 ural_write(struct ural_softc *sc, uint16_t reg, uint16_t val) 1596 { 1597 usb_device_request_t req; 1598 usbd_status error; 1599 1600 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1601 req.bRequest = RAL_WRITE_MAC; 1602 USETW(req.wValue, val); 1603 USETW(req.wIndex, reg); 1604 USETW(req.wLength, 0); 1605 1606 error = usbd_do_request(sc->sc_udev, &req, NULL); 1607 if (error != 0) { 1608 printf("%s: could not write MAC register: %s\n", 1609 device_xname(sc->sc_dev), usbd_errstr(error)); 1610 } 1611 } 1612 1613 Static void 1614 ural_write_multi(struct ural_softc *sc, uint16_t reg, void *buf, int len) 1615 { 1616 usb_device_request_t req; 1617 usbd_status error; 1618 1619 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1620 req.bRequest = RAL_WRITE_MULTI_MAC; 1621 USETW(req.wValue, 0); 1622 USETW(req.wIndex, reg); 1623 USETW(req.wLength, len); 1624 1625 error = usbd_do_request(sc->sc_udev, &req, buf); 1626 if (error != 0) { 1627 printf("%s: could not write MAC register: %s\n", 1628 device_xname(sc->sc_dev), usbd_errstr(error)); 1629 } 1630 } 1631 1632 Static void 1633 ural_bbp_write(struct ural_softc *sc, uint8_t reg, uint8_t val) 1634 { 1635 uint16_t tmp; 1636 int ntries; 1637 1638 for (ntries = 0; ntries < 5; ntries++) { 1639 if (!(ural_read(sc, RAL_PHY_CSR8) & RAL_BBP_BUSY)) 1640 break; 1641 } 1642 if (ntries == 5) { 1643 printf("%s: could not write to BBP\n", device_xname(sc->sc_dev)); 1644 return; 1645 } 1646 1647 tmp = reg << 8 | val; 1648 ural_write(sc, RAL_PHY_CSR7, tmp); 1649 } 1650 1651 Static uint8_t 1652 ural_bbp_read(struct ural_softc *sc, uint8_t reg) 1653 { 1654 uint16_t val; 1655 int ntries; 1656 1657 val = RAL_BBP_WRITE | reg << 8; 1658 ural_write(sc, RAL_PHY_CSR7, val); 1659 1660 for (ntries = 0; ntries < 5; ntries++) { 1661 if (!(ural_read(sc, RAL_PHY_CSR8) & RAL_BBP_BUSY)) 1662 break; 1663 } 1664 if (ntries == 5) { 1665 printf("%s: could not read BBP\n", device_xname(sc->sc_dev)); 1666 return 0; 1667 } 1668 1669 return ural_read(sc, RAL_PHY_CSR7) & 0xff; 1670 } 1671 1672 Static void 1673 ural_rf_write(struct ural_softc *sc, uint8_t reg, uint32_t val) 1674 { 1675 uint32_t tmp; 1676 int ntries; 1677 1678 for (ntries = 0; ntries < 5; ntries++) { 1679 if (!(ural_read(sc, RAL_PHY_CSR10) & RAL_RF_LOBUSY)) 1680 break; 1681 } 1682 if (ntries == 5) { 1683 printf("%s: could not write to RF\n", device_xname(sc->sc_dev)); 1684 return; 1685 } 1686 1687 tmp = RAL_RF_BUSY | RAL_RF_20BIT | (val & 0xfffff) << 2 | (reg & 0x3); 1688 ural_write(sc, RAL_PHY_CSR9, tmp & 0xffff); 1689 ural_write(sc, RAL_PHY_CSR10, tmp >> 16); 1690 1691 /* remember last written value in sc */ 1692 sc->rf_regs[reg] = val; 1693 1694 DPRINTFN(15, ("RF R[%u] <- 0x%05x\n", reg & 0x3, val & 0xfffff)); 1695 } 1696 1697 Static void 1698 ural_set_chan(struct ural_softc *sc, struct ieee80211_channel *c) 1699 { 1700 struct ieee80211com *ic = &sc->sc_ic; 1701 uint8_t power, tmp; 1702 u_int i, chan; 1703 1704 chan = ieee80211_chan2ieee(ic, c); 1705 if (chan == 0 || chan == IEEE80211_CHAN_ANY) 1706 return; 1707 1708 if (IEEE80211_IS_CHAN_2GHZ(c)) 1709 power = uimin(sc->txpow[chan - 1], 31); 1710 else 1711 power = 31; 1712 1713 /* adjust txpower using ifconfig settings */ 1714 power -= (100 - ic->ic_txpowlimit) / 8; 1715 1716 DPRINTFN(2, ("setting channel to %u, txpower to %u\n", chan, power)); 1717 1718 switch (sc->rf_rev) { 1719 case RAL_RF_2522: 1720 ural_rf_write(sc, RAL_RF1, 0x00814); 1721 ural_rf_write(sc, RAL_RF2, ural_rf2522_r2[chan - 1]); 1722 ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040); 1723 break; 1724 1725 case RAL_RF_2523: 1726 ural_rf_write(sc, RAL_RF1, 0x08804); 1727 ural_rf_write(sc, RAL_RF2, ural_rf2523_r2[chan - 1]); 1728 ural_rf_write(sc, RAL_RF3, power << 7 | 0x38044); 1729 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1730 break; 1731 1732 case RAL_RF_2524: 1733 ural_rf_write(sc, RAL_RF1, 0x0c808); 1734 ural_rf_write(sc, RAL_RF2, ural_rf2524_r2[chan - 1]); 1735 ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040); 1736 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1737 break; 1738 1739 case RAL_RF_2525: 1740 ural_rf_write(sc, RAL_RF1, 0x08808); 1741 ural_rf_write(sc, RAL_RF2, ural_rf2525_hi_r2[chan - 1]); 1742 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1743 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1744 1745 ural_rf_write(sc, RAL_RF1, 0x08808); 1746 ural_rf_write(sc, RAL_RF2, ural_rf2525_r2[chan - 1]); 1747 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1748 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1749 break; 1750 1751 case RAL_RF_2525E: 1752 ural_rf_write(sc, RAL_RF1, 0x08808); 1753 ural_rf_write(sc, RAL_RF2, ural_rf2525e_r2[chan - 1]); 1754 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1755 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00286 : 0x00282); 1756 break; 1757 1758 case RAL_RF_2526: 1759 ural_rf_write(sc, RAL_RF2, ural_rf2526_hi_r2[chan - 1]); 1760 ural_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381); 1761 ural_rf_write(sc, RAL_RF1, 0x08804); 1762 1763 ural_rf_write(sc, RAL_RF2, ural_rf2526_r2[chan - 1]); 1764 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1765 ural_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381); 1766 break; 1767 1768 /* dual-band RF */ 1769 case RAL_RF_5222: 1770 for (i = 0; ural_rf5222[i].chan != chan; i++); 1771 1772 ural_rf_write(sc, RAL_RF1, ural_rf5222[i].r1); 1773 ural_rf_write(sc, RAL_RF2, ural_rf5222[i].r2); 1774 ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040); 1775 ural_rf_write(sc, RAL_RF4, ural_rf5222[i].r4); 1776 break; 1777 } 1778 1779 if (ic->ic_opmode != IEEE80211_M_MONITOR && 1780 ic->ic_state != IEEE80211_S_SCAN) { 1781 /* set Japan filter bit for channel 14 */ 1782 tmp = ural_bbp_read(sc, 70); 1783 1784 tmp &= ~RAL_JAPAN_FILTER; 1785 if (chan == 14) 1786 tmp |= RAL_JAPAN_FILTER; 1787 1788 ural_bbp_write(sc, 70, tmp); 1789 1790 /* clear CRC errors */ 1791 ural_read(sc, RAL_STA_CSR0); 1792 1793 DELAY(10000); 1794 ural_disable_rf_tune(sc); 1795 } 1796 } 1797 1798 /* 1799 * Disable RF auto-tuning. 1800 */ 1801 Static void 1802 ural_disable_rf_tune(struct ural_softc *sc) 1803 { 1804 uint32_t tmp; 1805 1806 if (sc->rf_rev != RAL_RF_2523) { 1807 tmp = sc->rf_regs[RAL_RF1] & ~RAL_RF1_AUTOTUNE; 1808 ural_rf_write(sc, RAL_RF1, tmp); 1809 } 1810 1811 tmp = sc->rf_regs[RAL_RF3] & ~RAL_RF3_AUTOTUNE; 1812 ural_rf_write(sc, RAL_RF3, tmp); 1813 1814 DPRINTFN(2, ("disabling RF autotune\n")); 1815 } 1816 1817 /* 1818 * Refer to IEEE Std 802.11-1999 pp. 123 for more information on TSF 1819 * synchronization. 1820 */ 1821 Static void 1822 ural_enable_tsf_sync(struct ural_softc *sc) 1823 { 1824 struct ieee80211com *ic = &sc->sc_ic; 1825 uint16_t logcwmin, preload, tmp; 1826 1827 /* first, disable TSF synchronization */ 1828 ural_write(sc, RAL_TXRX_CSR19, 0); 1829 1830 tmp = (16 * ic->ic_bss->ni_intval) << 4; 1831 ural_write(sc, RAL_TXRX_CSR18, tmp); 1832 1833 logcwmin = (ic->ic_opmode == IEEE80211_M_IBSS) ? 2 : 0; 1834 preload = (ic->ic_opmode == IEEE80211_M_IBSS) ? 320 : 6; 1835 tmp = logcwmin << 12 | preload; 1836 ural_write(sc, RAL_TXRX_CSR20, tmp); 1837 1838 /* finally, enable TSF synchronization */ 1839 tmp = RAL_ENABLE_TSF | RAL_ENABLE_TBCN; 1840 if (ic->ic_opmode == IEEE80211_M_STA) 1841 tmp |= RAL_ENABLE_TSF_SYNC(1); 1842 else 1843 tmp |= RAL_ENABLE_TSF_SYNC(2) | RAL_ENABLE_BEACON_GENERATOR; 1844 ural_write(sc, RAL_TXRX_CSR19, tmp); 1845 1846 DPRINTF(("enabling TSF synchronization\n")); 1847 } 1848 1849 Static void 1850 ural_update_slot(struct ifnet *ifp) 1851 { 1852 struct ural_softc *sc = ifp->if_softc; 1853 struct ieee80211com *ic = &sc->sc_ic; 1854 uint16_t slottime, sifs, eifs; 1855 1856 slottime = (ic->ic_flags & IEEE80211_F_SHSLOT) ? 9 : 20; 1857 1858 /* 1859 * These settings may sound a bit inconsistent but this is what the 1860 * reference driver does. 1861 */ 1862 if (ic->ic_curmode == IEEE80211_MODE_11B) { 1863 sifs = 16 - RAL_RXTX_TURNAROUND; 1864 eifs = 364; 1865 } else { 1866 sifs = 10 - RAL_RXTX_TURNAROUND; 1867 eifs = 64; 1868 } 1869 1870 ural_write(sc, RAL_MAC_CSR10, slottime); 1871 ural_write(sc, RAL_MAC_CSR11, sifs); 1872 ural_write(sc, RAL_MAC_CSR12, eifs); 1873 } 1874 1875 Static void 1876 ural_set_txpreamble(struct ural_softc *sc) 1877 { 1878 uint16_t tmp; 1879 1880 tmp = ural_read(sc, RAL_TXRX_CSR10); 1881 1882 tmp &= ~RAL_SHORT_PREAMBLE; 1883 if (sc->sc_ic.ic_flags & IEEE80211_F_SHPREAMBLE) 1884 tmp |= RAL_SHORT_PREAMBLE; 1885 1886 ural_write(sc, RAL_TXRX_CSR10, tmp); 1887 } 1888 1889 Static void 1890 ural_set_basicrates(struct ural_softc *sc) 1891 { 1892 struct ieee80211com *ic = &sc->sc_ic; 1893 1894 /* update basic rate set */ 1895 if (ic->ic_curmode == IEEE80211_MODE_11B) { 1896 /* 11b basic rates: 1, 2Mbps */ 1897 ural_write(sc, RAL_TXRX_CSR11, 0x3); 1898 } else if (IEEE80211_IS_CHAN_5GHZ(ic->ic_bss->ni_chan)) { 1899 /* 11a basic rates: 6, 12, 24Mbps */ 1900 ural_write(sc, RAL_TXRX_CSR11, 0x150); 1901 } else { 1902 /* 11g basic rates: 1, 2, 5.5, 11, 6, 12, 24Mbps */ 1903 ural_write(sc, RAL_TXRX_CSR11, 0x15f); 1904 } 1905 } 1906 1907 Static void 1908 ural_set_bssid(struct ural_softc *sc, uint8_t *bssid) 1909 { 1910 uint16_t tmp; 1911 1912 tmp = bssid[0] | bssid[1] << 8; 1913 ural_write(sc, RAL_MAC_CSR5, tmp); 1914 1915 tmp = bssid[2] | bssid[3] << 8; 1916 ural_write(sc, RAL_MAC_CSR6, tmp); 1917 1918 tmp = bssid[4] | bssid[5] << 8; 1919 ural_write(sc, RAL_MAC_CSR7, tmp); 1920 1921 DPRINTF(("setting BSSID to %s\n", ether_sprintf(bssid))); 1922 } 1923 1924 Static void 1925 ural_set_macaddr(struct ural_softc *sc, uint8_t *addr) 1926 { 1927 uint16_t tmp; 1928 1929 tmp = addr[0] | addr[1] << 8; 1930 ural_write(sc, RAL_MAC_CSR2, tmp); 1931 1932 tmp = addr[2] | addr[3] << 8; 1933 ural_write(sc, RAL_MAC_CSR3, tmp); 1934 1935 tmp = addr[4] | addr[5] << 8; 1936 ural_write(sc, RAL_MAC_CSR4, tmp); 1937 1938 DPRINTF(("setting MAC address to %s\n", ether_sprintf(addr))); 1939 } 1940 1941 Static void 1942 ural_update_promisc(struct ural_softc *sc) 1943 { 1944 struct ifnet *ifp = sc->sc_ic.ic_ifp; 1945 uint32_t tmp; 1946 1947 tmp = ural_read(sc, RAL_TXRX_CSR2); 1948 1949 tmp &= ~RAL_DROP_NOT_TO_ME; 1950 if (!(ifp->if_flags & IFF_PROMISC)) 1951 tmp |= RAL_DROP_NOT_TO_ME; 1952 1953 ural_write(sc, RAL_TXRX_CSR2, tmp); 1954 1955 DPRINTF(("%s promiscuous mode\n", (ifp->if_flags & IFF_PROMISC) ? 1956 "entering" : "leaving")); 1957 } 1958 1959 Static const char * 1960 ural_get_rf(int rev) 1961 { 1962 switch (rev) { 1963 case RAL_RF_2522: return "RT2522"; 1964 case RAL_RF_2523: return "RT2523"; 1965 case RAL_RF_2524: return "RT2524"; 1966 case RAL_RF_2525: return "RT2525"; 1967 case RAL_RF_2525E: return "RT2525e"; 1968 case RAL_RF_2526: return "RT2526"; 1969 case RAL_RF_5222: return "RT5222"; 1970 default: return "unknown"; 1971 } 1972 } 1973 1974 Static void 1975 ural_read_eeprom(struct ural_softc *sc) 1976 { 1977 struct ieee80211com *ic = &sc->sc_ic; 1978 uint16_t val; 1979 1980 ural_eeprom_read(sc, RAL_EEPROM_CONFIG0, &val, 2); 1981 val = le16toh(val); 1982 sc->rf_rev = (val >> 11) & 0x7; 1983 sc->hw_radio = (val >> 10) & 0x1; 1984 sc->led_mode = (val >> 6) & 0x7; 1985 sc->rx_ant = (val >> 4) & 0x3; 1986 sc->tx_ant = (val >> 2) & 0x3; 1987 sc->nb_ant = val & 0x3; 1988 1989 /* read MAC address */ 1990 ural_eeprom_read(sc, RAL_EEPROM_ADDRESS, ic->ic_myaddr, 6); 1991 1992 /* read default values for BBP registers */ 1993 ural_eeprom_read(sc, RAL_EEPROM_BBP_BASE, sc->bbp_prom, 2 * 16); 1994 1995 /* read Tx power for all b/g channels */ 1996 ural_eeprom_read(sc, RAL_EEPROM_TXPOWER, sc->txpow, 14); 1997 } 1998 1999 Static int 2000 ural_bbp_init(struct ural_softc *sc) 2001 { 2002 int i, ntries; 2003 2004 /* wait for BBP to be ready */ 2005 for (ntries = 0; ntries < 100; ntries++) { 2006 if (ural_bbp_read(sc, RAL_BBP_VERSION) != 0) 2007 break; 2008 DELAY(1000); 2009 } 2010 if (ntries == 100) { 2011 printf("%s: timeout waiting for BBP\n", device_xname(sc->sc_dev)); 2012 return EIO; 2013 } 2014 2015 /* initialize BBP registers to default values */ 2016 for (i = 0; i < __arraycount(ural_def_bbp); i++) 2017 ural_bbp_write(sc, ural_def_bbp[i].reg, ural_def_bbp[i].val); 2018 2019 #if 0 2020 /* initialize BBP registers to values stored in EEPROM */ 2021 for (i = 0; i < 16; i++) { 2022 if (sc->bbp_prom[i].reg == 0xff) 2023 continue; 2024 ural_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val); 2025 } 2026 #endif 2027 2028 return 0; 2029 } 2030 2031 Static void 2032 ural_set_txantenna(struct ural_softc *sc, int antenna) 2033 { 2034 uint16_t tmp; 2035 uint8_t tx; 2036 2037 tx = ural_bbp_read(sc, RAL_BBP_TX) & ~RAL_BBP_ANTMASK; 2038 if (antenna == 1) 2039 tx |= RAL_BBP_ANTA; 2040 else if (antenna == 2) 2041 tx |= RAL_BBP_ANTB; 2042 else 2043 tx |= RAL_BBP_DIVERSITY; 2044 2045 /* need to force I/Q flip for RF 2525e, 2526 and 5222 */ 2046 if (sc->rf_rev == RAL_RF_2525E || sc->rf_rev == RAL_RF_2526 || 2047 sc->rf_rev == RAL_RF_5222) 2048 tx |= RAL_BBP_FLIPIQ; 2049 2050 ural_bbp_write(sc, RAL_BBP_TX, tx); 2051 2052 /* update values in PHY_CSR5 and PHY_CSR6 */ 2053 tmp = ural_read(sc, RAL_PHY_CSR5) & ~0x7; 2054 ural_write(sc, RAL_PHY_CSR5, tmp | (tx & 0x7)); 2055 2056 tmp = ural_read(sc, RAL_PHY_CSR6) & ~0x7; 2057 ural_write(sc, RAL_PHY_CSR6, tmp | (tx & 0x7)); 2058 } 2059 2060 Static void 2061 ural_set_rxantenna(struct ural_softc *sc, int antenna) 2062 { 2063 uint8_t rx; 2064 2065 rx = ural_bbp_read(sc, RAL_BBP_RX) & ~RAL_BBP_ANTMASK; 2066 if (antenna == 1) 2067 rx |= RAL_BBP_ANTA; 2068 else if (antenna == 2) 2069 rx |= RAL_BBP_ANTB; 2070 else 2071 rx |= RAL_BBP_DIVERSITY; 2072 2073 /* need to force no I/Q flip for RF 2525e and 2526 */ 2074 if (sc->rf_rev == RAL_RF_2525E || sc->rf_rev == RAL_RF_2526) 2075 rx &= ~RAL_BBP_FLIPIQ; 2076 2077 ural_bbp_write(sc, RAL_BBP_RX, rx); 2078 } 2079 2080 Static int 2081 ural_init(struct ifnet *ifp) 2082 { 2083 struct ural_softc *sc = ifp->if_softc; 2084 struct ieee80211com *ic = &sc->sc_ic; 2085 struct ieee80211_key *wk; 2086 uint16_t tmp; 2087 usbd_status error; 2088 int i, ntries; 2089 2090 ural_set_testmode(sc); 2091 ural_write(sc, 0x308, 0x00f0); /* XXX magic */ 2092 2093 ural_stop(ifp, 0); 2094 2095 /* initialize MAC registers to default values */ 2096 for (i = 0; i < __arraycount(ural_def_mac); i++) 2097 ural_write(sc, ural_def_mac[i].reg, ural_def_mac[i].val); 2098 2099 /* wait for BBP and RF to wake up (this can take a long time!) */ 2100 for (ntries = 0; ntries < 100; ntries++) { 2101 tmp = ural_read(sc, RAL_MAC_CSR17); 2102 if ((tmp & (RAL_BBP_AWAKE | RAL_RF_AWAKE)) == 2103 (RAL_BBP_AWAKE | RAL_RF_AWAKE)) 2104 break; 2105 DELAY(1000); 2106 } 2107 if (ntries == 100) { 2108 printf("%s: timeout waiting for BBP/RF to wakeup\n", 2109 device_xname(sc->sc_dev)); 2110 error = EIO; 2111 goto fail; 2112 } 2113 2114 /* we're ready! */ 2115 ural_write(sc, RAL_MAC_CSR1, RAL_HOST_READY); 2116 2117 /* set basic rate set (will be updated later) */ 2118 ural_write(sc, RAL_TXRX_CSR11, 0x15f); 2119 2120 error = ural_bbp_init(sc); 2121 if (error != 0) 2122 goto fail; 2123 2124 /* set default BSS channel */ 2125 ural_set_chan(sc, ic->ic_curchan); 2126 2127 /* clear statistic registers (STA_CSR0 to STA_CSR10) */ 2128 ural_read_multi(sc, RAL_STA_CSR0, sc->sta, sizeof(sc->sta)); 2129 2130 ural_set_txantenna(sc, sc->tx_ant); 2131 ural_set_rxantenna(sc, sc->rx_ant); 2132 2133 IEEE80211_ADDR_COPY(ic->ic_myaddr, CLLADDR(ifp->if_sadl)); 2134 ural_set_macaddr(sc, ic->ic_myaddr); 2135 2136 /* 2137 * Copy WEP keys into adapter's memory (SEC_CSR0 to SEC_CSR31). 2138 */ 2139 for (i = 0; i < IEEE80211_WEP_NKID; i++) { 2140 wk = &ic->ic_crypto.cs_nw_keys[i]; 2141 ural_write_multi(sc, wk->wk_keyix * IEEE80211_KEYBUF_SIZE + 2142 RAL_SEC_CSR0, wk->wk_key, IEEE80211_KEYBUF_SIZE); 2143 } 2144 2145 /* 2146 * Allocate xfer for AMRR statistics requests. 2147 */ 2148 struct usbd_pipe *pipe0 = usbd_get_pipe0(sc->sc_udev); 2149 error = usbd_create_xfer(pipe0, sizeof(sc->sta), 0, 0, &sc->amrr_xfer); 2150 if (error) { 2151 printf("%s: could not allocate AMRR xfer\n", 2152 device_xname(sc->sc_dev)); 2153 goto fail; 2154 } 2155 2156 /* 2157 * Open Tx and Rx USB bulk pipes. 2158 */ 2159 error = usbd_open_pipe(sc->sc_iface, sc->sc_tx_no, USBD_EXCLUSIVE_USE, 2160 &sc->sc_tx_pipeh); 2161 if (error != 0) { 2162 printf("%s: could not open Tx pipe: %s\n", 2163 device_xname(sc->sc_dev), usbd_errstr(error)); 2164 goto fail; 2165 } 2166 2167 error = usbd_open_pipe(sc->sc_iface, sc->sc_rx_no, USBD_EXCLUSIVE_USE, 2168 &sc->sc_rx_pipeh); 2169 if (error != 0) { 2170 printf("%s: could not open Rx pipe: %s\n", 2171 device_xname(sc->sc_dev), usbd_errstr(error)); 2172 goto fail; 2173 } 2174 2175 /* 2176 * Allocate Tx and Rx xfer queues. 2177 */ 2178 error = ural_alloc_tx_list(sc); 2179 if (error != 0) { 2180 printf("%s: could not allocate Tx list\n", 2181 device_xname(sc->sc_dev)); 2182 goto fail; 2183 } 2184 2185 error = ural_alloc_rx_list(sc); 2186 if (error != 0) { 2187 printf("%s: could not allocate Rx list\n", 2188 device_xname(sc->sc_dev)); 2189 goto fail; 2190 } 2191 2192 /* 2193 * Start up the receive pipe. 2194 */ 2195 for (i = 0; i < RAL_RX_LIST_COUNT; i++) { 2196 struct ural_rx_data *data = &sc->rx_data[i]; 2197 2198 usbd_setup_xfer(data->xfer, data, data->buf, MCLBYTES, 2199 USBD_SHORT_XFER_OK, USBD_NO_TIMEOUT, ural_rxeof); 2200 usbd_transfer(data->xfer); 2201 } 2202 2203 /* kick Rx */ 2204 tmp = RAL_DROP_PHY_ERROR | RAL_DROP_CRC_ERROR; 2205 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 2206 tmp |= RAL_DROP_CTL | RAL_DROP_VERSION_ERROR; 2207 if (ic->ic_opmode != IEEE80211_M_HOSTAP) 2208 tmp |= RAL_DROP_TODS; 2209 if (!(ifp->if_flags & IFF_PROMISC)) 2210 tmp |= RAL_DROP_NOT_TO_ME; 2211 } 2212 ural_write(sc, RAL_TXRX_CSR2, tmp); 2213 2214 ifp->if_flags &= ~IFF_OACTIVE; 2215 ifp->if_flags |= IFF_RUNNING; 2216 2217 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 2218 if (ic->ic_roaming != IEEE80211_ROAMING_MANUAL) 2219 ieee80211_new_state(ic, IEEE80211_S_SCAN, -1); 2220 } else 2221 ieee80211_new_state(ic, IEEE80211_S_RUN, -1); 2222 2223 return 0; 2224 2225 fail: ural_stop(ifp, 1); 2226 return error; 2227 } 2228 2229 Static void 2230 ural_stop(struct ifnet *ifp, int disable) 2231 { 2232 struct ural_softc *sc = ifp->if_softc; 2233 struct ieee80211com *ic = &sc->sc_ic; 2234 2235 ieee80211_new_state(ic, IEEE80211_S_INIT, -1); 2236 2237 sc->sc_tx_timer = 0; 2238 ifp->if_timer = 0; 2239 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 2240 2241 /* disable Rx */ 2242 ural_write(sc, RAL_TXRX_CSR2, RAL_DISABLE_RX); 2243 2244 /* reset ASIC and BBP (but won't reset MAC registers!) */ 2245 ural_write(sc, RAL_MAC_CSR1, RAL_RESET_ASIC | RAL_RESET_BBP); 2246 ural_write(sc, RAL_MAC_CSR1, 0); 2247 2248 if (sc->amrr_xfer != NULL) { 2249 usbd_destroy_xfer(sc->amrr_xfer); 2250 sc->amrr_xfer = NULL; 2251 } 2252 2253 if (sc->sc_rx_pipeh != NULL) { 2254 usbd_abort_pipe(sc->sc_rx_pipeh); 2255 } 2256 2257 if (sc->sc_tx_pipeh != NULL) { 2258 usbd_abort_pipe(sc->sc_tx_pipeh); 2259 } 2260 2261 ural_free_rx_list(sc); 2262 ural_free_tx_list(sc); 2263 2264 if (sc->sc_rx_pipeh != NULL) { 2265 usbd_close_pipe(sc->sc_rx_pipeh); 2266 sc->sc_rx_pipeh = NULL; 2267 } 2268 2269 if (sc->sc_tx_pipeh != NULL) { 2270 usbd_close_pipe(sc->sc_tx_pipeh); 2271 sc->sc_tx_pipeh = NULL; 2272 } 2273 } 2274 2275 static int 2276 ural_activate(device_t self, enum devact act) 2277 { 2278 struct ural_softc *sc = device_private(self); 2279 2280 switch (act) { 2281 case DVACT_DEACTIVATE: 2282 if_deactivate(&sc->sc_if); 2283 return 0; 2284 default: 2285 return EOPNOTSUPP; 2286 } 2287 } 2288 2289 Static void 2290 ural_amrr_start(struct ural_softc *sc, struct ieee80211_node *ni) 2291 { 2292 int i; 2293 2294 /* clear statistic registers (STA_CSR0 to STA_CSR10) */ 2295 ural_read_multi(sc, RAL_STA_CSR0, sc->sta, sizeof(sc->sta)); 2296 2297 ieee80211_amrr_node_init(&sc->amrr, &sc->amn); 2298 2299 /* set rate to some reasonable initial value */ 2300 for (i = ni->ni_rates.rs_nrates - 1; 2301 i > 0 && (ni->ni_rates.rs_rates[i] & IEEE80211_RATE_VAL) > 72; 2302 i--); 2303 ni->ni_txrate = i; 2304 2305 callout_reset(&sc->sc_amrr_ch, hz, ural_amrr_timeout, sc); 2306 } 2307 2308 Static void 2309 ural_amrr_timeout(void *arg) 2310 { 2311 struct ural_softc *sc = (struct ural_softc *)arg; 2312 usb_device_request_t req; 2313 int s; 2314 2315 s = splusb(); 2316 2317 /* 2318 * Asynchronously read statistic registers (cleared by read). 2319 */ 2320 req.bmRequestType = UT_READ_VENDOR_DEVICE; 2321 req.bRequest = RAL_READ_MULTI_MAC; 2322 USETW(req.wValue, 0); 2323 USETW(req.wIndex, RAL_STA_CSR0); 2324 USETW(req.wLength, sizeof(sc->sta)); 2325 2326 usbd_setup_default_xfer(sc->amrr_xfer, sc->sc_udev, sc, 2327 USBD_DEFAULT_TIMEOUT, &req, sc->sta, sizeof(sc->sta), 0, 2328 ural_amrr_update); 2329 (void)usbd_transfer(sc->amrr_xfer); 2330 2331 splx(s); 2332 } 2333 2334 Static void 2335 ural_amrr_update(struct usbd_xfer *xfer, void * priv, 2336 usbd_status status) 2337 { 2338 struct ural_softc *sc = (struct ural_softc *)priv; 2339 struct ifnet *ifp = sc->sc_ic.ic_ifp; 2340 2341 if (status != USBD_NORMAL_COMPLETION) { 2342 printf("%s: could not retrieve Tx statistics - " 2343 "cancelling automatic rate control\n", 2344 device_xname(sc->sc_dev)); 2345 return; 2346 } 2347 2348 /* count TX retry-fail as Tx errors */ 2349 if_statadd(ifp, if_oerrors, sc->sta[9]); 2350 2351 sc->amn.amn_retrycnt = 2352 sc->sta[7] + /* TX one-retry ok count */ 2353 sc->sta[8] + /* TX more-retry ok count */ 2354 sc->sta[9]; /* TX retry-fail count */ 2355 2356 sc->amn.amn_txcnt = 2357 sc->amn.amn_retrycnt + 2358 sc->sta[6]; /* TX no-retry ok count */ 2359 2360 ieee80211_amrr_choose(&sc->amrr, sc->sc_ic.ic_bss, &sc->amn); 2361 2362 callout_reset(&sc->sc_amrr_ch, hz, ural_amrr_timeout, sc); 2363 } 2364
Indexes created Sun Oct 25 00:26:45 UTC 2026