| /xsrc/external/mit/MesaLib/dist/src/mapi/glapi/gen/ |
| gl_x86-64_asm.py | 33 def should_use_push(registers):
34 for [reg, offset] in registers:
38 N = len(registers)
42 def local_size(registers):
49 N = (len(registers) | 1)
53 def save_all_regs(registers):
55 if not should_use_push(registers):
56 adjust_stack = local_size(registers)
59 for [reg, stack_offset] in registers:
64 def restore_all_regs(registers)
[all...] |
| /xsrc/external/mit/MesaLib.old/dist/src/mapi/glapi/gen/ |
| gl_x86-64_asm.py | 35 def should_use_push(registers):
36 for [reg, offset] in registers:
40 N = len(registers)
44 def local_size(registers):
51 N = (len(registers) | 1)
55 def save_all_regs(registers):
57 if not should_use_push(registers):
58 adjust_stack = local_size(registers)
61 for [reg, stack_offset] in registers:
66 def restore_all_regs(registers)
[all...] |
| /xsrc/external/mit/xf86-video-mga/dist/src/ |
| mga_dri.h | 59 drmRegion registers; member in struct:__anon9040
126 mgaDrmRegion registers; /**< MMIO registers. */ member in struct:__anon9041
|
| mga_dri.c | 523 pMGADRIServer->registers.size = MGAIOMAPSIZE;
527 pMGADRIServer->registers.size,
529 &pMGADRIServer->registers.handle ) < 0 ) {
531 "[drm] Could not add MMIO registers mapping\n" );
535 "[drm] Registers handle = 0x%08x\n",
536 (unsigned int) pMGADRIServer->registers.handle );
591 init.mmio_offset = pMGADRIServer->registers.handle;
1197 pMGADRI->registers.handle = pMGADRIServer->registers.handle;
1198 pMGADRI->registers.size = pMGADRIServer->registers.size
[all...] |
| /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/lima/ir/gp/ |
| regalloc.c | 43 struct reg_info *registers; member in struct:regalloc_ctx
153 struct reg_info *a = &ctx->registers[i];
154 struct reg_info *b = &ctx->registers[j];
168 /* Make the register or node "i" interfere with all the other live registers
200 * partially-defined registers, like:
212 * consider it live. Mask out registers like foo here.
240 struct reg_info *info = &ctx->registers[i];
249 struct reg_info *info = &ctx->registers[i];
253 struct reg_info *conflict_info = &ctx->registers[*conflict];
256 if (!ctx->registers[*conflict].visited && can_simplify(ctx, *conflict))
[all...] |
| /xsrc/external/mit/MesaLib.old/dist/src/amd/common/ |
| sid_tables.py | 242 Store the registers of one ASIC class / group of classes.
246 self.registers = []
250 Parse registers from the given header file. Packets are separately
262 for it in self.registers:
267 self.registers.append(reg)
295 for reg in self.registers:
302 *(asic.registers for asic in reversed(older_asics))):
313 # Copy fields to indexed registers which have their fields only defined
319 # Create a dict of registers with fields and '0' in their name
320 for reg in self.registers
[all...] |
| /xsrc/external/mit/MesaLib.old/dist/src/compiler/nir/ |
| nir_inline_functions.c | 43 exec_list_append(&b->impl->registers, ©->registers);
|
| nir_strip.c | 68 nir_foreach_register(reg, &impl->registers)
|
| nir_lower_regs_to_ssa.c | 216 if (exec_list_is_empty(&impl->registers))
232 nir_foreach_register(reg, &impl->registers) {
234 /* This pass only really works on "plain" registers. If it's a
299 nir_foreach_register_safe(reg, &impl->registers) {
|
| nir_sweep.c | 131 steal_list(nir, nir_register, &impl->registers);
165 /* Variables and registers are not dead. Steal them back. */
|
| /xsrc/external/mit/MesaLib/dist/src/compiler/nir/ |
| nir_inline_functions.c | 43 exec_list_append(&b->impl->registers, ©->registers);
|
| nir_lower_regs_to_ssa.c | 213 if (exec_list_is_empty(&impl->registers))
231 nir_foreach_register(reg, &impl->registers) {
233 /* This pass only really works on "plain" registers. If it's a
284 nir_foreach_register_safe(reg, &impl->registers) {
|
| nir_sweep.c | 111 steal_list(nir, nir_register, &impl->registers);
151 /* Variables and registers are not dead. Steal them back. */
|
| /xsrc/external/mit/MesaLib/dist/src/freedreno/decode/scripts/ |
| analyze.lua | 2 -- various generations, looking for equivalencies between registers.
10 -- generation, find the set of registers that have different values
64 -- figure out which registers are used for which..
76 -- case it filters out too many registers.
|
| /xsrc/external/mit/MesaLib/dist/src/amd/common/ |
| ac_shader_args.h | 148 void ac_add_arg(struct ac_shader_args *info, enum ac_arg_regfile regfile, unsigned registers,
|
| /xsrc/external/mit/MesaLib/dist/src/intel/genxml/ |
| gen_sort_tags.py | 140 registers = sorted(xml.findall('./register'), key=get_name)
141 for r in registers:
144 genxml[:] = enums + list(sorted_structs.values()) + instructions + registers
|
| /xsrc/external/mit/MesaLib.old/dist/src/intel/genxml/ |
| gen_sort_tags.py | 166 registers = sorted(xml.findall('./register'), key=get_name)
167 for r in registers:
170 genxml[:] = enums + sorted_structs.values() + instructions + registers
|
| gen_pack_header.py | 530 self.registers = {}
562 self.registers[attrs["name"]] = 1
|
| /xsrc/external/mit/xf86-video-savage/dist/src/ |
| savage_hwmc.c | 169 * We need to map the overlay registers into the drm.
278 contextRec->MMIOHandle = pSAVAGEDRIServer->registers.handle;
279 contextRec->MMIOSize = pSAVAGEDRIServer->registers.size;
|
| savage_dri.c | 434 pSAVAGEDRIServer->registers.size = SAVAGEIOMAPSIZE;
438 pSAVAGEDRIServer->registers.size,
440 &pSAVAGEDRIServer->registers.handle ) < 0 ) {
442 "[drm] Could not add MMIO registers mapping\n" );
463 pSAVAGEDRIServer->registers.handle,
464 pSAVAGEDRIServer->registers.size,
465 &pSAVAGEDRIServer->registers.map)<0)
468 "[drm] Could not map MMIO registers region to virtual\n" );
1004 xf86DrvMsg( pScrn->scrnIndex, X_INFO, "[junkers] registers:handle:0x%08lx\n",(unsigned long)pSAVAGEDRIServer->registers.handle)
[all...] |
| /xsrc/external/mit/MesaLib/dist/src/broadcom/cle/ |
| v3d_decoder.c | 55 struct v3d_group *registers[256]; member in struct:v3d_spec
113 if (spec->registers[i]->register_offset == offset)
114 return spec->registers[i];
123 if (strcmp(spec->registers[i]->name, name) == 0)
124 return spec->registers[i];
572 spec->registers[spec->nregisters++] = group;
583 assert(spec->nregisters < ARRAY_SIZE(spec->registers));
|
| /xsrc/external/mit/MesaLib/dist/src/gallium/tools/trace/ |
| dump_state.py | 570 registers = {}
576 register = registers.setdefault(file_, set())
579 if 'SAMP' in registers and 'SVIEW' not in registers:
580 registers['SVIEW'] = registers['SAMP']
589 register = registers.setdefault(fileName, set())
|
| /xsrc/external/mit/MesaLib.old/dist/src/broadcom/cle/ |
| v3d_decoder.c | 50 struct v3d_group *registers[256]; member in struct:v3d_spec
104 if (spec->registers[i]->register_offset == offset)
105 return spec->registers[i];
114 if (strcmp(spec->registers[i]->name, name) == 0)
115 return spec->registers[i];
561 spec->registers[spec->nregisters++] = group;
572 assert(spec->nregisters < ARRAY_SIZE(spec->registers));
|
| /xsrc/external/mit/MesaLib.old/dist/src/gallium/tools/trace/ |
| dump_state.py | 569 registers = {}
575 register = registers.setdefault(file_, set())
578 if 'SAMP' in registers and 'SVIEW' not in registers:
579 registers['SVIEW'] = registers['SAMP']
588 register = registers.setdefault(fileName, set())
|
| /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/radeonsi/ |
| si_shader_internal.h | 165 void si_add_arg_checked(struct ac_shader_args *args, enum ac_arg_regfile file, unsigned registers,
|
