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    Searched defs:CLKSEL_CON (Results 1 - 5 of 5) sorted by relevancy

  /src/sys/arch/arm/rockchip/
rk3288_cru.c 45 #define CLKSEL_CON(n) (0x0060 + (n) * 4)
101 CLKSEL_CON(1), /* muxdiv_reg */
106 CLKSEL_CON(1), /* div_reg */
112 CLKSEL_CON(1), /* div_reg */
118 CLKSEL_CON(10), /* div_reg */
124 CLKSEL_CON(10), /* muxdiv_reg */
131 CLKSEL_CON(33), /* div_reg */
137 CLKSEL_CON(10), /* div_reg */
145 CLKSEL_CON(13), /* muxdiv_reg */
153 CLKSEL_CON(17), /* fracdiv_reg *
    [all...]
rk3399_pmucru.c 44 #define CLKSEL_CON(n) (0x0080 + (n) * 4)
297 CLKSEL_CON(2), /* div_reg */
303 CLKSEL_CON(3), /* div_reg */
309 CLKSEL_CON(2), /* div_reg */
315 RK_DIV(RK3399_PCLK_SRC_PMU, "pclk_pmu_src", "ppll", CLKSEL_CON(0), __BITS(4,0), 0),
rk3328_cru.c 45 #define CLKSEL_CON(n) (0x0100 + (n) * 4)
195 CLKSEL_CON(0), /* reg */
201 CLKSEL_CON(0), /* muxdiv_reg */
208 CLKSEL_CON(1), /* muxdiv_reg */
215 CLKSEL_CON(1), /* muxdiv_reg */
222 CLKSEL_CON(24), /* muxdiv_reg */
229 CLKSEL_CON(24), /* muxdiv_reg */
236 CLKSEL_CON(28), /* muxdiv_reg */
242 CLKSEL_CON(29), /* muxdiv_reg */
249 CLKSEL_CON(29), /* muxdiv_reg *
    [all...]
rk3399_cru.c 44 #define CLKSEL_CON(n) (0x0100 + (n) * 4)
155 CLKSEL_CON(0), RK3399_ACLKM_MASK, \
157 CLKSEL_CON(1), RK3399_ATCLK_MASK|RK3399_PDBG_MASK, \
162 CLKSEL_CON(2), RK3399_ACLKM_MASK, \
164 CLKSEL_CON(3), RK3399_ATCLK_MASK|RK3399_PDBG_MASK, \
445 CLKSEL_CON(0), /* mux_reg */
447 CLKSEL_CON(0), /* div_reg */
457 CLKSEL_CON(2), /* mux_reg */
459 CLKSEL_CON(2), /* div_reg */
469 CLKSEL_CON(23), /* muxdiv_reg *
    [all...]
rk3588_cru.c 42 #define CLKSEL_CON(base, n) (0x0300 + (base) + (n) * 4)
78 .reg = CLKSEL_CON(DSU, 6 + (regoff)), \
85 .reg = CLKSEL_CON(DSU, 0), \
98 .reg = CLKSEL_CON(DSU, 1), \
111 .reg = CLKSEL_CON(DSU, 2), \
118 .reg = CLKSEL_CON(DSU, 3), \
196 .reg = CLKSEL_CON(_bigcore, 0), \
205 .reg = CLKSEL_CON(_bigcore, 1), \
564 CLKSEL_CON(BIGCORE0, 0),
570 CLKSEL_CON(BIGCORE1, 0)
    [all...]

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