| /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/ |
| amdgpu_cik_ih.c | 68 u32 ih_rb_cntl = RREG32(mmIH_RB_CNTL); local in function:cik_ih_enable_interrupts
71 ih_rb_cntl |= IH_RB_CNTL__RB_ENABLE_MASK;
73 WREG32(mmIH_RB_CNTL, ih_rb_cntl);
86 u32 ih_rb_cntl = RREG32(mmIH_RB_CNTL); local in function:cik_ih_disable_interrupts
89 ih_rb_cntl &= ~IH_RB_CNTL__RB_ENABLE_MASK;
91 WREG32(mmIH_RB_CNTL, ih_rb_cntl);
115 u32 interrupt_cntl, ih_cntl, ih_rb_cntl; local in function:cik_ih_irq_init
134 ih_rb_cntl = (IH_RB_CNTL__WPTR_OVERFLOW_ENABLE_MASK |
138 ih_rb_cntl |= IH_RB_CNTL__WPTR_WRITEBACK_ENABLE_MASK;
144 WREG32(mmIH_RB_CNTL, ih_rb_cntl);
[all...] |
| amdgpu_cz_ih.c | 68 u32 ih_rb_cntl = RREG32(mmIH_RB_CNTL); local in function:cz_ih_enable_interrupts
71 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, RB_ENABLE, 1);
73 WREG32(mmIH_RB_CNTL, ih_rb_cntl);
86 u32 ih_rb_cntl = RREG32(mmIH_RB_CNTL); local in function:cz_ih_disable_interrupts
89 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, RB_ENABLE, 0);
91 WREG32(mmIH_RB_CNTL, ih_rb_cntl);
114 u32 interrupt_cntl, ih_cntl, ih_rb_cntl; local in function:cz_ih_irq_init
[all...] |
| amdgpu_iceland_ih.c | 68 u32 ih_rb_cntl = RREG32(mmIH_RB_CNTL); local in function:iceland_ih_enable_interrupts
71 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, RB_ENABLE, 1);
73 WREG32(mmIH_RB_CNTL, ih_rb_cntl);
86 u32 ih_rb_cntl = RREG32(mmIH_RB_CNTL); local in function:iceland_ih_disable_interrupts
89 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, RB_ENABLE, 0);
91 WREG32(mmIH_RB_CNTL, ih_rb_cntl);
115 u32 interrupt_cntl, ih_cntl, ih_rb_cntl; local in function:iceland_ih_irq_init
[all...] |
| amdgpu_si_ih.c | 41 u32 ih_rb_cntl = RREG32(IH_RB_CNTL); local in function:si_ih_enable_interrupts
44 ih_rb_cntl |= IH_RB_ENABLE;
46 WREG32(IH_RB_CNTL, ih_rb_cntl);
52 u32 ih_rb_cntl = RREG32(IH_RB_CNTL); local in function:si_ih_disable_interrupts
55 ih_rb_cntl &= ~IH_RB_ENABLE;
57 WREG32(IH_RB_CNTL, ih_rb_cntl);
69 u32 interrupt_cntl, ih_cntl, ih_rb_cntl; local in function:si_ih_irq_init
[all...] |
| amdgpu_tonga_ih.c | 67 u32 ih_rb_cntl = RREG32(mmIH_RB_CNTL); local in function:tonga_ih_enable_interrupts
69 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, RB_ENABLE, 1);
70 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, ENABLE_INTR, 1);
71 WREG32(mmIH_RB_CNTL, ih_rb_cntl);
84 u32 ih_rb_cntl = RREG32(mmIH_RB_CNTL); local in function:tonga_ih_disable_interrupts
86 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, RB_ENABLE, 0)
109 u32 interrupt_cntl, ih_rb_cntl, ih_doorbell_rtpr; local in function:tonga_ih_irq_init
[all...] |
| amdgpu_navi10_ih.c | 52 u32 ih_rb_cntl = RREG32_SOC15(OSSSYS, 0, mmIH_RB_CNTL); local in function:navi10_ih_enable_interrupts
54 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, RB_ENABLE, 1);
55 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, ENABLE_INTR, 1);
56 WREG32_SOC15(OSSSYS, 0, mmIH_RB_CNTL, ih_rb_cntl);
69 u32 ih_rb_cntl = RREG32_SOC15(OSSSYS, 0, mmIH_RB_CNTL); local in function:navi10_ih_disable_interrupts
71 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, RB_ENABLE, 0)
118 u32 ih_rb_cntl, ih_doorbell_rtpr, ih_chicken; local in function:navi10_ih_irq_init
[all...] |
| amdgpu_vega10_ih.c | 54 u32 ih_rb_cntl = RREG32_SOC15(OSSSYS, 0, mmIH_RB_CNTL); local in function:vega10_ih_enable_interrupts
56 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, RB_ENABLE, 1);
57 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, ENABLE_INTR, 1);
59 if (psp_reg_program(&adev->psp, PSP_REG_IH_RB_CNTL, ih_rb_cntl)) {
60 DRM_ERROR("PSP program IH_RB_CNTL failed!\n");
64 WREG32_SOC15(OSSSYS, 0, mmIH_RB_CNTL, ih_rb_cntl);
110 u32 ih_rb_cntl = RREG32_SOC15(OSSSYS, 0, mmIH_RB_CNTL); local in function:vega10_ih_disable_interrupts
227 u32 ih_rb_cntl, ih_chicken; local in function:vega10_ih_irq_init
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/radeon/ |
| radeon_r600.c | 3629 u32 ih_rb_cntl = RREG32(IH_RB_CNTL); local in function:r600_enable_interrupts
3632 ih_rb_cntl |= IH_RB_ENABLE;
3634 WREG32(IH_RB_CNTL, ih_rb_cntl);
3640 u32 ih_rb_cntl = RREG32(IH_RB_CNTL); local in function:r600_disable_interrupts
3643 ih_rb_cntl &= ~IH_RB_ENABLE;
3645 WREG32(IH_RB_CNTL, ih_rb_cntl);
3711 u32 interrupt_cntl, ih_cntl, ih_rb_cntl; local in function:r600_irq_init
[all...] |
| radeon_si.c | 5930 u32 ih_rb_cntl = RREG32(IH_RB_CNTL); local in function:si_enable_interrupts
5933 ih_rb_cntl |= IH_RB_ENABLE;
5935 WREG32(IH_RB_CNTL, ih_rb_cntl);
5941 u32 ih_rb_cntl = RREG32(IH_RB_CNTL); local in function:si_disable_interrupts
5944 ih_rb_cntl &= ~IH_RB_ENABLE;
5946 WREG32(IH_RB_CNTL, ih_rb_cntl);
5989 u32 interrupt_cntl, ih_cntl, ih_rb_cntl; local in function:si_irq_init
[all...] |
| radeon_cik.c | 6843 u32 ih_rb_cntl = RREG32(IH_RB_CNTL); local in function:cik_enable_interrupts
6846 ih_rb_cntl |= IH_RB_ENABLE;
6848 WREG32(IH_RB_CNTL, ih_rb_cntl);
6861 u32 ih_rb_cntl = RREG32(IH_RB_CNTL); local in function:cik_disable_interrupts
6864 ih_rb_cntl &= ~IH_RB_ENABLE;
6866 WREG32(IH_RB_CNTL, ih_rb_cntl);
6967 u32 interrupt_cntl, ih_cntl, ih_rb_cntl; local in function:cik_irq_init
[all...] |
