/src/sys/external/bsd/drm2/dist/drm/amd/powerplay/smumgr/ |
amdgpu_vegam_smumgr.c | 339 uint32_t mm_boot_level_offset, mm_boot_level_value; local in function:vegam_update_uvd_smc_table 347 mm_boot_level_offset = smu_data->smu7_data.dpm_table_start + offsetof(SMU75_Discrete_DpmTable, 349 mm_boot_level_offset /= 4; 350 mm_boot_level_offset *= 4; 352 CGS_IND_REG__SMC, mm_boot_level_offset); 356 CGS_IND_REG__SMC, mm_boot_level_offset, mm_boot_level_value); 371 uint32_t mm_boot_level_offset, mm_boot_level_value; local in function:vegam_update_vce_smc_table 382 mm_boot_level_offset = smu_data->smu7_data.dpm_table_start + 384 mm_boot_level_offset /= 4; 385 mm_boot_level_offset *= 4 [all...] |
amdgpu_fiji_smumgr.c | 2373 uint32_t mm_boot_level_offset, mm_boot_level_value; local in function:fiji_update_uvd_smc_table 2381 mm_boot_level_offset = smu_data->smu7_data.dpm_table_start + offsetof(SMU73_Discrete_DpmTable, 2383 mm_boot_level_offset /= 4; 2384 mm_boot_level_offset *= 4; 2386 CGS_IND_REG__SMC, mm_boot_level_offset); 2390 CGS_IND_REG__SMC, mm_boot_level_offset, mm_boot_level_value); 2405 uint32_t mm_boot_level_offset, mm_boot_level_value; local in function:fiji_update_vce_smc_table 2416 mm_boot_level_offset = smu_data->smu7_data.dpm_table_start + 2418 mm_boot_level_offset /= 4; 2419 mm_boot_level_offset *= 4 [all...] |
amdgpu_polaris10_smumgr.c | 2185 uint32_t mm_boot_level_offset, mm_boot_level_value; local in function:polaris10_update_uvd_smc_table 2193 mm_boot_level_offset = smu_data->smu7_data.dpm_table_start + offsetof(SMU74_Discrete_DpmTable, 2195 mm_boot_level_offset /= 4; 2196 mm_boot_level_offset *= 4; 2198 CGS_IND_REG__SMC, mm_boot_level_offset); 2202 CGS_IND_REG__SMC, mm_boot_level_offset, mm_boot_level_value); 2217 uint32_t mm_boot_level_offset, mm_boot_level_value; local in function:polaris10_update_vce_smc_table 2228 mm_boot_level_offset = smu_data->smu7_data.dpm_table_start + 2230 mm_boot_level_offset /= 4; 2231 mm_boot_level_offset *= 4 [all...] |
amdgpu_tonga_smumgr.c | 2684 uint32_t mm_boot_level_offset, mm_boot_level_value; local in function:tonga_update_uvd_smc_table 2692 mm_boot_level_offset = smu_data->smu7_data.dpm_table_start + 2694 mm_boot_level_offset /= 4; 2695 mm_boot_level_offset *= 4; 2697 CGS_IND_REG__SMC, mm_boot_level_offset); 2702 mm_boot_level_offset, mm_boot_level_value); 2718 uint32_t mm_boot_level_offset, mm_boot_level_value; local in function:tonga_update_vce_smc_table 2726 mm_boot_level_offset = smu_data->smu7_data.dpm_table_start + 2728 mm_boot_level_offset /= 4; 2729 mm_boot_level_offset *= 4 [all...] |