| /src/sys/external/gpl2/dts/dist/arch/arm/boot/dts/ |
| s3c2416.dtsi | 31 clocks: clock-controller@4c000000 { label
43 clocks = <&clocks PCLK_UART3>, <&clocks PCLK_UART3>,
44 <&clocks SCLK_UART>;
54 clocks = <&clocks HCLK_HSMMC0>, <&clocks HCLK_HSMMC0>,
55 <&clocks MUX_HSMMC0>;
65 clocks = <&clocks HCLK_HSMMC1>, <&clocks HCLK_HSMMC1>
[all...] |
| bcm-cygnus-clock.dtsi | 33 clocks {
48 clocks = <&osc>;
56 clocks = <&armpll>;
65 clocks = <&armpll>;
74 clocks = <&osc>;
83 clocks = <&genpll 1>;
92 clocks = <&genpll 1>;
101 clocks = <&osc>;
110 clocks = <&osc>;
121 clocks = <&osc>
[all...] |
| s5pv210.dtsi | 82 clocks = <&clocks CLK_NANDXL>, <&clocks DOUT_FLASH>;
94 clocks: clock-controller@e0100000 { label
98 clocks = <&xxti>, <&xusbxti>;
125 clocks = <&clocks CLK_PDMA0>;
137 clocks = <&clocks CLK_PDMA1>;
149 clocks = <&clocks CLK_TSADC>
[all...] |
| omap24xx-clocks.dtsi | 11 clocks = <&func_96m_ck>, <&mcbsp_clks>;
19 clocks = <&mcbsp1_gate_fck>, <&mcbsp1_mux_fck>;
25 clocks = <&func_96m_ck>, <&mcbsp_clks>;
33 clocks = <&mcbsp2_gate_fck>, <&mcbsp2_mux_fck>;
77 clocks = <&virt_19200000_ck>, <&virt_26m_ck>, <&virt_13m_ck>, <&virt_12m_ck>;
85 clocks = <&aplls_clkin_ck>;
93 clocks = <&aplls_clkin_ck>, <&aplls_clkin_x2_ck>;
102 clocks = <&osc_ck>;
124 clocks = <&sys_ck>, <&sys_ck>;
131 clocks = <&sys_ck>
[all...] |
| omap3430es1-clocks.dtsi | 11 clocks = <&l3_ick>;
19 clocks = <&l3_ick>;
28 clocks = <&gfx_l3_ck>;
36 clocks = <&gfx_l3_fck>;
44 clocks = <&gfx_l3_fck>;
52 clocks = <&sys_ck>;
60 clocks = <&core_48m_fck>;
68 clocks = <&corex2_fck>;
76 clocks = <&corex2_fck>;
85 clocks = <&ssi_ssr_gate_fck_3430es1>, <&ssi_ssr_div_fck_3430es1>
[all...] |
| s3c64xx.dtsi | 68 clocks = <&clocks HCLK_HSMMC0>, <&clocks HCLK_HSMMC0>,
69 <&clocks SCLK_MMC0>;
79 clocks = <&clocks HCLK_HSMMC1>, <&clocks HCLK_HSMMC1>,
80 <&clocks SCLK_MMC1>;
90 clocks = <&clocks HCLK_HSMMC2>, <&clocks HCLK_HSMMC2>
[all...] |
| omap36xx-omap3430es2plus-clocks.dtsi | 11 clocks = <&corex2_fck>;
19 clocks = <&corex2_fck>;
28 clocks = <&ssi_ssr_gate_fck_3430es2>, <&ssi_ssr_div_fck_3430es2>;
34 clocks = <&ssi_ssr_fck>;
42 clocks = <&core_l3_ick>;
50 clocks = <&l4_ick>;
58 clocks = <&ssi_l4_ick>;
66 clocks = <&omap_96m_fck>;
74 clocks = <&sys_ck>;
82 clocks = <&omap_96m_fck>
[all...] |
| stm32f746.dtsi | 51 clocks {
82 clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM2)>;
91 clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM2)>;
112 clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM3)>;
121 clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM3)>;
142 clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM4)>;
151 clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM4)>;
172 clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM5)>;
180 clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM5)>;
201 clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM6)>
[all...] |
| omap2420-clocks.dtsi | 12 clocks = <&core_ck>;
20 clocks = <&core_ck>, <&sys_ck>, <&func_96m_ck>, <&func_54m_ck>;
28 clocks = <&sys_clkout2_src_gate>, <&sys_clkout2_src_mux>;
34 clocks = <&sys_clkout2_src>;
44 clocks = <&dsp_fck>;
52 clocks = <&dsp_fck>;
62 clocks = <&dsp_gate_ick>, <&dsp_div_ick>;
68 clocks = <&core_ck>;
76 clocks = <&core_ck>;
85 clocks = <&iva1_gate_ifck>, <&iva1_div_ifck>
[all...] |
| omap34xx-omap36xx-clocks.dtsi | 11 clocks = <&l4_ick>;
19 clocks = <&security_l4_ick2>;
27 clocks = <&security_l4_ick2>;
35 clocks = <&security_l4_ick2>;
43 clocks = <&security_l4_ick2>;
51 clocks = <&dpll4_m5x2_ck>;
60 clocks = <&l4_ick>;
68 clocks = <&core_96m_fck>;
76 clocks = <&l3_ick>;
84 clocks = <&security_l3_ick>
[all...] |
| omap3xxx-clocks.dtsi | 17 clocks = <&virt_12m_ck>, <&virt_13m_ck>, <&virt_19200000_ck>, <&virt_26000000_ck>, <&virt_38_4m_ck>, <&virt_16_8m_ck>;
24 clocks = <&osc_sys_ck>;
34 clocks = <&osc_sys_ck>;
42 clocks = <&dpll3_ck>;
50 clocks = <&dpll3_m2_ck>;
58 clocks = <&dpll4_ck>;
66 clocks = <&dpll3_m2x2_ck>;
74 clocks = <&sys_ck>;
84 clocks = <&core_96m_fck>, <&mcbsp_clks>;
92 clocks = <&mcbsp5_gate_fck>, <&mcbsp5_mux_fck>
[all...] |
| am43xx-clocks.dtsi | 11 clocks = <&sysboot_freq_sel_ck>, <&crystal_freq_sel_ck>;
19 clocks = <&virt_19200000_ck>, <&virt_24000000_ck>, <&virt_25000000_ck>, <&virt_26000000_ck>;
27 clocks = <&virt_19200000_ck>, <&virt_24000000_ck>, <&virt_25000000_ck>, <&virt_26000000_ck>;
35 clocks = <&sys_clkin_ck>;
43 clocks = <&sys_clkin_ck>;
51 clocks = <&sys_clkin_ck>;
59 clocks = <&sys_clkin_ck>;
67 clocks = <&sys_clkin_ck>;
75 clocks = <&sys_clkin_ck>;
83 clocks = <&sys_clkin_ck>
[all...] |
| am35xx-clocks.dtsi | 11 clocks = <&ipss_ick>;
19 clocks = <&rmii_ck>;
27 clocks = <&ipss_ick>;
35 clocks = <&pclk_ck>;
43 clocks = <&ipss_ick>;
51 clocks = <&sys_ck>;
59 clocks = <&sys_ck>;
68 clocks = <&core_l3_ick>;
88 clocks = <&core_l4_ick>;
96 clocks = <&core_48m_fck>
[all...] |
| wm8750.dtsi | 75 clocks {
94 clocks = <&ref25>;
101 clocks = <&ref25>;
108 clocks = <&ref25>;
115 clocks = <&ref25>;
122 clocks = <&ref25>;
129 clocks = <&plla>;
136 clocks = <&pllb>;
143 clocks = <&pllb>;
150 clocks = <&plld>
[all...] |
| omap36xx-am35xx-omap3430es2plus-clocks.dtsi | 11 clocks = <&corex2_fck>;
19 clocks = <&corex2_fck>;
28 clocks = <&sys_ck>, <&sys_ck>;
37 clocks = <&dpll5_ck>;
46 clocks = <&core_ck>;
54 clocks = <&core_ck>;
62 clocks = <&core_ck>;
70 clocks = <&core_ck>;
78 clocks = <&dpll4_m2x2_ck>;
86 clocks = <&core_ck>
[all...] |
| stm32f429.dtsi | 56 clocks {
100 clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM2)>;
109 clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM2)>;
130 clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM3)>;
139 clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM3)>;
160 clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM4)>;
169 clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM4)>;
190 clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM5)>;
198 clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM5)>;
219 clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM6)>
[all...] |
| arm-realview-eb.dtsi | 67 clocks = <&xtal24mhz>;
75 clocks = <&xtal24mhz>;
83 clocks = <&xtal24mhz>;
91 clocks = <&xtal24mhz>;
99 clocks = <&xtal24mhz>;
107 clocks = <&xtal24mhz>;
110 /* FIXME: this actually hangs off the PLL clocks */
266 clocks = <&xtal24mhz>;
273 clocks = <&xtal24mhz>;
280 clocks = <&xtal24mhz>
[all...] |
| keystone-k2e-clocks.dtsi | 8 clocks {
12 clocks = <&refclksys>;
20 clocks = <&refclkpass>;
29 clocks = <&refclkddr3a>;
38 clocks = <&chipclk16>;
48 clocks = <&chipclk12>;
58 clocks = <&chipclk12>;
68 clocks = <&chipclk13>;
76 * Below are set of fixed, input clocks definitions,
78 * Those clocks can be used as reference clocks for some HW module
[all...] |
| mps2.dtsi | 83 clocks = <&oscclk0>;
91 clocks = <&oscclk1>;
99 clocks = <&oscclk1>;
107 clocks = <&oscclk0>;
115 clocks = <&oscclk0>;
123 clocks = <&oscclk0>;
131 clocks = <&oscclk0>;
151 clocks = <&sysclk>;
159 clocks = <&sysclk>;
166 clocks = <&sysclk>, <&sysclk>, <&sysclk>
[all...] |
| /src/usr.bin/telnet/ |
| types.h | 41 } Clocks;
43 extern Clocks clocks;
|
| /src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/xilinx/ |
| zynqmp-clk-ccf.dtsi | 44 clocks = <&zynqmp_clk CAN0_REF>, <&zynqmp_clk LPD_LSBUS>;
48 clocks = <&zynqmp_clk CAN1_REF>, <&zynqmp_clk LPD_LSBUS>;
52 clocks = <&zynqmp_clk ACPU>;
56 clocks = <&zynqmp_clk GDMA_REF>, <&zynqmp_clk LPD_LSBUS>;
60 clocks = <&zynqmp_clk GDMA_REF>, <&zynqmp_clk LPD_LSBUS>;
64 clocks = <&zynqmp_clk GDMA_REF>, <&zynqmp_clk LPD_LSBUS>;
68 clocks = <&zynqmp_clk GDMA_REF>, <&zynqmp_clk LPD_LSBUS>;
72 clocks = <&zynqmp_clk GDMA_REF>, <&zynqmp_clk LPD_LSBUS>;
76 clocks = <&zynqmp_clk GDMA_REF>, <&zynqmp_clk LPD_LSBUS>;
80 clocks = <&zynqmp_clk GDMA_REF>, <&zynqmp_clk LPD_LSBUS>
[all...] |
| /src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/broadcom/stingray/ |
| stingray-clock.dtsi | 44 clocks = <&osc>;
54 clocks = <&osc>;
66 clocks = <&osc>;
78 clocks = <&osc>;
88 clocks = <&osc>;
100 clocks = <&osc>;
110 clocks = <&osc>;
121 clocks = <&osc>;
130 clocks = <&genpll3 1>;
138 clocks = <&genpll3 BCM_SR_GENPLL3_HSLS_CLK>
[all...] |
| /src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/sprd/ |
| sharkl64.dtsi | 30 clocks = <&clk26mhz>;
38 clocks = <&clk26mhz>;
46 clocks = <&clk26mhz>;
54 clocks = <&clk26mhz>;
|
| /src/sys/arch/arm/dts/ |
| rk3399-crypto.dtsi | 33 clocks = <&cru HCLK_M_CRYPTO1>, <&cru HCLK_S_CRYPTO1>,
36 assigned-clocks = <&cru SCLK_CRYPTO1>, <&cru HCLK_S_CRYPTO1>;
|
| /src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/broadcom/northstar2/ |
| ns2-clock.dtsi | 47 clocks = <&osc>;
60 clocks = <&osc>;
74 clocks = <&osc>;
83 clocks = <&genpll_scr BCM_NS2_GENPLL_SCR_SCR_CLK>;
91 clocks = <&genpll_scr BCM_NS2_GENPLL_SCR_SCR_CLK>;
102 clocks = <&osc>;
|
