| /xsrc/external/mit/MesaLib/dist/src/freedreno/decode/ |
| buffers.h | 34 bool has_dumped(uint64_t gpuaddr, unsigned enable_mask);
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| buffers.c | 134 has_dumped(uint64_t gpuaddr, unsigned enable_mask)
161 if ((b->offsets[n].dumped_mask & enable_mask) == enable_mask)
164 b->offsets[n].dumped_mask |= enable_mask;
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| cffdec.c | 971 } enable_mask = MODE_ALL; variable in typeref:enum:__anon897
1065 unsigned saved_enable_mask = enable_mask;
1076 enable_mask = MODE_ALL;
1083 enable_mask = MODE_BINNING;
1090 enable_mask = MODE_GMEM | MODE_BYPASS;
1099 enable_mask = saved_enable_mask;
2159 if (options->once && has_dumped(ibaddr, enable_mask))
2163 * process the cmdstream for *any* enable_mask mode, since we are
2295 uint16_t enable_mask; member in struct:draw_state
2338 printl(2, "%senable_mask: 0x%x\n", levels[level], ds->enable_mask);
2390 uint32_t enable_mask = (dwords[i] >> 20) & 0xf; local
[all...] |
| /xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/freedreno/a6xx/ |
| fd6_emit.h | 64 uint8_t enable_mask; member in struct:fd6_state_group
113 enum fd6_state_id group_id, unsigned enable_mask)
119 g->enable_mask = enable_mask;
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| fd6_emit.c | 1063 CP_SET_DRAW_STATE__0_ENABLE_MASK(g->enable_mask) |
1069 CP_SET_DRAW_STATE__0_ENABLE_MASK(g->enable_mask) |
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| /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/freedreno/a6xx/ |
| fd6_emit.h | 81 /* enable_mask controls which states the stateobj is evaluated in,
84 uint32_t enable_mask; member in struct:fd6_state_group
134 enum fd6_state_id group_id, unsigned enable_mask)
140 g->enable_mask = enable_mask;
145 enum fd6_state_id group_id, unsigned enable_mask)
148 enable_mask);
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| fd6_emit.c | 489 unsigned enable_mask; member in struct:__anon1199
523 s[type].enable_mask);
544 s[type].enable_mask);
1024 uint32_t enable_mask = ENABLE_ALL; local
1045 enable_mask = ENABLE_DRAW;
1051 enable_mask = CP_SET_DRAW_STATE__0_BINNING;
1133 fd6_emit_take_group(emit, state, group, enable_mask);
1145 debug_assert((g->enable_mask & ~ENABLE_ALL) == 0);
1149 CP_SET_DRAW_STATE__0_DISABLE | g->enable_mask |
1154 OUT_RING(ring, CP_SET_DRAW_STATE__0_COUNT(n) | g->enable_mask |
[all...] |
| /xsrc/external/mit/MesaLib.old/dist/src/freedreno/vulkan/ |
| tu_cmd_buffer.c | 2105 uint32_t enable_mask; member in struct:tu_draw_state_group
2188 .enable_mask = 0x6,
2194 .enable_mask = 0x1,
2200 .enable_mask = 0x6,
2206 .enable_mask = 0x1,
2212 .enable_mask = 0x7,
2218 .enable_mask = 0x7,
2224 .enable_mask = 0x7,
2230 .enable_mask = 0x7,
2241 CP_SET_DRAW_STATE__0_ENABLE_MASK(group->enable_mask) |
[all...] |
| /xsrc/external/mit/MesaLib/dist/src/freedreno/vulkan/ |
| tu_cmd_buffer.c | 496 uint32_t enable_mask; local
507 enable_mask = CP_SET_DRAW_STATE__0_GMEM |
512 enable_mask = CP_SET_DRAW_STATE__0_BINNING;
515 enable_mask = CP_SET_DRAW_STATE__0_GMEM;
518 enable_mask = CP_SET_DRAW_STATE__0_SYSMEM;
521 enable_mask = CP_SET_DRAW_STATE__0_GMEM |
540 enable_mask |= CP_SET_DRAW_STATE__0_DIRTY;
543 enable_mask |
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