| /src/sys/arch/arm/at91/ |
| at91pmc.c | 55 uint64_t mclk, pllaclk, pllbclk, pclk, mstclk; local in function:at91pmc_get_clocks
64 mclk = ((reg & PMC_MCFR_MAINF) * SLOW_CLOCK) / 16U;
67 if (((mclk / 1000) % 1000) >= 990) {
68 mclk += 1000000U - (mclk % 1000000U);
69 } else if (((mclk / 1000) % 1000) <= 10) {
70 mclk -= (mclk % 1000000U);
77 pllaclk = mclk * (((reg & PMC_PLL_MUL) >> PMC_PLL_MUL_SHIFT) + 1);
83 pllbclk = mclk * (((reg & PMC_PLL_MUL) >> PMC_PLL_MUL_SHIFT) + 1)
[all...] |
| /src/sys/arch/arm/dts/ |
| sun50i-a64.dtsi | 34 simple-audio-card,mclk-fs = <256>;
|
| /src/sys/external/bsd/drm2/dist/drm/radeon/ |
| radeon_rv730_dpm.c | 125 LPRV7XX_SMC_MCLK_VALUE mclk)
190 mclk->mclk730.vMCLK_PWRMGT_CNTL = cpu_to_be32(mclk_pwrmgt_cntl);
191 mclk->mclk730.vDLL_CNTL = cpu_to_be32(dll_cntl);
192 mclk->mclk730.mclk_value = cpu_to_be32(memory_clock);
193 mclk->mclk730.vMPLL_FUNC_CNTL = cpu_to_be32(mpll_func_cntl);
194 mclk->mclk730.vMPLL_FUNC_CNTL2 = cpu_to_be32(mpll_func_cntl_2);
195 mclk->mclk730.vMPLL_FUNC_CNTL3 = cpu_to_be32(mpll_func_cntl_3);
196 mclk->mclk730.vMPLL_SS = cpu_to_be32(mpll_ss);
197 mclk->mclk730.vMPLL_SS2 = cpu_to_be32(mpll_ss2);
301 table->ACPIState.levels[0].mclk.mclk730.vMPLL_FUNC_CNTL = cpu_to_be32(mpll_func_cntl)
[all...] |
| radeon_rv740_dpm.c | 120 DRM_DEBUG_KMS("Target MCLK greater than largest MCLK in DLL speed table\n");
193 RV7XX_SMC_MCLK_VALUE *mclk)
276 mclk->mclk770.mclk_value = cpu_to_be32(memory_clock);
277 mclk->mclk770.vMPLL_AD_FUNC_CNTL = cpu_to_be32(mpll_ad_func_cntl);
278 mclk->mclk770.vMPLL_AD_FUNC_CNTL_2 = cpu_to_be32(mpll_ad_func_cntl_2);
279 mclk->mclk770.vMPLL_DQ_FUNC_CNTL = cpu_to_be32(mpll_dq_func_cntl);
280 mclk->mclk770.vMPLL_DQ_FUNC_CNTL_2 = cpu_to_be32(mpll_dq_func_cntl_2);
281 mclk->mclk770.vMCLK_PWRMGT_CNTL = cpu_to_be32(mclk_pwrmgt_cntl);
282 mclk->mclk770.vDLL_CNTL = cpu_to_be32(dll_cntl)
[all...] |
| radeon_rv770_dpm.c | 392 RV7XX_SMC_MCLK_VALUE *mclk)
477 mclk->mclk770.mclk_value = cpu_to_be32(memory_clock);
478 mclk->mclk770.vMPLL_AD_FUNC_CNTL = cpu_to_be32(mpll_ad_func_cntl);
479 mclk->mclk770.vMPLL_AD_FUNC_CNTL_2 = cpu_to_be32(mpll_ad_func_cntl_2);
480 mclk->mclk770.vMPLL_DQ_FUNC_CNTL = cpu_to_be32(mpll_dq_func_cntl);
481 mclk->mclk770.vMPLL_DQ_FUNC_CNTL_2 = cpu_to_be32(mpll_dq_func_cntl_2);
482 mclk->mclk770.vMCLK_PWRMGT_CNTL = cpu_to_be32(mclk_pwrmgt_cntl);
483 mclk->mclk770.vDLL_CNTL = cpu_to_be32(dll_cntl);
596 int rv770_populate_mvdd_value(struct radeon_device *rdev, u32 mclk,
607 if (mclk <= pi->mvdd_split_frequency)
2185 u32 sclk, mclk; local in function:rv7xx_parse_pplib_clock_info
[all...] |
| radeon_cypress_dpm.c | 429 u8 cypress_get_strobe_mode_settings(struct radeon_device *rdev, u32 mclk)
436 if (mclk <= pi->mclk_strobe_mode_threshold)
438 result = cypress_get_mclk_frequency_ratio(rdev, mclk, strobe_mode);
481 RV7XX_SMC_MCLK_VALUE *mclk,
603 mclk->mclk770.mclk_value = cpu_to_be32(memory_clock);
604 mclk->mclk770.vMPLL_AD_FUNC_CNTL = cpu_to_be32(mpll_ad_func_cntl);
605 mclk->mclk770.vMPLL_AD_FUNC_CNTL_2 = cpu_to_be32(mpll_ad_func_cntl_2);
606 mclk->mclk770.vMPLL_DQ_FUNC_CNTL = cpu_to_be32(mpll_dq_func_cntl);
607 mclk->mclk770.vMPLL_DQ_FUNC_CNTL_2 = cpu_to_be32(mpll_dq_func_cntl_2);
608 mclk->mclk770.vMCLK_PWRMGT_CNTL = cpu_to_be32(mclk_pwrmgt_cntl)
[all...] |
| radeon_btc_dpm.c | 1249 u32 *sclk, u32 *mclk)
1253 if ((sclk == NULL) || (mclk == NULL))
1260 (btc_blacklist_clocks[i].mclk == *mclk))
1269 btc_skip_blacklist_clocks(rdev, max_sclk, max_mclk, sclk, mclk);
1279 if ((pl->mclk == 0) || (pl->sclk == 0))
1282 if (pl->mclk == pl->sclk)
1285 if (pl->mclk > pl->sclk) {
1286 if (((pl->mclk + (pl->sclk - 1)) / pl->sclk) > rdev->pm.dpm.dyn_state.mclk_sclk_ratio)
1289 (pl->mclk
2106 u32 mclk, sclk; local in function:btc_apply_state_adjust_rules
[all...] |
| btc_dpm.h | 48 u32 *sclk, u32 *mclk);
|
| rv6xx_dpm.h | 83 u32 mclk; member in struct:rv6xx_pl
|
| rv770_dpm.h | 146 u32 mclk; member in struct:rv7xx_pl
187 LPRV7XX_SMC_MCLK_VALUE mclk);
208 RV7XX_SMC_MCLK_VALUE *mclk);
222 int rv770_populate_mvdd_value(struct radeon_device *rdev, u32 mclk,
|
| radeon_ni_dpm.c | 797 u32 mclk; local in function:ni_apply_state_adjust_rules
814 if (ps->performance_levels[i].mclk > max_limits->mclk)
815 ps->performance_levels[i].mclk = max_limits->mclk;
829 ps->performance_levels[0].mclk =
830 ps->performance_levels[ps->performance_level_count - 1].mclk;
835 btc_skip_blacklist_clocks(rdev, max_limits->sclk, max_limits->mclk,
837 &ps->performance_levels[0].mclk);
848 mclk = ps->performance_levels[0].mclk
[all...] |
| /src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/freescale/ |
| fsl-ls1028a-kontron-sl28-var3-ads2.dts | 48 simple-audio-card,mclk-fs = <256>;
106 clocks = <&mclk>;
107 clock-names = "mclk";
108 assigned-clocks = <&mclk>;
122 mclk: clock-mclk@f130080 { label
|
| /src/sys/external/gpl2/dts/dist/arch/arm/boot/dts/ |
| pxa300-raumfeld-connector.dts | 23 mclk-fs = <256>;
39 mclk-fs = <256>;
|
| exynos5250-snow-rev5.dts | 43 clock-names = "mclk";
|
| exynos5250-snow.dts | 39 clock-names = "mclk";
|
| stihxxx-b2120.dtsi | 34 mclk-fs = <128>;
48 mclk-fs = <256>;
63 mclk-fs = <128>;
|
| exynos5422-odroidxu3-audio.dtsi | 49 clock-names = "mclk";
|
| imx6ul-pico-dwarf.dts | 27 sys_mclk: clock-sys-mclk {
|
| imx7d-pico-nymph.dts | 38 sys_mclk: clock-sys-mclk {
|
| kirkwood-openrd-client.dts | 38 simple-audio-card,mclk-fs = <256>;
|
| pxa300-raumfeld-tuneable-clock.dtsi | 24 mclk-fs = <256>;
|
| r8a7742-iwg21d-q7-dbcm-ca.dts | 24 mclk_cam1: mclk-cam1 {
30 mclk_cam2: mclk-cam2 {
36 mclk_cam3: mclk-cam3 {
42 mclk_cam4: mclk-cam4 {
|
| /src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/rockchip/ |
| rk3399-rockpro64-v2.dts | 21 clock-names = "mclk";
|
| rk3399-rockpro64.dts | 21 clock-names = "mclk";
|
| /src/sys/arch/mips/ingenic/ |
| apbus.c | 129 uint32_t reg, mpll, m, n, p, mclk, pclk, pdiv, cclk, cdiv; local in function:apbus_attach
148 mclk = (48000 * (m + 1) / (n + 1)) / (p + 1);
152 pclk = mclk / pdiv;
154 cclk = mclk / cdiv;
156 aprint_debug_dev(self, "mclk %d kHz\n", mclk);
252 aa.aa_mclk = mclk;
|
