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      1 // SPDX-License-Identifier: GPL-2.0
      2 /*
      3  * Device Tree Source for the iWave-RZ/G1H Qseven board development
      4  * platform with camera daughter board
      5  *
      6  * Copyright (C) 2020 Renesas Electronics Corp.
      7  */
      8 
      9 /dts-v1/;
     10 #include "r8a7742-iwg21d-q7.dts"
     11 
     12 / {
     13 	model = "iWave Systems RZ/G1H Qseven development platform with camera add-on";
     14 	compatible = "iwave,g21d", "iwave,g21m", "renesas,r8a7742";
     15 
     16 	aliases {
     17 		serial0 = &scif0;
     18 		serial1 = &scif1;
     19 		serial3 = &scifb1;
     20 		serial5 = &hscif0;
     21 		ethernet1 = &ether;
     22 	};
     23 
     24 	mclk_cam1: mclk-cam1 {
     25 		compatible = "fixed-clock";
     26 		#clock-cells = <0>;
     27 		clock-frequency = <26000000>;
     28 	};
     29 
     30 	mclk_cam2: mclk-cam2 {
     31 		compatible = "fixed-clock";
     32 		#clock-cells = <0>;
     33 		clock-frequency = <26000000>;
     34 	};
     35 
     36 	mclk_cam3: mclk-cam3 {
     37 		compatible = "fixed-clock";
     38 		#clock-cells = <0>;
     39 		clock-frequency = <26000000>;
     40 	};
     41 
     42 	mclk_cam4: mclk-cam4 {
     43 		compatible = "fixed-clock";
     44 		#clock-cells = <0>;
     45 		clock-frequency = <26000000>;
     46 	};
     47 };
     48 
     49 &avb {
     50 	/* Pins shared with VIN0, keep status disabled */
     51 	status = "disabled";
     52 };
     53 
     54 &can0 {
     55 	pinctrl-0 = <&can0_pins>;
     56 	pinctrl-names = "default";
     57 	status = "okay";
     58 };
     59 
     60 &ether {
     61 	pinctrl-0 = <&ether_pins>;
     62 	pinctrl-names = "default";
     63 
     64 	phy-handle = <&phy1>;
     65 	renesas,ether-link-active-low;
     66 	status = "okay";
     67 
     68 	phy1: ethernet-phy@1 {
     69 		reg = <1>;
     70 		micrel,led-mode = <1>;
     71 	};
     72 };
     73 
     74 &gpio0 {
     75 	/* Disable hogging GP0_18 to output LOW */
     76 	/delete-node/ qspi_en;
     77 
     78 	/* Hog GP0_18 to output HIGH to enable VIN2 */
     79 	vin2_en {
     80 		gpio-hog;
     81 		gpios = <18 GPIO_ACTIVE_HIGH>;
     82 		output-high;
     83 		line-name = "VIN2_EN";
     84 	};
     85 };
     86 
     87 &hscif0 {
     88 	pinctrl-0 = <&hscif0_pins>;
     89 	pinctrl-names = "default";
     90 	uart-has-rtscts;
     91 	status = "okay";
     92 };
     93 
     94 &i2c1 {
     95 	pinctrl-0 = <&i2c1_pins>;
     96 	pinctrl-names = "default";
     97 
     98 	/* status set to "okay" when needed by camera configuration below */
     99 	clock-frequency = <400000>;
    100 };
    101 
    102 &i2c3 {
    103 	pinctrl-0 = <&i2c3_pins>;
    104 	pinctrl-names = "default";
    105 
    106 	/* status set to "okay" when needed by camera configuration below */
    107 	clock-frequency = <400000>;
    108 };
    109 
    110 &pfc {
    111 	can0_pins: can0 {
    112 		groups = "can0_data_d";
    113 		function = "can0";
    114 	};
    115 
    116 	ether_pins: ether {
    117 		groups = "eth_mdio", "eth_rmii";
    118 		function = "eth";
    119 	};
    120 
    121 	hscif0_pins: hscif0 {
    122 		groups = "hscif0_data", "hscif0_ctrl";
    123 		function = "hscif0";
    124 	};
    125 
    126 	i2c1_pins: i2c1 {
    127 		groups = "i2c1_c";
    128 		function = "i2c1";
    129 	};
    130 
    131 	i2c3_pins: i2c3 {
    132 		groups = "i2c3";
    133 		function = "i2c3";
    134 	};
    135 
    136 	scif0_pins: scif0 {
    137 		groups = "scif0_data";
    138 		function = "scif0";
    139 	};
    140 
    141 	scif1_pins: scif1 {
    142 		groups = "scif1_data";
    143 		function = "scif1";
    144 	};
    145 
    146 	scifb1_pins: scifb1 {
    147 		groups = "scifb1_data";
    148 		function = "scifb1";
    149 	};
    150 
    151 	vin0_8bit_pins: vin0 {
    152 		groups = "vin0_data8", "vin0_clk", "vin0_sync";
    153 		function = "vin0";
    154 	};
    155 
    156 	vin1_8bit_pins: vin1 {
    157 		groups = "vin1_data8_b", "vin1_clk_b", "vin1_sync_b";
    158 		function = "vin1";
    159 	};
    160 
    161 	vin2_pins: vin2 {
    162 		groups = "vin2_g8", "vin2_clk";
    163 		function = "vin2";
    164 	};
    165 
    166 	vin3_pins: vin3 {
    167 		groups = "vin3_data8", "vin3_clk", "vin3_sync";
    168 		function = "vin3";
    169 	};
    170 };
    171 
    172 &qspi {
    173 	/* Pins shared with VIN2, keep status disabled */
    174 	status = "disabled";
    175 };
    176 
    177 &scif0 {
    178 	pinctrl-0 = <&scif0_pins>;
    179 	pinctrl-names = "default";
    180 	status = "okay";
    181 };
    182 
    183 &scif1 {
    184 	pinctrl-0 = <&scif1_pins>;
    185 	pinctrl-names = "default";
    186 	status = "okay";
    187 };
    188 
    189 &scifb1 {
    190 	pinctrl-0 = <&scifb1_pins>;
    191 	pinctrl-names = "default";
    192 	status = "okay";
    193 
    194 	rts-gpios = <&gpio4 21 GPIO_ACTIVE_LOW>;
    195 	cts-gpios = <&gpio4 17 GPIO_ACTIVE_LOW>;
    196 };
    197 
    198 /*
    199  * Below configuration ties VINx endpoints to ov5640/ov7725 camera endpoints
    200  *
    201  * (un)comment the #include statements to change configuration
    202  */
    203 
    204 /* 8bit CMOS Camera 1 (J13) */
    205 #define CAM_PARENT_I2C		i2c0
    206 #define MCLK_CAM		mclk_cam1
    207 #define CAM_EP			cam0ep
    208 #define VIN_EP			vin0ep
    209 #undef CAM_ENABLED
    210 #include "r8a7742-iwg21d-q7-dbcm-ov5640-single.dtsi"
    211 //#include "r8a7742-iwg21d-q7-dbcm-ov7725-single.dtsi"
    212 
    213 #ifdef CAM_ENABLED
    214 &vin0 {
    215 	/*
    216 	 * Set SW2 switch on the SOM to 'ON'
    217 	 * Set SW1 switch on camera board to 'OFF' as we are using 8bit mode
    218 	 */
    219 	status = "okay";
    220 	pinctrl-0 = <&vin0_8bit_pins>;
    221 	pinctrl-names = "default";
    222 
    223 	port {
    224 		vin0ep: endpoint {
    225 			remote-endpoint = <&cam0ep>;
    226 			bus-width = <8>;
    227 			bus-type = <6>;
    228 		};
    229 	};
    230 };
    231 #endif /* CAM_ENABLED */
    232 
    233 #undef CAM_PARENT_I2C
    234 #undef MCLK_CAM
    235 #undef CAM_EP
    236 #undef VIN_EP
    237 
    238 /* 8bit CMOS Camera 2 (J14) */
    239 #define CAM_PARENT_I2C		i2c1
    240 #define MCLK_CAM		mclk_cam2
    241 #define CAM_EP			cam1ep
    242 #define VIN_EP			vin1ep
    243 #undef CAM_ENABLED
    244 #include "r8a7742-iwg21d-q7-dbcm-ov5640-single.dtsi"
    245 //#include "r8a7742-iwg21d-q7-dbcm-ov7725-single.dtsi"
    246 
    247 #ifdef CAM_ENABLED
    248 &vin1 {
    249 	/* Set SW1 switch on the SOM to 'ON' */
    250 	status = "okay";
    251 	pinctrl-0 = <&vin1_8bit_pins>;
    252 	pinctrl-names = "default";
    253 
    254 	port {
    255 		vin1ep: endpoint {
    256 			remote-endpoint = <&cam1ep>;
    257 			bus-width = <8>;
    258 			bus-type = <6>;
    259 		};
    260 	};
    261 };
    262 
    263 #endif /* CAM_ENABLED */
    264 
    265 #undef CAM_PARENT_I2C
    266 #undef MCLK_CAM
    267 #undef CAM_EP
    268 #undef VIN_EP
    269 
    270 /* 8bit CMOS Camera 3 (J12) */
    271 #define CAM_PARENT_I2C		i2c2
    272 #define MCLK_CAM		mclk_cam3
    273 #define CAM_EP			cam2ep
    274 #define VIN_EP			vin2ep
    275 #undef CAM_ENABLED
    276 #include "r8a7742-iwg21d-q7-dbcm-ov5640-single.dtsi"
    277 //#include "r8a7742-iwg21d-q7-dbcm-ov7725-single.dtsi"
    278 
    279 #ifdef CAM_ENABLED
    280 &vin2 {
    281 	status = "okay";
    282 	pinctrl-0 = <&vin2_pins>;
    283 	pinctrl-names = "default";
    284 
    285 	port {
    286 		vin2ep: endpoint {
    287 			remote-endpoint = <&cam2ep>;
    288 			bus-width = <8>;
    289 			data-shift = <8>;
    290 			bus-type = <6>;
    291 		};
    292 	};
    293 };
    294 #endif /* CAM_ENABLED */
    295 
    296 #undef CAM_PARENT_I2C
    297 #undef MCLK_CAM
    298 #undef CAM_EP
    299 #undef VIN_EP
    300 
    301 /* 8bit CMOS Camera 4 (J11) */
    302 #define CAM_PARENT_I2C		i2c3
    303 #define MCLK_CAM		mclk_cam4
    304 #define CAM_EP			cam3ep
    305 #define VIN_EP			vin3ep
    306 #undef CAM_ENABLED
    307 #include "r8a7742-iwg21d-q7-dbcm-ov5640-single.dtsi"
    308 //#include "r8a7742-iwg21d-q7-dbcm-ov7725-single.dtsi"
    309 
    310 #ifdef CAM_ENABLED
    311 &vin3 {
    312 	status = "okay";
    313 	pinctrl-0 = <&vin3_pins>;
    314 	pinctrl-names = "default";
    315 
    316 	port {
    317 		vin3ep: endpoint {
    318 			remote-endpoint = <&cam3ep>;
    319 			bus-width = <8>;
    320 			bus-type = <6>;
    321 		};
    322 	};
    323 };
    324 #endif /* CAM_ENABLED */
    325 
    326 #undef CAM_PARENT_I2C
    327 #undef MCLK_CAM
    328 #undef CAM_EP
    329 #undef VIN_EP
    330