HomeSort by: relevance | last modified time | path
    Searched defs:BASE (Results 1 - 25 of 41) sorted by relevancy

1 2

  /src/sys/arch/bebox/stand/boot_com0/
Makefile 3 BASE=boot_com0
  /src/sys/arch/bebox/stand/boot_vga/
Makefile 3 BASE=boot_vga
  /src/sys/arch/prep/stand/boot_com0/
Makefile 3 BASE=boot_com0
  /src/sys/arch/prep/stand/boot_com0_vreset/
Makefile 3 BASE=boot_com0_vreset
  /src/sys/arch/ews4800mips/stand/bootxx_bfs/
Makefile 3 BASE = bootxx_bfs
  /src/sys/arch/ews4800mips/stand/bootxx_ustarfs/
Makefile 3 BASE = bootxx_ustarfs
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/gpio/dce120/
amdgpu_hw_translate_dce120.c 52 /* compile time expand base address. */
53 #define BASE(seg) \
57 BASE(mm ## reg_name ## _BASE_IDX) + mm ## reg_name
60 BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
amdgpu_hw_factory_dce120.c 61 /* compile time expand base address. */
62 #define BASE(seg) \
66 BASE(mm ## reg_name ## _BASE_IDX) + mm ## reg_name
69 BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
143 ddc->base.regs = &ddc_data_regs[en].gpio;
147 ddc->base.regs = &ddc_clk_regs[en].gpio;
166 hpd->base.regs = &hpd_regs[en].gpio;
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/gpio/dcn10/
amdgpu_hw_translate_dcn10.c 52 /* compile time expand base address. */
53 #define BASE(seg) \
57 BASE(mm ## reg_name ## _BASE_IDX) + mm ## reg_name
60 BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
amdgpu_hw_factory_dcn10.c 58 /* compile time expand base address. */
59 #define BASE(seg) \
63 BASE(mm ## reg_name ## _BASE_IDX) + mm ## reg_name
66 BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
163 generic->base.regs = &generic_regs[en].gpio;
175 ddc->base.regs = &ddc_data_regs[en].gpio;
179 ddc->base.regs = &ddc_clk_regs[en].gpio;
198 hpd->base.regs = &hpd_regs[en].gpio;
  /src/sys/arch/i386/stand/dosboot/
Makefile 5 BASE= dosboot
6 PROG= ${BASE}.com
  /src/sys/arch/x68k/stand/loadbsd/
Makefile 5 BASE= loadbsd
6 PROG= ${BASE}.x # Human68k ".x" executable
35 CLEANFILES+= ${BASE}1 ${BASE}2
37 ${PROG}: ${BASE}1 ${BASE}2
39 ${AOUT2HUX} -o ${.TARGET} ${BASE}1 11000 ${BASE}2 22000
44 ${BASE}${i}: ${OBJS} ${LIBDOS}/libdos.a ${LIBIOCS}/libiocs.a
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn20/
dcn20_vmid.h 36 #define BASE(seg) \
40 .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
dcn20_mmhubbub.h 32 container_of(mcif_wb_base, struct dcn20_mmhubbub, base)
38 #define BASE(seg) \
42 .reg_name = BASE(mm ## reg_name ## _BASE_IDX) + \
46 .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
50 .reg_name = BASE(mm ## reg_name ## _BASE_IDX) + \
54 .reg_name[id] = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
515 struct mcif_wb base; member in struct:dcn20_mmhubbub
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/gpio/dcn20/
amdgpu_hw_translate_dcn20.c 57 #define BASE(seg) BASE_INNER(seg)
61 BASE(mm ## reg_name ## _BASE_IDX) + mm ## reg_name
amdgpu_hw_factory_dcn20.c 60 #define BASE(seg) BASE_INNER(seg)
65 BASE(mm ## reg_name ## _BASE_IDX) + mm ## reg_name
71 BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
193 ddc->base.regs = &ddc_data_regs_dcn[en].gpio;
197 ddc->base.regs = &ddc_clk_regs_dcn[en].gpio;
216 hpd->base.regs = &hpd_regs[en].gpio;
226 generic->base.regs = &generic_regs[en].gpio;
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/gpio/dcn21/
amdgpu_hw_translate_dcn21.c 57 #define BASE(seg) BASE_INNER(seg)
61 BASE(mm ## reg_name ## _BASE_IDX) + mm ## reg_name
amdgpu_hw_factory_dcn21.c 58 #define BASE(seg) BASE_INNER(seg)
63 BASE(mm ## reg_name ## _BASE_IDX) + mm ## reg_name
69 BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
171 generic->base.regs = &generic_regs[en].gpio;
183 ddc->base.regs = &ddc_data_regs_dcn[en].gpio;
187 ddc->base.regs = &ddc_clk_regs_dcn[en].gpio;
206 hpd->base.regs = &hpd_regs[en].gpio;
  /src/sys/arch/i386/stand/pxeboot/
Makefile 5 BASE?= pxeboot_ia32
6 PROG= ${BASE}.bin
11 .if (${BASE} != "pxeboot_ia32")
30 .if (${BASE} == "pxeboot_ia32")
47 .if (${BASE} == "pxeboot_ia32_com0")
73 .if (${BASE} == "pxeboot_ia32")
  /src/common/dist/zlib/
adler32.c 10 #define BASE 65521U /* largest prime smaller than 65536 */
12 /* NMAX is the largest n such that 255n(n+1)/2 + (n+1)(BASE-1) <= 2^32-1 */
23 /* note that this assumes BASE is 65521, where 65536 % 65521 == 15
34 if (a >= BASE) a -= BASE; \
52 if (a >= BASE) a -= BASE; \
55 # define MOD(a) a %= BASE
56 # define MOD28(a) a %= BASE
57 # define MOD63(a) a %= BASE
    [all...]
  /src/sys/arch/rs6000/stand/boot/
Makefile 18 BASE?= boot
19 PROG= ${BASE}
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dmub/src/
dmub_reg.h 37 #define BASE(seg) BASE_INNER(seg)
39 #define REG_OFFSET(reg_name) (BASE(mm##reg_name##_BASE_IDX) + mm##reg_name)
  /src/sys/arch/bebox/stand/boot/
Makefile 19 BASE?= boot
20 PROG= ${BASE}
40 .if (${BASE} == "boot")
42 .elif (${BASE} == "boot_com0")
44 .elif (${BASE} == "boot_vga")
  /src/sys/arch/prep/stand/boot/
Makefile 17 BASE?= boot
18 PROG= ${BASE}
37 .if (${BASE} == "boot")
39 .elif (${BASE} == "boot_com0")
41 .elif (${BASE} == "boot_com0_vreset")
  /src/libexec/httpd/
Makefile 94 BASE=bozohttpd-${BOZOVER}
95 TAR=${BASE}.tar
99 mkdir ${BASE}; \
100 ( cd ${BASE} || exit; \
104 pax -wf ${TAR} ${BASE}; \

Completed in 22 milliseconds

1 2