1 /* $NetBSD: esareg.h,v 1.11 2023/05/13 11:30:27 andvar Exp $ */ 2 3 /* 4 * Copyright (c) 2002 Lennart Augustsson 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. The name of the author may not be used to endorse or promote products 13 * derived from this software without specific prior written permission. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 20 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 21 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 22 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 23 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 */ 27 28 /* 29 * ESS Allegro-1 / Maestro3 Audio Driver 30 * 31 * Lots of magic based on the FreeBSD maestro3 driver and 32 * reverse engineering. 33 * Original driver by Don Kim. 34 * 35 */ 36 37 /* Allegro PCI configuration registers */ 38 #define PCI_LEGACY_AUDIO_CTRL 0x40 39 #define DISABLE_LEGACY 0x00008000 40 41 #define ESA_PCI_ALLEGRO_CONFIG 0x50 42 #define ESA_SB_ADDR_240 0x00000004 43 #define ESA_MPU_ADDR_MASK 0x00000018 44 #define ESA_MPU_ADDR_330 0x00000000 45 #define ESA_MPU_ADDR_300 0x00000008 46 #define ESA_MPU_ADDR_320 0x00000010 47 #define ESA_MPU_ADDR_340 0x00000018 48 #define ESA_USE_PCI_TIMING 0x00000040 49 #define ESA_POSTED_WRITE_ENABLE 0x00000080 50 #define ESA_DMA_POLICY_MASK 0x00000700 51 #define ESA_DMA_DDMA 0x00000000 52 #define ESA_DMA_TDMA 0x00000100 53 #define ESA_DMA_PCPCI 0x00000200 54 #define ESA_DMA_WBDMA16 0x00000400 55 #define ESA_DMA_WBDMA4 0x00000500 56 #define ESA_DMA_WBDMA2 0x00000600 57 #define ESA_DMA_WBDMA1 0x00000700 58 #define ESA_DMA_SAFE_GUARD 0x00000800 59 #define ESA_HI_PERF_GP_ENABLE 0x00001000 60 #define ESA_PIC_SNOOP_MODE_0 0x00002000 61 #define ESA_PIC_SNOOP_MODE_1 0x00004000 62 #define ESA_SOUNDBLASTER_IRQ_MASK 0x00008000 63 #define ESA_RING_IN_ENABLE 0x00010000 64 #define ESA_SPDIF_TEST_MODE 0x00020000 65 #define ESA_CLK_MULT_MODE_SELECT_2 0x00040000 66 #define ESA_EEPROM_WRITE_ENABLE 0x00080000 67 #define ESA_CODEC_DIR_IN 0x00100000 68 #define ESA_HV_BUTTON_FROM_GD 0x00200000 69 #define ESA_REDUCED_DEBOUNCE 0x00400000 70 #define ESA_HV_CTRL_ENABLE 0x00800000 71 #define ESA_SPDIF_ENABLE 0x01000000 72 #define ESA_CLK_DIV_SELECT 0x06000000 73 #define ESA_CLK_DIV_BY_48 0x00000000 74 #define ESA_CLK_DIV_BY_49 0x02000000 75 #define ESA_CLK_DIV_BY_50 0x04000000 76 #define ESA_CLK_DIV_RESERVED 0x06000000 77 #define ESA_PM_CTRL_ENABLE 0x08000000 78 #define ESA_CLK_MULT_MODE_SELECT 0x30000000 79 #define ESA_CLK_MULT_MODE_SHIFT 28 80 #define ESA_CLK_MULT_MODE_0 0x00000000 81 #define ESA_CLK_MULT_MODE_1 0x10000000 82 #define ESA_CLK_MULT_MODE_2 0x20000000 83 #define ESA_CLK_MULT_MODE_3 0x30000000 84 #define ESA_INT_CLK_SELECT 0x40000000 85 #define ESA_INT_CLK_MULT_RESET 0x80000000 86 87 /* M3 */ 88 #define ESA_INT_CLK_SRC_NOT_PCI 0x00100000 89 #define ESA_INT_CLK_MULT_ENABLE 0x80000000 90 91 #define ESA_PCI_ACPI_CONTROL 0x54 92 #define ESA_PCI_ACPI_D0 0x00000000 93 #define ESA_PCI_ACPI_D1 0xB4F70000 94 #define ESA_PCI_ACPI_D2 0xB4F7B4F7 95 96 #define ESA_PCI_USER_CONFIG 0x58 97 #define ESA_EXT_PCI_MASTER_ENABLE 0x00000001 98 #define ESA_SPDIF_OUT_SELECT 0x00000002 99 #define ESA_TEST_PIN_DIR_CTRL 0x00000004 100 #define ESA_AC97_CODEC_TEST 0x00000020 101 #define ESA_TRI_STATE_BUFFER 0x00000080 102 #define ESA_IN_CLK_12MHZ_SELECT 0x00000100 103 #define ESA_MULTI_FUNC_DISABLE 0x00000200 104 #define ESA_EXT_MASTER_PAIR_SEL 0x00000400 105 #define ESA_PCI_MASTER_SUPPORT 0x00000800 106 #define ESA_STOP_CLOCK_ENABLE 0x00001000 107 #define ESA_EAPD_DRIVE_ENABLE 0x00002000 108 #define ESA_REQ_TRI_STATE_ENABLE 0x00004000 109 #define ESA_REQ_LOW_ENABLE 0x00008000 110 #define ESA_MIDI_1_ENABLE 0x00010000 111 #define ESA_MIDI_2_ENABLE 0x00020000 112 #define ESA_SB_AUDIO_SYNC 0x00040000 113 #define ESA_HV_CTRL_TEST 0x00100000 114 #define ESA_SOUNDBLASTER_TEST 0x00400000 115 116 #define ESA_PCI_USER_CONFIG_C 0x5C 117 118 #define ESA_PCI_DDMA_CTRL 0x60 119 #define ESA_DDMA_ENABLE 0x00000001 120 121 122 /* Allegro registers */ 123 #define ESA_HOST_INT_CTRL 0x18 124 #define ESA_SB_INT_ENABLE 0x0001 125 #define ESA_MPU401_INT_ENABLE 0x0002 126 #define ESA_ASSP_INT_ENABLE 0x0010 127 #define ESA_RING_INT_ENABLE 0x0020 128 #define ESA_HV_INT_ENABLE 0x0040 129 #define ESA_CLKRUN_GEN_ENABLE 0x0100 130 #define ESA_HV_CTRL_TO_PME 0x0400 131 #define ESA_SOFTWARE_RESET_ENABLE 0x8000 132 133 /* 134 * should be using the above defines, probably. 135 */ 136 #define ESA_REGB_ENABLE_RESET 0x01 137 #define ESA_REGB_STOP_CLOCK 0x10 138 139 #define ESA_HOST_INT_STATUS 0x1A 140 #define ESA_SB_INT_PENDING 0x01 141 #define ESA_MPU401_INT_PENDING 0x02 142 #define ESA_ASSP_INT_PENDING 0x10 143 #define ESA_RING_INT_PENDING 0x20 144 #define ESA_HV_INT_PENDING 0x40 145 146 #define ESA_HARDWARE_VOL_CTRL 0x1B 147 #define ESA_SHADOW_MIX_REG_VOICE 0x1C 148 #define ESA_HW_VOL_COUNTER_VOICE 0x1D 149 #define ESA_SHADOW_MIX_REG_MASTER 0x1E 150 #define ESA_HW_VOL_COUNTER_MASTER 0x1F 151 152 #define ESA_CODEC_COMMAND 0x30 153 #define ESA_CODEC_READ_B 0x80 154 155 #define ESA_CODEC_STATUS 0x30 156 #define ESA_CODEC_BUSY_B 0x01 157 158 #define ESA_CODEC_DATA 0x32 159 160 #define ESA_RING_BUS_CTRL_A 0x36 161 #define ESA_RAC_PME_ENABLE 0x0100 162 #define ESA_RAC_SDFS_ENABLE 0x0200 163 #define ESA_LAC_PME_ENABLE 0x0400 164 #define ESA_LAC_SDFS_ENABLE 0x0800 165 #define ESA_SERIAL_AC_LINK_ENABLE 0x1000 166 #define ESA_IO_SRAM_ENABLE 0x2000 167 #define ESA_IIS_INPUT_ENABLE 0x8000 168 169 #define ESA_RING_BUS_CTRL_B 0x38 170 #define ESA_SECOND_CODEC_ID_MASK 0x0003 171 #define ESA_SPDIF_FUNC_ENABLE 0x0010 172 #define ESA_SECOND_AC_ENABLE 0x0020 173 #define ESA_SB_MODULE_INTF_ENABLE 0x0040 174 #define ESA_SSPE_ENABLE 0x0040 175 #define ESA_M3I_DOCK_ENABLE 0x0080 176 177 #define ESA_SDO_OUT_DEST_CTRL 0x3A 178 #define ESA_COMMAND_ADDR_OUT 0x0003 179 #define ESA_PCM_LR_OUT_LOCAL 0x0000 180 #define ESA_PCM_LR_OUT_REMOTE 0x0004 181 #define ESA_PCM_LR_OUT_MUTE 0x0008 182 #define ESA_PCM_LR_OUT_BOTH 0x000C 183 #define ESA_LINE1_DAC_OUT_LOCAL 0x0000 184 #define ESA_LINE1_DAC_OUT_REMOTE 0x0010 185 #define ESA_LINE1_DAC_OUT_MUTE 0x0020 186 #define ESA_LINE1_DAC_OUT_BOTH 0x0030 187 #define ESA_PCM_CLS_OUT_LOCAL 0x0000 188 #define ESA_PCM_CLS_OUT_REMOTE 0x0040 189 #define ESA_PCM_CLS_OUT_MUTE 0x0080 190 #define ESA_PCM_CLS_OUT_BOTH 0x00C0 191 #define ESA_PCM_RLF_OUT_LOCAL 0x0000 192 #define ESA_PCM_RLF_OUT_REMOTE 0x0100 193 #define ESA_PCM_RLF_OUT_MUTE 0x0200 194 #define ESA_PCM_RLF_OUT_BOTH 0x0300 195 #define ESA_LINE2_DAC_OUT_LOCAL 0x0000 196 #define ESA_LINE2_DAC_OUT_REMOTE 0x0400 197 #define ESA_LINE2_DAC_OUT_MUTE 0x0800 198 #define ESA_LINE2_DAC_OUT_BOTH 0x0C00 199 #define ESA_HANDSET_OUT_LOCAL 0x0000 200 #define ESA_HANDSET_OUT_REMOTE 0x1000 201 #define ESA_HANDSET_OUT_MUTE 0x2000 202 #define ESA_HANDSET_OUT_BOTH 0x3000 203 #define ESA_IO_CTRL_OUT_LOCAL 0x0000 204 #define ESA_IO_CTRL_OUT_REMOTE 0x4000 205 #define ESA_IO_CTRL_OUT_MUTE 0x8000 206 #define ESA_IO_CTRL_OUT_BOTH 0xC000 207 208 #define ESA_SDO_IN_DEST_CTRL 0x3C 209 #define ESA_STATUS_ADDR_IN 0x0003 210 #define ESA_PCM_LR_IN_LOCAL 0x0000 211 #define ESA_PCM_LR_IN_REMOTE 0x0004 212 #define ESA_PCM_LR_RESERVED 0x0008 213 #define ESA_PCM_LR_IN_BOTH 0x000C 214 #define ESA_LINE1_ADC_IN_LOCAL 0x0000 215 #define ESA_LINE1_ADC_IN_REMOTE 0x0010 216 #define ESA_LINE1_ADC_IN_MUTE 0x0020 217 #define ESA_MIC_ADC_IN_LOCAL 0x0000 218 #define ESA_MIC_ADC_IN_REMOTE 0x0040 219 #define ESA_MIC_ADC_IN_MUTE 0x0080 220 #define ESA_LINE2_DAC_IN_LOCAL 0x0000 221 #define ESA_LINE2_DAC_IN_REMOTE 0x0400 222 #define ESA_LINE2_DAC_IN_MUTE 0x0800 223 #define ESA_HANDSET_IN_LOCAL 0x0000 224 #define ESA_HANDSET_IN_REMOTE 0x1000 225 #define ESA_HANDSET_IN_MUTE 0x2000 226 #define ESA_IO_STATUS_IN_LOCAL 0x0000 227 #define ESA_IO_STATUS_IN_REMOTE 0x4000 228 229 #define ESA_SPDIF_IN_CTRL 0x3E 230 #define ESA_SPDIF_IN_ENABLE 0x0001 231 232 #define ESA_GPIO_DATA 0x60 233 #define ESA_GPIO_DATA_MASK 0x0FFF 234 #define ESA_GPIO_HV_STATUS 0x3000 235 #define ESA_GPIO_PME_STATUS 0x4000 236 237 #define ESA_GPIO_MASK 0x64 238 #define ESA_GPIO_DIRECTION 0x68 239 #define ESA_GPO_PRIMARY_AC97 0x0001 240 #define ESA_GPI_LINEOUT_SENSE 0x0004 241 #define ESA_GPO_SECONDARY_AC97 0x0008 242 #define ESA_GPI_VOL_DOWN 0x0010 243 #define ESA_GPI_VOL_UP 0x0020 244 #define ESA_GPI_IIS_CLK 0x0040 245 #define ESA_GPI_IIS_LRCLK 0x0080 246 #define ESA_GPI_IIS_DATA 0x0100 247 #define ESA_GPI_DOCKING_STATUS 0x0100 248 #define ESA_GPI_HEADPHONE_SENSE 0x0200 249 #define ESA_GPO_EXT_AMP_SHUTDOWN 0x1000 250 251 /* M3 */ 252 #define ESA_GPO_M3_EXT_AMP_SHUTDN 0x0002 253 254 #define ESA_ASSP_INDEX_PORT 0x80 255 #define ESA_ASSP_MEMORY_PORT 0x82 256 #define ESA_ASSP_DATA_PORT 0x84 257 258 #define ESA_MPU401_DATA_PORT 0x98 259 #define ESA_MPU401_STATUS_PORT 0x99 260 261 #define ESA_CLK_MULT_DATA_PORT 0x9C 262 263 #define ESA_ASSP_CONTROL_A 0xA2 264 #define ESA_ASSP_0_WS_ENABLE 0x01 265 #define ESA_ASSP_CTRL_A_RESERVED1 0x02 266 #define ESA_ASSP_CTRL_A_RESERVED2 0x04 267 #define ESA_ASSP_CLK_49MHZ_SELECT 0x08 268 #define ESA_FAST_PLU_ENABLE 0x10 269 #define ESA_ASSP_CTRL_A_RESERVED3 0x20 270 #define ESA_DSP_CLK_36MHZ_SELECT 0x40 271 272 #define ESA_ASSP_CONTROL_B 0xA4 273 #define ESA_RESET_ASSP 0x00 274 #define ESA_RUN_ASSP 0x01 275 #define ESA_ENABLE_ASSP_CLOCK 0x00 276 #define ESA_STOP_ASSP_CLOCK 0x10 277 #define ESA_RESET_TOGGLE 0x40 278 279 #define ESA_ASSP_CONTROL_C 0xA6 280 #define ESA_ASSP_HOST_INT_ENABLE 0x01 281 #define ESA_FM_ADDR_REMAP_DISABLE 0x02 282 #define ESA_HOST_WRITE_PORT_ENABLE 0x08 283 284 #define ESA_ASSP_HOST_INT_STATUS 0xAC 285 #define ESA_DSP2HOST_REQ_PIORECORD 0x01 286 #define ESA_DSP2HOST_REQ_I2SRATE 0x02 287 #define ESA_DSP2HOST_REQ_TIMER 0x04 288 289 /* 290 * ASSP control regs 291 */ 292 #define ESA_DSP_PORT_TIMER_COUNT 0x06 293 294 #define ESA_DSP_PORT_MEMORY_INDEX 0x80 295 296 #define ESA_DSP_PORT_MEMORY_TYPE 0x82 297 #define ESA_MEMTYPE_INTERNAL_CODE 0x0002 298 #define ESA_MEMTYPE_INTERNAL_DATA 0x0003 299 #define ESA_MEMTYPE_MASK 0x0003 300 301 #define ESA_DSP_PORT_MEMORY_DATA 0x84 302 303 #define ESA_DSP_PORT_CONTROL_REG_A 0xA2 304 #define ESA_DSP_PORT_CONTROL_REG_B 0xA4 305 #define ESA_DSP_PORT_CONTROL_REG_C 0xA6 306 307 #define ESA_REV_A_CODE_MEMORY_BEGIN 0x0000 308 #define ESA_REV_A_CODE_MEMORY_END 0x0FFF 309 #define ESA_REV_A_CODE_MEMORY_UNIT_LENGTH 0x0040 310 #define ESA_REV_A_CODE_MEMORY_LENGTH (ESA_REV_A_CODE_MEMORY_END - ESA_REV_A_CODE_MEMORY_BEGIN + 1) 311 312 #define ESA_REV_B_CODE_MEMORY_BEGIN 0x0000 313 #define ESA_REV_B_CODE_MEMORY_END 0x0BFF 314 #define ESA_REV_B_CODE_MEMORY_UNIT_LENGTH 0x0040 315 #define ESA_REV_B_CODE_MEMORY_LENGTH (ESA_REV_B_CODE_MEMORY_END - ESA_REV_B_CODE_MEMORY_BEGIN + 1) 316 317 #define ESA_REV_A_DATA_MEMORY_BEGIN 0x1000 318 #define ESA_REV_A_DATA_MEMORY_END 0x2FFF 319 #define ESA_REV_A_DATA_MEMORY_UNIT_LENGTH 0x0080 320 #define ESA_REV_A_DATA_MEMORY_LENGTH (ESA_REV_A_DATA_MEMORY_END - ESA_REV_A_DATA_MEMORY_BEGIN + 1) 321 322 #define ESA_REV_B_DATA_MEMORY_BEGIN 0x1000 323 #define ESA_REV_B_DATA_MEMORY_END 0x2BFF 324 #define ESA_REV_B_DATA_MEMORY_UNIT_LENGTH 0x0080 325 #define ESA_REV_B_DATA_MEMORY_LENGTH (ESA_REV_B_DATA_MEMORY_END - ESA_REV_B_DATA_MEMORY_BEGIN + 1) 326 327 328 #define ESA_NUM_UNITS_KERNEL_CODE 16 329 #define ESA_NUM_UNITS_KERNEL_DATA 2 330 331 #define ESA_NUM_UNITS_KERNEL_CODE_WITH_HSP 16 332 #define ESA_NUM_UNITS_KERNEL_DATA_WITH_HSP 5 333 334 /* 335 * Kernel data layout 336 */ 337 338 #define ESA_DP_SHIFT_COUNT 7 339 340 #define ESA_KDATA_BASE_ADDR 0x1000 341 #define ESA_KDATA_BASE_ADDR2 0x1080 342 343 #define ESA_KDATA_TASK0 (ESA_KDATA_BASE_ADDR + 0x0000) 344 #define ESA_KDATA_TASK1 (ESA_KDATA_BASE_ADDR + 0x0001) 345 #define ESA_KDATA_TASK2 (ESA_KDATA_BASE_ADDR + 0x0002) 346 #define ESA_KDATA_TASK3 (ESA_KDATA_BASE_ADDR + 0x0003) 347 #define ESA_KDATA_TASK4 (ESA_KDATA_BASE_ADDR + 0x0004) 348 #define ESA_KDATA_TASK5 (ESA_KDATA_BASE_ADDR + 0x0005) 349 #define ESA_KDATA_TASK6 (ESA_KDATA_BASE_ADDR + 0x0006) 350 #define ESA_KDATA_TASK7 (ESA_KDATA_BASE_ADDR + 0x0007) 351 #define ESA_KDATA_TASK_ENDMARK (ESA_KDATA_BASE_ADDR + 0x0008) 352 353 #define ESA_KDATA_CURRENT_TASK (ESA_KDATA_BASE_ADDR + 0x0009) 354 #define ESA_KDATA_TASK_SWITCH (ESA_KDATA_BASE_ADDR + 0x000A) 355 356 #define ESA_KDATA_INSTANCE0_POS3D (ESA_KDATA_BASE_ADDR + 0x000B) 357 #define ESA_KDATA_INSTANCE1_POS3D (ESA_KDATA_BASE_ADDR + 0x000C) 358 #define ESA_KDATA_INSTANCE2_POS3D (ESA_KDATA_BASE_ADDR + 0x000D) 359 #define ESA_KDATA_INSTANCE3_POS3D (ESA_KDATA_BASE_ADDR + 0x000E) 360 #define ESA_KDATA_INSTANCE4_POS3D (ESA_KDATA_BASE_ADDR + 0x000F) 361 #define ESA_KDATA_INSTANCE5_POS3D (ESA_KDATA_BASE_ADDR + 0x0010) 362 #define ESA_KDATA_INSTANCE6_POS3D (ESA_KDATA_BASE_ADDR + 0x0011) 363 #define ESA_KDATA_INSTANCE7_POS3D (ESA_KDATA_BASE_ADDR + 0x0012) 364 #define ESA_KDATA_INSTANCE8_POS3D (ESA_KDATA_BASE_ADDR + 0x0013) 365 #define ESA_KDATA_INSTANCE_POS3D_ENDMARK (ESA_KDATA_BASE_ADDR + 0x0014) 366 367 #define ESA_KDATA_INSTANCE0_SPKVIRT (ESA_KDATA_BASE_ADDR + 0x0015) 368 #define ESA_KDATA_INSTANCE_SPKVIRT_ENDMARK (ESA_KDATA_BASE_ADDR + 0x0016) 369 370 #define ESA_KDATA_INSTANCE0_SPDIF (ESA_KDATA_BASE_ADDR + 0x0017) 371 #define ESA_KDATA_INSTANCE_SPDIF_ENDMARK (ESA_KDATA_BASE_ADDR + 0x0018) 372 373 #define ESA_KDATA_INSTANCE0_MODEM (ESA_KDATA_BASE_ADDR + 0x0019) 374 #define ESA_KDATA_INSTANCE_MODEM_ENDMARK (ESA_KDATA_BASE_ADDR + 0x001A) 375 376 #define ESA_KDATA_INSTANCE0_SRC (ESA_KDATA_BASE_ADDR + 0x001B) 377 #define ESA_KDATA_INSTANCE1_SRC (ESA_KDATA_BASE_ADDR + 0x001C) 378 #define ESA_KDATA_INSTANCE_SRC_ENDMARK (ESA_KDATA_BASE_ADDR + 0x001D) 379 380 #define ESA_KDATA_INSTANCE0_MINISRC (ESA_KDATA_BASE_ADDR + 0x001E) 381 #define ESA_KDATA_INSTANCE1_MINISRC (ESA_KDATA_BASE_ADDR + 0x001F) 382 #define ESA_KDATA_INSTANCE2_MINISRC (ESA_KDATA_BASE_ADDR + 0x0020) 383 #define ESA_KDATA_INSTANCE3_MINISRC (ESA_KDATA_BASE_ADDR + 0x0021) 384 #define ESA_KDATA_INSTANCE_MINISRC_ENDMARK (ESA_KDATA_BASE_ADDR + 0x0022) 385 386 #define ESA_KDATA_INSTANCE0_CPYTHRU (ESA_KDATA_BASE_ADDR + 0x0023) 387 #define ESA_KDATA_INSTANCE1_CPYTHRU (ESA_KDATA_BASE_ADDR + 0x0024) 388 #define ESA_KDATA_INSTANCE_CPYTHRU_ENDMARK (ESA_KDATA_BASE_ADDR + 0x0025) 389 390 #define ESA_KDATA_CURRENT_DMA (ESA_KDATA_BASE_ADDR + 0x0026) 391 #define ESA_KDATA_DMA_SWITCH (ESA_KDATA_BASE_ADDR + 0x0027) 392 #define ESA_KDATA_DMA_ACTIVE (ESA_KDATA_BASE_ADDR + 0x0028) 393 394 #define ESA_KDATA_DMA_XFER0 (ESA_KDATA_BASE_ADDR + 0x0029) 395 #define ESA_KDATA_DMA_XFER1 (ESA_KDATA_BASE_ADDR + 0x002A) 396 #define ESA_KDATA_DMA_XFER2 (ESA_KDATA_BASE_ADDR + 0x002B) 397 #define ESA_KDATA_DMA_XFER3 (ESA_KDATA_BASE_ADDR + 0x002C) 398 #define ESA_KDATA_DMA_XFER4 (ESA_KDATA_BASE_ADDR + 0x002D) 399 #define ESA_KDATA_DMA_XFER5 (ESA_KDATA_BASE_ADDR + 0x002E) 400 #define ESA_KDATA_DMA_XFER6 (ESA_KDATA_BASE_ADDR + 0x002F) 401 #define ESA_KDATA_DMA_XFER7 (ESA_KDATA_BASE_ADDR + 0x0030) 402 #define ESA_KDATA_DMA_XFER8 (ESA_KDATA_BASE_ADDR + 0x0031) 403 #define ESA_KDATA_DMA_XFER_ENDMARK (ESA_KDATA_BASE_ADDR + 0x0032) 404 405 #define ESA_KDATA_I2S_SAMPLE_COUNT (ESA_KDATA_BASE_ADDR + 0x0033) 406 #define ESA_KDATA_I2S_INT_METER (ESA_KDATA_BASE_ADDR + 0x0034) 407 #define ESA_KDATA_I2S_ACTIVE (ESA_KDATA_BASE_ADDR + 0x0035) 408 409 #define ESA_KDATA_TIMER_COUNT_RELOAD (ESA_KDATA_BASE_ADDR + 0x0036) 410 #define ESA_KDATA_TIMER_COUNT_CURRENT (ESA_KDATA_BASE_ADDR + 0x0037) 411 412 #define ESA_KDATA_HALT_SYNCH_CLIENT (ESA_KDATA_BASE_ADDR + 0x0038) 413 #define ESA_KDATA_HALT_SYNCH_DMA (ESA_KDATA_BASE_ADDR + 0x0039) 414 #define ESA_KDATA_HALT_ACKNOWLEDGE (ESA_KDATA_BASE_ADDR + 0x003A) 415 416 #define ESA_KDATA_ADC1_XFER0 (ESA_KDATA_BASE_ADDR + 0x003B) 417 #define ESA_KDATA_ADC1_XFER_ENDMARK (ESA_KDATA_BASE_ADDR + 0x003C) 418 #define ESA_KDATA_ADC1_LEFT_VOLUME (ESA_KDATA_BASE_ADDR + 0x003D) 419 #define ESA_KDATA_ADC1_RIGHT_VOLUME (ESA_KDATA_BASE_ADDR + 0x003E) 420 #define ESA_KDATA_ADC1_LEFT_SUR_VOL (ESA_KDATA_BASE_ADDR + 0x003F) 421 #define ESA_KDATA_ADC1_RIGHT_SUR_VOL (ESA_KDATA_BASE_ADDR + 0x0040) 422 423 #define ESA_KDATA_ADC2_XFER0 (ESA_KDATA_BASE_ADDR + 0x0041) 424 #define ESA_KDATA_ADC2_XFER_ENDMARK (ESA_KDATA_BASE_ADDR + 0x0042) 425 #define ESA_KDATA_ADC2_LEFT_VOLUME (ESA_KDATA_BASE_ADDR + 0x0043) 426 #define ESA_KDATA_ADC2_RIGHT_VOLUME (ESA_KDATA_BASE_ADDR + 0x0044) 427 #define ESA_KDATA_ADC2_LEFT_SUR_VOL (ESA_KDATA_BASE_ADDR + 0x0045) 428 #define ESA_KDATA_ADC2_RIGHT_SUR_VOL (ESA_KDATA_BASE_ADDR + 0x0046) 429 430 #define ESA_KDATA_CD_XFER0 (ESA_KDATA_BASE_ADDR + 0x0047) 431 #define ESA_KDATA_CD_XFER_ENDMARK (ESA_KDATA_BASE_ADDR + 0x0048) 432 #define ESA_KDATA_CD_LEFT_VOLUME (ESA_KDATA_BASE_ADDR + 0x0049) 433 #define ESA_KDATA_CD_RIGHT_VOLUME (ESA_KDATA_BASE_ADDR + 0x004A) 434 #define ESA_KDATA_CD_LEFT_SUR_VOL (ESA_KDATA_BASE_ADDR + 0x004B) 435 #define ESA_KDATA_CD_RIGHT_SUR_VOL (ESA_KDATA_BASE_ADDR + 0x004C) 436 437 #define ESA_KDATA_MIC_XFER0 (ESA_KDATA_BASE_ADDR + 0x004D) 438 #define ESA_KDATA_MIC_XFER_ENDMARK (ESA_KDATA_BASE_ADDR + 0x004E) 439 #define ESA_KDATA_MIC_VOLUME (ESA_KDATA_BASE_ADDR + 0x004F) 440 #define ESA_KDATA_MIC_SUR_VOL (ESA_KDATA_BASE_ADDR + 0x0050) 441 442 #define ESA_KDATA_I2S_XFER0 (ESA_KDATA_BASE_ADDR + 0x0051) 443 #define ESA_KDATA_I2S_XFER_ENDMARK (ESA_KDATA_BASE_ADDR + 0x0052) 444 445 #define ESA_KDATA_CHI_XFER0 (ESA_KDATA_BASE_ADDR + 0x0053) 446 #define ESA_KDATA_CHI_XFER_ENDMARK (ESA_KDATA_BASE_ADDR + 0x0054) 447 448 #define ESA_KDATA_SPDIF_XFER (ESA_KDATA_BASE_ADDR + 0x0055) 449 #define ESA_KDATA_SPDIF_CURRENT_FRAME (ESA_KDATA_BASE_ADDR + 0x0056) 450 #define ESA_KDATA_SPDIF_FRAME0 (ESA_KDATA_BASE_ADDR + 0x0057) 451 #define ESA_KDATA_SPDIF_FRAME1 (ESA_KDATA_BASE_ADDR + 0x0058) 452 #define ESA_KDATA_SPDIF_FRAME2 (ESA_KDATA_BASE_ADDR + 0x0059) 453 454 #define ESA_KDATA_SPDIF_REQUEST (ESA_KDATA_BASE_ADDR + 0x005A) 455 #define ESA_KDATA_SPDIF_TEMP (ESA_KDATA_BASE_ADDR + 0x005B) 456 457 #define ESA_KDATA_SPDIFIN_XFER0 (ESA_KDATA_BASE_ADDR + 0x005C) 458 #define ESA_KDATA_SPDIFIN_XFER_ENDMARK (ESA_KDATA_BASE_ADDR + 0x005D) 459 #define ESA_KDATA_SPDIFIN_INT_METER (ESA_KDATA_BASE_ADDR + 0x005E) 460 461 #define ESA_KDATA_DSP_RESET_COUNT (ESA_KDATA_BASE_ADDR + 0x005F) 462 #define ESA_KDATA_DEBUG_OUTPUT (ESA_KDATA_BASE_ADDR + 0x0060) 463 464 #define ESA_KDATA_KERNEL_ISR_LIST (ESA_KDATA_BASE_ADDR + 0x0061) 465 466 #define ESA_KDATA_KERNEL_ISR_CBSR1 (ESA_KDATA_BASE_ADDR + 0x0062) 467 #define ESA_KDATA_KERNEL_ISR_CBER1 (ESA_KDATA_BASE_ADDR + 0x0063) 468 #define ESA_KDATA_KERNEL_ISR_CBCR (ESA_KDATA_BASE_ADDR + 0x0064) 469 #define ESA_KDATA_KERNEL_ISR_AR0 (ESA_KDATA_BASE_ADDR + 0x0065) 470 #define ESA_KDATA_KERNEL_ISR_AR1 (ESA_KDATA_BASE_ADDR + 0x0066) 471 #define ESA_KDATA_KERNEL_ISR_AR2 (ESA_KDATA_BASE_ADDR + 0x0067) 472 #define ESA_KDATA_KERNEL_ISR_AR3 (ESA_KDATA_BASE_ADDR + 0x0068) 473 #define ESA_KDATA_KERNEL_ISR_AR4 (ESA_KDATA_BASE_ADDR + 0x0069) 474 #define ESA_KDATA_KERNEL_ISR_AR5 (ESA_KDATA_BASE_ADDR + 0x006A) 475 #define ESA_KDATA_KERNEL_ISR_BRCR (ESA_KDATA_BASE_ADDR + 0x006B) 476 #define ESA_KDATA_KERNEL_ISR_PASR (ESA_KDATA_BASE_ADDR + 0x006C) 477 #define ESA_KDATA_KERNEL_ISR_PAER (ESA_KDATA_BASE_ADDR + 0x006D) 478 479 #define ESA_KDATA_CLIENT_SCRATCH0 (ESA_KDATA_BASE_ADDR + 0x006E) 480 #define ESA_KDATA_CLIENT_SCRATCH1 (ESA_KDATA_BASE_ADDR + 0x006F) 481 #define ESA_KDATA_KERNEL_SCRATCH (ESA_KDATA_BASE_ADDR + 0x0070) 482 #define ESA_KDATA_KERNEL_ISR_SCRATCH (ESA_KDATA_BASE_ADDR + 0x0071) 483 484 #define ESA_KDATA_QUEUE_LEFT (ESA_KDATA_BASE_ADDR + 0x0072) 485 #define ESA_KDATA_QUEUE_RIGHT (ESA_KDATA_BASE_ADDR + 0x0073) 486 487 #define ESA_KDATA_ADC1_REQUEST (ESA_KDATA_BASE_ADDR + 0x0074) 488 #define ESA_KDATA_ADC2_REQUEST (ESA_KDATA_BASE_ADDR + 0x0075) 489 #define ESA_KDATA_CD_REQUEST (ESA_KDATA_BASE_ADDR + 0x0076) 490 #define ESA_KDATA_MIC_REQUEST (ESA_KDATA_BASE_ADDR + 0x0077) 491 492 #define ESA_KDATA_ADC1_MIXER_REQUEST (ESA_KDATA_BASE_ADDR + 0x0078) 493 #define ESA_KDATA_ADC2_MIXER_REQUEST (ESA_KDATA_BASE_ADDR + 0x0079) 494 #define ESA_KDATA_CD_MIXER_REQUEST (ESA_KDATA_BASE_ADDR + 0x007A) 495 #define ESA_KDATA_MIC_MIXER_REQUEST (ESA_KDATA_BASE_ADDR + 0x007B) 496 #define ESA_KDATA_MIC_SYNC_COUNTER (ESA_KDATA_BASE_ADDR + 0x007C) 497 498 /* 499 * second 'segment' (?) reserved for mixer 500 * buffers.. 501 */ 502 503 #define ESA_KDATA_MIXER_WORD0 (ESA_KDATA_BASE_ADDR2 + 0x0000) 504 #define ESA_KDATA_MIXER_WORD1 (ESA_KDATA_BASE_ADDR2 + 0x0001) 505 #define ESA_KDATA_MIXER_WORD2 (ESA_KDATA_BASE_ADDR2 + 0x0002) 506 #define ESA_KDATA_MIXER_WORD3 (ESA_KDATA_BASE_ADDR2 + 0x0003) 507 #define ESA_KDATA_MIXER_WORD4 (ESA_KDATA_BASE_ADDR2 + 0x0004) 508 #define ESA_KDATA_MIXER_WORD5 (ESA_KDATA_BASE_ADDR2 + 0x0005) 509 #define ESA_KDATA_MIXER_WORD6 (ESA_KDATA_BASE_ADDR2 + 0x0006) 510 #define ESA_KDATA_MIXER_WORD7 (ESA_KDATA_BASE_ADDR2 + 0x0007) 511 #define ESA_KDATA_MIXER_WORD8 (ESA_KDATA_BASE_ADDR2 + 0x0008) 512 #define ESA_KDATA_MIXER_WORD9 (ESA_KDATA_BASE_ADDR2 + 0x0009) 513 #define ESA_KDATA_MIXER_WORDA (ESA_KDATA_BASE_ADDR2 + 0x000A) 514 #define ESA_KDATA_MIXER_WORDB (ESA_KDATA_BASE_ADDR2 + 0x000B) 515 #define ESA_KDATA_MIXER_WORDC (ESA_KDATA_BASE_ADDR2 + 0x000C) 516 #define ESA_KDATA_MIXER_WORDD (ESA_KDATA_BASE_ADDR2 + 0x000D) 517 #define ESA_KDATA_MIXER_WORDE (ESA_KDATA_BASE_ADDR2 + 0x000E) 518 #define ESA_KDATA_MIXER_WORDF (ESA_KDATA_BASE_ADDR2 + 0x000F) 519 520 #define ESA_KDATA_MIXER_XFER0 (ESA_KDATA_BASE_ADDR2 + 0x0010) 521 #define ESA_KDATA_MIXER_XFER1 (ESA_KDATA_BASE_ADDR2 + 0x0011) 522 #define ESA_KDATA_MIXER_XFER2 (ESA_KDATA_BASE_ADDR2 + 0x0012) 523 #define ESA_KDATA_MIXER_XFER3 (ESA_KDATA_BASE_ADDR2 + 0x0013) 524 #define ESA_KDATA_MIXER_XFER4 (ESA_KDATA_BASE_ADDR2 + 0x0014) 525 #define ESA_KDATA_MIXER_XFER5 (ESA_KDATA_BASE_ADDR2 + 0x0015) 526 #define ESA_KDATA_MIXER_XFER6 (ESA_KDATA_BASE_ADDR2 + 0x0016) 527 #define ESA_KDATA_MIXER_XFER7 (ESA_KDATA_BASE_ADDR2 + 0x0017) 528 #define ESA_KDATA_MIXER_XFER8 (ESA_KDATA_BASE_ADDR2 + 0x0018) 529 #define ESA_KDATA_MIXER_XFER9 (ESA_KDATA_BASE_ADDR2 + 0x0019) 530 #define ESA_KDATA_MIXER_XFER_ENDMARK (ESA_KDATA_BASE_ADDR2 + 0x001A) 531 532 #define ESA_KDATA_MIXER_TASK_NUMBER (ESA_KDATA_BASE_ADDR2 + 0x001B) 533 #define ESA_KDATA_CURRENT_MIXER (ESA_KDATA_BASE_ADDR2 + 0x001C) 534 #define ESA_KDATA_MIXER_ACTIVE (ESA_KDATA_BASE_ADDR2 + 0x001D) 535 #define ESA_KDATA_MIXER_BANK_STATUS (ESA_KDATA_BASE_ADDR2 + 0x001E) 536 #define ESA_KDATA_DAC_LEFT_VOLUME (ESA_KDATA_BASE_ADDR2 + 0x001F) 537 #define ESA_KDATA_DAC_RIGHT_VOLUME (ESA_KDATA_BASE_ADDR2 + 0x0020) 538 539 #define ESA_MAX_INSTANCE_MINISRC (ESA_KDATA_INSTANCE_MINISRC_ENDMARK - ESA_KDATA_INSTANCE0_MINISRC) 540 #define ESA_MAX_VIRTUAL_DMA_CHANNELS (ESA_KDATA_DMA_XFER_ENDMARK - ESA_KDATA_DMA_XFER0) 541 #define ESA_MAX_VIRTUAL_MIXER_CHANNELS (ESA_KDATA_MIXER_XFER_ENDMARK - ESA_KDATA_MIXER_XFER0) 542 #define ESA_MAX_VIRTUAL_ADC1_CHANNELS (ESA_KDATA_ADC1_XFER_ENDMARK - ESA_KDATA_ADC1_XFER0) 543 544 /* 545 * client data area offsets 546 */ 547 #define ESA_CDATA_INSTANCE_READY 0x00 548 549 #define ESA_CDATA_HOST_SRC_ADDRL 0x01 550 #define ESA_CDATA_HOST_SRC_ADDRH 0x02 551 #define ESA_CDATA_HOST_SRC_END_PLUS_1L 0x03 552 #define ESA_CDATA_HOST_SRC_END_PLUS_1H 0x04 553 #define ESA_CDATA_HOST_SRC_CURRENTL 0x05 554 #define ESA_CDATA_HOST_SRC_CURRENTH 0x06 555 556 #define ESA_CDATA_IN_BUF_CONNECT 0x07 557 #define ESA_CDATA_OUT_BUF_CONNECT 0x08 558 559 #define ESA_CDATA_IN_BUF_BEGIN 0x09 560 #define ESA_CDATA_IN_BUF_END_PLUS_1 0x0A 561 #define ESA_CDATA_IN_BUF_HEAD 0x0B 562 #define ESA_CDATA_IN_BUF_TAIL 0x0C 563 #define ESA_CDATA_OUT_BUF_BEGIN 0x0D 564 #define ESA_CDATA_OUT_BUF_END_PLUS_1 0x0E 565 #define ESA_CDATA_OUT_BUF_HEAD 0x0F 566 #define ESA_CDATA_OUT_BUF_TAIL 0x10 567 568 #define ESA_CDATA_DMA_CONTROL 0x11 569 #define ESA_CDATA_RESERVED 0x12 570 571 #define ESA_CDATA_FREQUENCY 0x13 572 #define ESA_CDATA_LEFT_VOLUME 0x14 573 #define ESA_CDATA_RIGHT_VOLUME 0x15 574 #define ESA_CDATA_LEFT_SUR_VOL 0x16 575 #define ESA_CDATA_RIGHT_SUR_VOL 0x17 576 577 #define ESA_CDATA_HEADER_LEN 0x18 578 579 #define ESA_SRC3_DIRECTION_OFFSET ESA_CDATA_HEADER_LEN 580 #define ESA_SRC3_MODE_OFFSET (ESA_CDATA_HEADER_LEN + 1) 581 #define ESA_SRC3_WORD_LENGTH_OFFSET (ESA_CDATA_HEADER_LEN + 2) 582 #define ESA_SRC3_PARAMETER_OFFSET (ESA_CDATA_HEADER_LEN + 3) 583 #define ESA_SRC3_COEFF_ADDR_OFFSET (ESA_CDATA_HEADER_LEN + 8) 584 #define ESA_SRC3_FILTAP_ADDR_OFFSET (ESA_CDATA_HEADER_LEN + 10) 585 #define ESA_SRC3_TEMP_INBUF_ADDR_OFFSET (ESA_CDATA_HEADER_LEN + 16) 586 #define ESA_SRC3_TEMP_OUTBUF_ADDR_OFFSET (ESA_CDATA_HEADER_LEN + 17) 587 588 #define ESA_MINISRC_IN_BUFFER_SIZE (0x50 * 2) 589 #define ESA_MINISRC_OUT_BUFFER_SIZE (0x50 * 2 * 2) 590 #define ESA_MINISRC_OUT_BUFFER_SIZE (0x50 * 2 * 2) 591 #define ESA_MINISRC_TMP_BUFFER_SIZE (112 + (ESA_MINISRC_BIQUAD_STAGE * 3 + 4) * 2 * 2) 592 #define ESA_MINISRC_BIQUAD_STAGE 2 593 #define ESA_MINISRC_COEF_LOC 0x175 594 595 #define ESA_DMACONTROL_BLOCK_MASK 0x000F 596 #define ESA_DMAC_BLOCK0_SELECTOR 0x0000 597 #define ESA_DMAC_BLOCK1_SELECTOR 0x0001 598 #define ESA_DMAC_BLOCK2_SELECTOR 0x0002 599 #define ESA_DMAC_BLOCK3_SELECTOR 0x0003 600 #define ESA_DMAC_BLOCK4_SELECTOR 0x0004 601 #define ESA_DMAC_BLOCK5_SELECTOR 0x0005 602 #define ESA_DMAC_BLOCK6_SELECTOR 0x0006 603 #define ESA_DMAC_BLOCK7_SELECTOR 0x0007 604 #define ESA_DMAC_BLOCK8_SELECTOR 0x0008 605 #define ESA_DMAC_BLOCK9_SELECTOR 0x0009 606 #define ESA_DMAC_BLOCKA_SELECTOR 0x000A 607 #define ESA_DMAC_BLOCKB_SELECTOR 0x000B 608 #define ESA_DMAC_BLOCKC_SELECTOR 0x000C 609 #define ESA_DMAC_BLOCKD_SELECTOR 0x000D 610 #define ESA_DMAC_BLOCKE_SELECTOR 0x000E 611 #define ESA_DMAC_BLOCKF_SELECTOR 0x000F 612 #define ESA_DMACONTROL_PAGE_MASK 0x00F0 613 #define ESA_DMAC_PAGE0_SELECTOR 0x0030 614 #define ESA_DMAC_PAGE1_SELECTOR 0x0020 615 #define ESA_DMAC_PAGE2_SELECTOR 0x0010 616 #define ESA_DMAC_PAGE3_SELECTOR 0x0000 617 #define ESA_DMACONTROL_AUTOREPEAT 0x1000 618 #define ESA_DMACONTROL_STOPPED 0x2000 619 #define ESA_DMACONTROL_DIRECTION 0x0100 620
Indexes created Sat Sep 20 22:09:52 GMT 2025