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      1 /*
      2  * Copyright  2019 Intel Corporation
      3  *
      4  * Permission is hereby granted, free of charge, to any person obtaining a
      5  * copy of this software and associated documentation files (the "Software"),
      6  * to deal in the Software without restriction, including without limitation
      7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
      8  * and/or sell copies of the Software, and to permit persons to whom the
      9  * Software is furnished to do so, subject to the following conditions:
     10  *
     11  * The above copyright notice and this permission notice (including the next
     12  * paragraph) shall be included in all copies or substantial portions of the
     13  * Software.
     14  *
     15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
     16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
     17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
     18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
     19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
     20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
     21  * IN THE SOFTWARE.
     22  */
     23 
     24 #ifndef INTEL_PERF_REGS_H
     25 #define INTEL_PERF_REGS_H
     26 
     27 #define INTEL_MASK(high, low) (((1u<<((high)-(low)+1))-1)<<(low))
     28 
     29 /* GT core frequency counters */
     30 #define GFX7_RPSTAT1                       0xA01C
     31 #define  GFX7_RPSTAT1_CURR_GT_FREQ_SHIFT   7
     32 #define  GFX7_RPSTAT1_CURR_GT_FREQ_MASK    INTEL_MASK(13, 7)
     33 #define  GFX7_RPSTAT1_PREV_GT_FREQ_SHIFT   0
     34 #define  GFX7_RPSTAT1_PREV_GT_FREQ_MASK    INTEL_MASK(6, 0)
     35 
     36 #define GFX9_RPSTAT0                       0xA01C
     37 #define  GFX9_RPSTAT0_CURR_GT_FREQ_SHIFT   23
     38 #define  GFX9_RPSTAT0_CURR_GT_FREQ_MASK    INTEL_MASK(31, 23)
     39 #define  GFX9_RPSTAT0_PREV_GT_FREQ_SHIFT   0
     40 #define  GFX9_RPSTAT0_PREV_GT_FREQ_MASK    INTEL_MASK(8, 0)
     41 
     42 /* Programmable perf 64bits counters (used for GTRequestQueueFull counter on
     43  * gfx7-11)
     44  */
     45 #define PERF_CNT_1_DW0                     0x91b8
     46 #define PERF_CNT_2_DW0                     0x91c0
     47 #define PERF_CNT_VALUE_MASK                ((1ull << 44) - 1)
     48 
     49 /* Global OA perf counters */
     50 #define GFX7_N_OA_PERF_A32                 44
     51 #define GFX7_OA_PERF_A32(idx)              (0x2800 + (idx) * 4)
     52 
     53 #define GFX8_OA_PERF_TICKS                 0x2910
     54 #define GFX8_N_OA_PERF_A64                 32
     55 #define GFX8_N_OA_PERF_A32                 4
     56 #define GFX8_N_OA_PERF_B32                 8
     57 #define GFX8_N_OA_PERF_C32                 8
     58 #define GFX8_OA_PERF_A64_LDW(idx)          (0x2800 + (idx) * 8)
     59 #define GFX8_OA_PERF_A64_UDW(idx)          (0x2800 + (idx) * 8 + 4)
     60 #define GFX8_OA_PERF_A32(idx)              (0x2900 + (idx) * 4)
     61 #define GFX8_OA_PERF_B32(idx)              (0x2920 + (idx) * 4)
     62 #define GFX8_OA_PERF_C32(idx)              (0x2940 + (idx) * 4)
     63 
     64 #define GFX12_OAG_PERF_TICKS               0xda90
     65 #define GFX12_N_OAG_PERF_A64               32
     66 #define GFX12_N_OAG_PERF_A32               4
     67 #define GFX12_N_OAG_PERF_B32               8
     68 #define GFX12_N_OAG_PERF_C32               8
     69 #define GFX12_OAG_PERF_A64_LDW(idx)        (0xd980 + (idx) * 8)
     70 #define GFX12_OAG_PERF_A64_UDW(idx)        (0xd980 + (idx) * 8 + 4)
     71 #define GFX12_OAG_PERF_A32(idx)            (0xda80 + (idx) * 4)
     72 #define GFX12_OAG_PERF_B32(idx)            (0xda94 + (idx) * 4)
     73 #define GFX12_OAG_PERF_C32(idx)            (0xdab4 + (idx) * 4)
     74 
     75 /* Pipeline statistic counters */
     76 #define IA_VERTICES_COUNT          0x2310
     77 #define IA_PRIMITIVES_COUNT        0x2318
     78 #define VS_INVOCATION_COUNT        0x2320
     79 #define HS_INVOCATION_COUNT        0x2300
     80 #define DS_INVOCATION_COUNT        0x2308
     81 #define GS_INVOCATION_COUNT        0x2328
     82 #define GS_PRIMITIVES_COUNT        0x2330
     83 #define CL_INVOCATION_COUNT        0x2338
     84 #define CL_PRIMITIVES_COUNT        0x2340
     85 #define PS_INVOCATION_COUNT        0x2348
     86 #define CS_INVOCATION_COUNT        0x2290
     87 #define PS_DEPTH_COUNT             0x2350
     88 
     89 /* Stream-out counters */
     90 #define GFX6_SO_PRIM_STORAGE_NEEDED     0x2280
     91 #define GFX7_SO_PRIM_STORAGE_NEEDED(n)  (0x5240 + (n) * 8)
     92 #define GFX6_SO_NUM_PRIMS_WRITTEN       0x2288
     93 #define GFX7_SO_NUM_PRIMS_WRITTEN(n)    (0x5200 + (n) * 8)
     94 
     95 #endif /* INTEL_PERF_REGS_H */
     96