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    Searched defs:ISA (Results 1 - 8 of 8) sorted by relevancy

  /src/external/apache2/llvm/dist/llvm/lib/Support/
Triple.cpp 339 ARM::ISAKind ISA = ARM::parseArchISA(ArchName);
345 switch (ISA) {
361 switch (ISA) {
386 if (ISA == ARM::ISAKind::THUMB &&
  /src/external/apache2/llvm/dist/llvm/lib/Target/Mips/
MipsSubtarget.cpp 143 StringRef ISA = hasMips64r6() ? "MIPS64r6" : "MIPS32r6";
149 report_fatal_error(ISA + " is not compatible with the DSP ASE", false);
  /src/external/apache2/llvm/dist/clang/lib/CodeGen/
CGDeclCXX.cpp 439 InitSegAttr *ISA) {
443 PtrArray->setSection(ISA->getSection());
486 auto *ISA = D->getAttr<InitSegAttr>();
499 } else if (PerformInit && ISA) {
500 EmitPointerToInitFunc(D, Addr, Fn, ISA);
CGOpenMPRuntime.cpp 829 bool AsArraySection = isa<OMPArraySectionExpr>(ClausesData[N].Ref);
1488 !isa<llvm::Instruction>(LVal.getPointer(CGF)) ||
3860 if (Init && (!ForDup || (isa<CXXConstructExpr>(Init) &&
3871 assert(isa<ImplicitParamDecl>(OriginalVD) &&
3872 isa<CapturedDecl>(OriginalVD->getDeclContext()) &&
3875 isa<TranslationUnitDecl>(
3901 if (!isa<CXXConstructExpr>(Init) || CGF.isTrivialInitializer(Init)) {
3952 InitRequired = InitRequired || (Init && isa<CXXConstructExpr>(Init) &&
6559 if (isa<AsmStmt>(S) || isa<NullStmt>(S) || isa<OMPFlushDirective>(S) |
    [all...]
  /src/external/apache2/llvm/dist/llvm/include/llvm/Analysis/
VectorUtils.h 51 LLVM, // LLVM internal ISA for functions that are not
53 Unknown // Unknown ISA
129 VFISAKind ISA; /// Instruction Set Architecture.
133 /// LLVM Internal VFABI ISA token for vector functions.
150 /// extension (or <isa> from now on). The <VFABI_name> is in the following
153 /// _ZGV<isa><mask><vlen><parameters>_<scalarname>[(<redirection>)]
155 /// This methods support demangling rules for the following <isa>:
163 /// _ZGV<isa><mask><vlen><parameters>_<scalarname>[(<redirection>)].
176 /// _ZGV<isa><mask><vlen><vparams>_<scalarname>(<vectorname>)
180 /// <isa> = "_LLVM_
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/MCTargetDesc/
AMDGPUInstPrinter.cpp 1392 AMDGPU::IsaVersion ISA = AMDGPU::getIsaVersion(STI.getCPU());
1396 decodeWaitcnt(ISA, SImm16, Vmcnt, Expcnt, Lgkmcnt);
1400 if (Vmcnt != getVmcntBitMask(ISA)) {
1405 if (Expcnt != getExpcntBitMask(ISA)) {
1412 if (Lgkmcnt != getLgkmcntBitMask(ISA)) {
  /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/AsmParser/
AMDGPUAsmParser.cpp 208 return isExpr() && Expr && isa<MCSymbolRefExpr>(Expr);
1293 AMDGPU::IsaVersion ISA = AMDGPU::getIsaVersion(getSTI().getCPU());
1295 if (ISA.Major >= 6 && isHsaAbiVersion3Or4(&getSTI())) {
1298 Sym->setVariableValue(MCConstantExpr::create(ISA.Major, Ctx));
1300 Sym->setVariableValue(MCConstantExpr::create(ISA.Minor, Ctx));
1302 Sym->setVariableValue(MCConstantExpr::create(ISA.Stepping, Ctx));
1306 Sym->setVariableValue(MCConstantExpr::create(ISA.Major, Ctx));
1308 Sym->setVariableValue(MCConstantExpr::create(ISA.Minor, Ctx));
1310 Sym->setVariableValue(MCConstantExpr::create(ISA.Stepping, Ctx));
1312 if (ISA.Major >= 6 && isHsaAbiVersion3Or4(&getSTI()))
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Target/Mips/AsmParser/
MipsAsmParser.cpp 573 /// True if all of $fcc0 - $fcc7 exist for the current ISA.
1334 return isMem() && isa<MCConstantExpr>(getMemOff());
1344 if (isa<MCTargetExpr>(getMemOff()) ||
1359 if (isa<MCTargetExpr>(getMemOff()) ||
1805 if (isa<MCSymbolRefExpr>(Expr))
1997 std::string ISA = hasMips64r6() ? "MIPS64r6" : "MIPS32r6";
1998 Warning(IDLoc, "ssnop is deprecated for " + ISA + " and is equivalent to a "
5972 "non-zero fcc register doesn't exist in current ISA level");

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