1 /* $NetBSD: bonitoreg.h,v 1.8 2013/04/16 09:02:32 macallan Exp $ */ 2 3 /* 4 * Bonito Register Map 5 * Copyright (c) 1999 Algorithmics Ltd 6 * 7 * Algorithmics gives permission for anyone to use and modify this file 8 * without any obligation or license condition except that you retain 9 * this copyright message in any source redistribution in whole or part. 10 * 11 * Updated copies of this and other files can be found at 12 * ftp://ftp.algor.co.uk/pub/bonito/ 13 * 14 * Users of the Bonito controller are warmly recommended to contribute 15 * any useful changes back to Algorithmics (mail to 16 * bonito (at) algor.co.uk). 17 */ 18 19 /* Revision 1.48 autogenerated on 08/17/99 15:20:01 */ 20 21 #ifndef _BONITO_H_ 22 23 #define BONITO(x) (BONITO_REG_BASE + (x)) 24 25 26 #ifdef _LP64 27 #define REGVAL(x) *((volatile u_int32_t *)MIPS_PHYS_TO_XKPHYS_UNCACHED(x)) 28 #define REGVAL8(x) *((volatile u_int8_t *)MIPS_PHYS_TO_XKPHYS_UNCACHED(x)) 29 #else 30 #define REGVAL(x) *((volatile u_int32_t *) MIPS_PHYS_TO_KSEG1(x)) 31 #define REGVAL8(x) *((volatile u_int8_t *)MIPS_PHYS_TO_KSEG1(x)) 32 #endif 33 34 #define BONITO_BOOT_BASE 0x1fc00000 35 #define BONITO_BOOT_SIZE 0x00100000 36 #define BONITO_BOOT_TOP (BONITO_BOOT_BASE+BONITO_BOOT_SIZE-1) 37 #define BONITO_FLASH_BASE 0x1c000000 38 #define BONITO_FLASH_SIZE 0x03000000 39 #define BONITO_FLASH_TOP (BONITO_FLASH_BASE+BONITO_FLASH_SIZE-1) 40 #define BONITO_SOCKET_BASE 0x1f800000 41 #define BONITO_SOCKET_SIZE 0x00400000 42 #define BONITO_SOCKET_TOP (BONITO_SOCKET_BASE+BONITO_SOCKET_SIZE-1) 43 #define BONITO_REG_BASE 0x1fe00000 44 #define BONITO_REG_SIZE 0x00040000 45 #define BONITO_REG_TOP (BONITO_REG_BASE+BONITO_REG_SIZE-1) 46 #define BONITO_DEV_BASE 0x1ff00000 47 #define BONITO_DEV_SIZE 0x00100000 48 #define BONITO_DEV_TOP (BONITO_DEV_BASE+BONITO_DEV_SIZE-1) 49 #define BONITO_PCILO_BASE 0x10000000 50 #define BONITO_PCILO_SIZE 0x0c000000 51 #define BONITO_PCILO_TOP (BONITO_PCILO_BASE+BONITO_PCILO_SIZE-1) 52 #define BONITO_PCILO0_BASE 0x10000000 53 #define BONITO_PCILO1_BASE 0x14000000 54 #define BONITO_PCILO2_BASE 0x18000000 55 #define BONITO_PCIHI_BASE 0x20000000 56 #define BONITO_PCIHI_SIZE 0x20000000 57 #define BONITO_PCIHI_TOP (BONITO_PCIHI_BASE+BONITO_PCIHI_SIZE-1) 58 #define LS2F_PCIHI_BASE 0x40000000UL 59 #define LS2F_PCIHI_SIZE 0x40000000UL 60 #define LS2F_PCIHI_TOP (LS2F_PCIHI_BASE+LS2F_PCIHI_SIZE-1) 61 #define BONITO_PCIIO_BASE 0x1fd00000 62 #define BONITO_PCIIO_LEGACY 0x00004000UL 63 #define BONITO_PCIIO_SIZE 0x00100000 64 #define BONITO_PCIIO_TOP (BONITO_PCIIO_BASE+BONITO_PCIIO_SIZE-1) 65 #define BONITO_PCICFG_BASE 0x1fe80000 66 #define BONITO_PCICFG_SIZE 0x00080000 67 #define BONITO_PCICFG_TOP (BONITO_PCICFG_BASE+BONITO_PCICFG_SIZE-1) 68 69 70 /* Bonito Register Bases */ 71 72 #define BONITO_PCICONFIGBASE 0x00 73 #define BONITO_REGBASE 0x100 74 75 76 /* PCI Configuration Registers */ 77 78 #define BONITO_PCI_REG(x) BONITO(BONITO_PCICONFIGBASE + (x)) 79 #define BONITO_PCIDID BONITO_PCI_REG(0x00) 80 #define BONITO_PCICMD BONITO_PCI_REG(0x04) 81 #define BONITO_PCICLASS BONITO_PCI_REG(0x08) 82 #define BONITO_PCILTIMER BONITO_PCI_REG(0x0c) 83 #define BONITO_PCIBASE0 BONITO_PCI_REG(0x10) 84 #define BONITO_PCIBASE1 BONITO_PCI_REG(0x14) 85 #define BONITO_PCIBASE2 BONITO_PCI_REG(0x18) 86 #define BONITO_PCIEXPRBASE BONITO_PCI_REG(0x30) 87 #define BONITO_PCIINT BONITO_PCI_REG(0x3c) 88 89 #define BONITO_PCICMD_PERR_CLR 0x80000000 90 #define BONITO_PCICMD_SERR_CLR 0x40000000 91 #define BONITO_PCICMD_MABORT_CLR 0x20000000 92 #define BONITO_PCICMD_MTABORT_CLR 0x10000000 93 #define BONITO_PCICMD_TABORT_CLR 0x08000000 94 #define BONITO_PCICMD_MPERR_CLR 0x01000000 95 #define BONITO_PCICMD_PERRRESPEN 0x00000040 96 #define BONITO_PCICMD_ASTEPEN 0x00000080 97 #define BONITO_PCICMD_SERREN 0x00000100 98 #define BONITO_PCILTIMER_BUSLATENCY 0x0000ff00 99 #define BONITO_PCILTIMER_BUSLATENCY_SHIFT 8 100 101 102 #define BONITO_REV_FPGA(x) ((x) & 0x80) 103 #define BONITO_REV_MAJOR(x) (((x) >> 4) & 0x7) 104 #define BONITO_REV_MINOR(x) ((x) & 0xf) 105 106 107 /* 1. Bonito h/w Configuration */ 108 /* Power on register */ 109 110 #define BONITO_BONPONCFG BONITO(BONITO_REGBASE + 0x00) 111 112 #define BONITO_BONPONCFG_SYSCONTROLLERRD 0x00040000 113 #define BONITO_BONPONCFG_ROMCS1SAMP 0x00020000 114 #define BONITO_BONPONCFG_ROMCS0SAMP 0x00010000 115 #define BONITO_BONPONCFG_CPUBIGEND 0x00004000 116 #define BONITO_BONPONCFG_CPUPARITY 0x00002000 117 #define BONITO_BONPONCFG_BURSTORDER 0x00001000 118 #define BONITO_BONPONCFG_CPUTYPE 0x00000007 119 #define BONITO_BONPONCFG_CPUTYPE_SHIFT 0 120 #define BONITO_BONPONCFG_PCIRESET_OUT 0x00000008 121 #define BONITO_BONPONCFG_IS_ARBITER 0x00000010 122 #define BONITO_BONPONCFG_ROMBOOT 0x000000c0 123 #define BONITO_BONPONCFG_ROMBOOT_SHIFT 6 124 125 #define BONITO_BONPONCFG_ROMBOOT_FLASH (0x0<<BONITO_BONPONCFG_ROMBOOT_SHIFT) 126 #define BONITO_BONPONCFG_ROMBOOT_SOCKET (0x1<<BONITO_BONPONCFG_ROMBOOT_SHIFT) 127 #define BONITO_BONPONCFG_ROMBOOT_SDRAM (0x2<<BONITO_BONPONCFG_ROMBOOT_SHIFT) 128 #define BONITO_BONPONCFG_ROMBOOT_CPURESET (0x3<<BONITO_BONPONCFG_ROMBOOT_SHIFT) 129 130 #define BONITO_BONPONCFG_ROMCS0WIDTH 0x00000100 131 #define BONITO_BONPONCFG_ROMCS1WIDTH 0x00000200 132 #define BONITO_BONPONCFG_ROMCS0FAST 0x00000400 133 #define BONITO_BONPONCFG_ROMCS1FAST 0x00000800 134 #define BONITO_BONPONCFG_CONFIG_DIS 0x00000020 135 136 137 /* Other Bonito configuration */ 138 139 #define BONITO_BONGENCFG_OFFSET 0x4 140 #define BONITO_BONGENCFG BONITO(BONITO_REGBASE + BONITO_BONGENCFG_OFFSET) 141 142 #define BONITO_BONGENCFG_DEBUGMODE 0x00000001 143 #define BONITO_BONGENCFG_SNOOPEN 0x00000002 144 #define BONITO_BONGENCFG_CPUSELFRESET 0x00000004 145 146 #define BONITO_BONGENCFG_FORCE_IRQA 0x00000008 147 #define BONITO_BONGENCFG_IRQA_ISOUT 0x00000010 148 #define BONITO_BONGENCFG_IRQA_FROM_INT1 0x00000020 149 #define BONITO_BONGENCFG_BYTESWAP 0x00000040 150 151 #define BONITO_BONGENCFG_UNCACHED 0x00000080 152 #define BONITO_BONGENCFG_PREFETCHEN 0x00000100 153 #define BONITO_BONGENCFG_WBEHINDEN 0x00000200 154 #define BONITO_BONGENCFG_CACHEALG 0x00000c00 155 #define BONITO_BONGENCFG_CACHEALG_SHIFT 10 156 #define BONITO_BONGENCFG_PCIQUEUE 0x00001000 157 #define BONITO_BONGENCFG_CACHESTOP 0x00002000 158 #define BONITO_BONGENCFG_MSTRBYTESWAP 0x00004000 159 #define BONITO_BONGENCFG_BUSERREN 0x00008000 160 #define BONITO_BONGENCFG_NORETRYTIMEOUT 0x00010000 161 #define BONITO_BONGENCFG_SHORTCOPYTIMEOUT 0x00020000 162 163 /* 2. IO & IDE configuration */ 164 165 #define BONITO_IODEVCFG BONITO(BONITO_REGBASE + 0x08) 166 167 /* 3. IO & IDE configuration */ 168 169 #define BONITO_SDCFG BONITO(BONITO_REGBASE + 0x0c) 170 171 /* 4. PCI address map control */ 172 173 #define BONITO_PCIMAP BONITO(BONITO_REGBASE + 0x10) 174 #define BONITO_PCIMEMBASECFG BONITO(BONITO_REGBASE + 0x14) 175 #define BONITO_PCIMAP_CFG BONITO(BONITO_REGBASE + 0x18) 176 177 /* 5. ICU & GPIO regs */ 178 179 /* GPIO Regs - r/w */ 180 181 #define BONITO_GPIODATA_OFFSET 0x1c 182 #define BONITO_GPIODATA BONITO(BONITO_REGBASE + BONITO_GPIODATA_OFFSET) 183 #define BONITO_GPIOIE BONITO(BONITO_REGBASE + 0x20) 184 185 /* ICU Configuration Regs - r/w */ 186 187 #define BONITO_INTEDGE BONITO(BONITO_REGBASE + 0x24) 188 #define BONITO_INTSTEER BONITO(BONITO_REGBASE + 0x28) 189 #define BONITO_INTPOL BONITO(BONITO_REGBASE + 0x2c) 190 191 /* ICU Enable Regs - IntEn & IntISR are r/o. */ 192 193 #define BONITO_INTENSET BONITO(BONITO_REGBASE + 0x30) 194 #define BONITO_INTENCLR BONITO(BONITO_REGBASE + 0x34) 195 #define BONITO_INTEN BONITO(BONITO_REGBASE + 0x38) 196 #define BONITO_INTISR BONITO(BONITO_REGBASE + 0x3c) 197 198 /* PCI mail boxes */ 199 200 #define BONITO_PCIMAIL0_OFFSET 0x40 201 #define BONITO_PCIMAIL1_OFFSET 0x44 202 #define BONITO_PCIMAIL2_OFFSET 0x48 203 #define BONITO_PCIMAIL3_OFFSET 0x4c 204 #define BONITO_PCIMAIL0 BONITO(BONITO_REGBASE + 0x40) 205 #define BONITO_PCIMAIL1 BONITO(BONITO_REGBASE + 0x44) 206 #define BONITO_PCIMAIL2 BONITO(BONITO_REGBASE + 0x48) 207 #define BONITO_PCIMAIL3 BONITO(BONITO_REGBASE + 0x4c) 208 209 210 /* 6. PCI cache */ 211 212 #define BONITO_PCICACHECTRL BONITO(BONITO_REGBASE + 0x50) 213 #define BONITO_PCICACHETAG BONITO(BONITO_REGBASE + 0x54) 214 215 #define BONITO_PCIBADADDR BONITO(BONITO_REGBASE + 0x58) 216 #define BONITO_PCIMSTAT BONITO(BONITO_REGBASE + 0x5c) 217 218 219 /* 220 #define BONITO_PCIRDPOST BONITO(BONITO_REGBASE + 0x60) 221 #define BONITO_PCIDATA BONITO(BONITO_REGBASE + 0x64) 222 */ 223 224 #define LS2F_CHIPCFG0 BONITO(BONITO_REGBASE + 0x80) 225 #define LS2FCFG_FREQSCALE_MASK 0x00000007 226 #define LS2FCFG_DISABLE_SCACHE 0x00000008 /* disable secondary cache */ 227 #define LS2FCFG_BUFFER_CPU_TO_RAM 0x00000020 228 #define LS2FCFG_BUFFER_PCI_TO_RAM 0x00000040 229 230 /* 7. IDE DMA & Copier */ 231 232 #define BONITO_CONFIGBASE 0x000 233 #define BONITO_BONITOBASE 0x100 234 #define BONITO_LDMABASE 0x200 235 #define BONITO_COPBASE 0x300 236 #define BONITO_REG_BLOCKMASK 0x300 237 238 #define BONITO_LDMACTRL BONITO(BONITO_LDMABASE + 0x0) 239 #define BONITO_LDMASTAT BONITO(BONITO_LDMABASE + 0x0) 240 #define BONITO_LDMAADDR BONITO(BONITO_LDMABASE + 0x4) 241 #define BONITO_LDMAGO BONITO(BONITO_LDMABASE + 0x8) 242 #define BONITO_LDMADATA BONITO(BONITO_LDMABASE + 0xc) 243 244 #define BONITO_COPCTRL BONITO(BONITO_COPBASE + 0x0) 245 #define BONITO_COPSTAT BONITO(BONITO_COPBASE + 0x0) 246 #define BONITO_COPPADDR BONITO(BONITO_COPBASE + 0x4) 247 #define BONITO_COPDADDR BONITO(BONITO_COPBASE + 0x8) 248 #define BONITO_COPGO BONITO(BONITO_COPBASE + 0xc) 249 250 251 /* ###### Bit Definitions for individual Registers #### */ 252 253 /* Gen DMA. */ 254 255 #define BONITO_IDECOPDADDR_DMA_DADDR 0x0ffffffc 256 #define BONITO_IDECOPDADDR_DMA_DADDR_SHIFT 2 257 #define BONITO_IDECOPPADDR_DMA_PADDR 0xfffffffc 258 #define BONITO_IDECOPPADDR_DMA_PADDR_SHIFT 2 259 #define BONITO_IDECOPGO_DMA_SIZE 0x0000fffe 260 #define BONITO_IDECOPGO_DMA_SIZE_SHIFT 0 261 #define BONITO_IDECOPGO_DMA_WRITE 0x00010000 262 #define BONITO_IDECOPGO_DMAWCOUNT 0x000f0000 263 #define BONITO_IDECOPGO_DMAWCOUNT_SHIFT 16 264 265 #define BONITO_IDECOPCTRL_DMA_STARTBIT 0x80000000 266 #define BONITO_IDECOPCTRL_DMA_RSTBIT 0x40000000 267 268 /* DRAM - sdCfg */ 269 270 #define BONITO_SDCFG_AROWBITS 0x00000003 271 #define BONITO_SDCFG_AROWBITS_SHIFT 0 272 #define BONITO_SDCFG_ACOLBITS 0x0000000c 273 #define BONITO_SDCFG_ACOLBITS_SHIFT 2 274 #define BONITO_SDCFG_ABANKBIT 0x00000010 275 #define BONITO_SDCFG_ASIDES 0x00000020 276 #define BONITO_SDCFG_AABSENT 0x00000040 277 #define BONITO_SDCFG_AWIDTH64 0x00000080 278 279 #define BONITO_SDCFG_BROWBITS 0x00000300 280 #define BONITO_SDCFG_BROWBITS_SHIFT 8 281 #define BONITO_SDCFG_BCOLBITS 0x00000c00 282 #define BONITO_SDCFG_BCOLBITS_SHIFT 10 283 #define BONITO_SDCFG_BBANKBIT 0x00001000 284 #define BONITO_SDCFG_BSIDES 0x00002000 285 #define BONITO_SDCFG_BABSENT 0x00004000 286 #define BONITO_SDCFG_BWIDTH64 0x00008000 287 288 #define BONITO_SDCFG_EXTRDDATA 0x00010000 289 #define BONITO_SDCFG_EXTRASCAS 0x00020000 290 #define BONITO_SDCFG_EXTPRECH 0x00040000 291 #define BONITO_SDCFG_EXTRASWIDTH 0x00180000 292 #define BONITO_SDCFG_EXTRASWIDTH_SHIFT 19 293 #define BONITO_SDCFG_DRAMMODESET 0x00200000 294 #define BONITO_SDCFG_DRAMEXTREGS 0x00400000 295 #define BONITO_SDCFG_DRAMPARITY 0x00800000 296 #define BONITO_SDCFG_DRAMBURSTLEN 0x03000000 297 #define BONITO_SDCFG_DRAMBURSTLEN_SHIFT 24 298 #define BONITO_SDCFG_DRAMMODESET_DONE 0x80000000 299 300 #define BONITO_SDCFG_DRAMRFSHMULT 0xfc000000 301 #define BONITO_SDCFG_DRAMRFSHMULT_SHIFT 26 302 303 /* PCI Cache - pciCacheCtrl */ 304 305 #define BONITO_PCICACHECTRL_CACHECMD 0x00000007 306 #define BONITO_PCICACHECTRL_CACHECMD_SHIFT 0 307 #define BONITO_PCICACHECTRL_CACHECMDLINE 0x00000018 308 #define BONITO_PCICACHECTRL_CACHECMDLINE_SHIFT 3 309 #define BONITO_PCICACHECTRL_CMDEXEC 0x00000020 310 311 #define BONITO_IODEVCFG_BUFFBIT_CS0 0x00000001 312 #define BONITO_IODEVCFG_SPEEDBIT_CS0 0x00000002 313 #define BONITO_IODEVCFG_MOREABITS_CS0 0x00000004 314 315 #define BONITO_IODEVCFG_BUFFBIT_CS1 0x00000008 316 #define BONITO_IODEVCFG_SPEEDBIT_CS1 0x00000010 317 #define BONITO_IODEVCFG_MOREABITS_CS1 0x00000020 318 319 #define BONITO_IODEVCFG_BUFFBIT_CS2 0x00000040 320 #define BONITO_IODEVCFG_SPEEDBIT_CS2 0x00000080 321 #define BONITO_IODEVCFG_MOREABITS_CS2 0x00000100 322 323 #define BONITO_IODEVCFG_BUFFBIT_CS3 0x00000200 324 #define BONITO_IODEVCFG_SPEEDBIT_CS3 0x00000400 325 #define BONITO_IODEVCFG_MOREABITS_CS3 0x00000800 326 327 #define BONITO_IODEVCFG_BUFFBIT_IDE 0x00001000 328 #define BONITO_IODEVCFG_SPEEDBIT_IDE 0x00002000 329 #define BONITO_IODEVCFG_WORDSWAPBIT_IDE 0x00004000 330 #define BONITO_IODEVCFG_MODEBIT_IDE 0x00008000 331 #define BONITO_IODEVCFG_DMAON_IDE 0x001f0000 332 #define BONITO_IODEVCFG_DMAON_IDE_SHIFT 16 333 #define BONITO_IODEVCFG_DMAOFF_IDE 0x01e00000 334 #define BONITO_IODEVCFG_DMAOFF_IDE_SHIFT 21 335 #define BONITO_IODEVCFG_EPROMSPLIT 0x02000000 336 #define BONITO_IODEVCFG_CPUCLOCKPERIOD 0xfc000000 337 #define BONITO_IODEVCFG_CPUCLOCKPERIOD_SHIFT 26 338 339 /* gpio */ 340 #define BONITO_GPIO_GPIOW 0x000003ff 341 #define BONITO_GPIO_GPIOW_SHIFT 0 342 #define BONITO_GPIO_GPIOR 0x01ff0000 343 #define BONITO_GPIO_GPIOR_SHIFT 16 344 #define BONITO_GPIO_GPINR 0xfe000000 345 #define BONITO_GPIO_GPINR_SHIFT 25 346 #define BONITO_GPIO_IOW(N) (1<<(BONITO_GPIO_GPIOW_SHIFT+(N))) 347 #define BONITO_GPIO_IOR(N) (1<<(BONITO_GPIO_GPIOR_SHIFT+(N))) 348 #define BONITO_GPIO_INR(N) (1<<(BONITO_GPIO_GPINR_SHIFT+(N))) 349 350 /* ICU */ 351 #define BONITO_ICU_MBOXES 0x0000000f 352 #define BONITO_ICU_MBOXES_SHIFT 0 353 #define BONITO_ICU_DMARDY 0x00000010 354 #define BONITO_ICU_DMAEMPTY 0x00000020 355 #define BONITO_ICU_COPYRDY 0x00000040 356 #define BONITO_ICU_COPYEMPTY 0x00000080 357 #define BONITO_ICU_COPYERR 0x00000100 358 #define BONITO_ICU_PCIIRQ 0x00000200 359 #define BONITO_ICU_MASTERERR 0x00000400 360 #define BONITO_ICU_SYSTEMERR 0x00000800 361 #define BONITO_ICU_DRAMPERR 0x00001000 362 #define BONITO_ICU_RETRYERR 0x00002000 363 #define BONITO_ICU_GPIOS 0x01ff0000 364 #define BONITO_ICU_GPIOS_SHIFT 16 365 #define BONITO_ICU_GPINS 0x7e000000 366 #define BONITO_ICU_GPINS_SHIFT 25 367 #define BONITO_ICU_MBOX(N) (1<<(BONITO_ICU_MBOXES_SHIFT+(N))) 368 #define BONITO_ICU_GPIO(N) (1<<(BONITO_ICU_GPIOS_SHIFT+(N))) 369 #define BONITO_ICU_GPIN(N) (1<<(BONITO_ICU_GPINS_SHIFT+(N))) 370 371 /* pcimap */ 372 373 #define BONITO_PCIMAP_PCIMAP_LO0 0x0000003f 374 #define BONITO_PCIMAP_PCIMAP_LO0_SHIFT 0 375 #define BONITO_PCIMAP_PCIMAP_LO1 0x00000fc0 376 #define BONITO_PCIMAP_PCIMAP_LO1_SHIFT 6 377 #define BONITO_PCIMAP_PCIMAP_LO2 0x0003f000 378 #define BONITO_PCIMAP_PCIMAP_LO2_SHIFT 12 379 #define BONITO_PCIMAP_PCIMAP_2 0x00040000 380 #define BONITO_PCIMAP_WIN(WIN,ADDR) ((((ADDR)>>26) & BONITO_PCIMAP_PCIMAP_LO0) << ((WIN)*6)) 381 382 #define BONITO_PCIMAP_WINSIZE (1<<26) 383 #define BONITO_PCIMAP_WINOFFSET(ADDR) ((ADDR) & (BONITO_PCIMAP_WINSIZE - 1)) 384 #define BONITO_PCIMAP_WINBASE(ADDR) ((ADDR) << 26) 385 386 /* pcimembaseCfg */ 387 388 #define BONITO_PCIMEMBASECFG_MASK 0xf0000000 389 #define BONITO_PCIMEMBASECFG_MEMBASE0_MASK 0x0000001f 390 #define BONITO_PCIMEMBASECFG_MEMBASE0_MASK_SHIFT 0 391 #define BONITO_PCIMEMBASECFG_MEMBASE0_TRANS 0x000003e0 392 #define BONITO_PCIMEMBASECFG_MEMBASE0_TRANS_SHIFT 5 393 #define BONITO_PCIMEMBASECFG_MEMBASE0_CACHED 0x00000400 394 #define BONITO_PCIMEMBASECFG_MEMBASE0_IO 0x00000800 395 396 #define BONITO_PCIMEMBASECFG_MEMBASE1_MASK 0x0001f000 397 #define BONITO_PCIMEMBASECFG_MEMBASE1_MASK_SHIFT 12 398 #define BONITO_PCIMEMBASECFG_MEMBASE1_TRANS 0x003e0000 399 #define BONITO_PCIMEMBASECFG_MEMBASE1_TRANS_SHIFT 17 400 #define BONITO_PCIMEMBASECFG_MEMBASE1_CACHED 0x00400000 401 #define BONITO_PCIMEMBASECFG_MEMBASE1_IO 0x00800000 402 403 #define BONITO_PCIMEMBASECFG_ASHIFT 23 404 #define BONITO_PCIMEMBASECFG_AMASK 0x007fffff 405 #define BONITO_PCIMEMBASECFGSIZE(WIN,SIZE) (((~((SIZE)-1))>>(BONITO_PCIMEMBASECFG_ASHIFT-BONITO_PCIMEMBASECFG_MEMBASE##WIN##_MASK_SHIFT)) & BONITO_PCIMEMBASECFG_MEMBASE##WIN##_MASK) 406 #define BONITO_PCIMEMBASECFGBASE(WIN,BASE) (((BASE)>>(BONITO_PCIMEMBASECFG_ASHIFT-BONITO_PCIMEMBASECFG_MEMBASE##WIN##_TRANS_SHIFT)) & BONITO_PCIMEMBASECFG_MEMBASE##WIN##_TRANS) 407 408 #define BONITO_PCIMEMBASECFG_SIZE(WIN,CFG) (((((~(CFG)) & BONITO_PCIMEMBASECFG_MEMBASE##WIN##_MASK)) << (BONITO_PCIMEMBASECFG_ASHIFT - BONITO_PCIMEMBASECFG_MEMBASE##WIN##_MASK_SHIFT)) | BONITO_PCIMEMBASECFG_AMASK) 409 410 #define BONITO_PCIMEMBASECFG_ADDRMASK(WIN,CFG) ((((CFG) & BONITO_PCIMEMBASECFG_MEMBASE##WIN##_MASK) >> BONITO_PCIMEMBASECFG_MEMBASE##WIN##_MASK_SHIFT) << BONITO_PCIMEMBASECFG_ASHIFT) 411 #define BONITO_PCIMEMBASECFG_ADDRMASK(WIN,CFG) ((((CFG) & BONITO_PCIMEMBASECFG_MEMBASE##WIN##_MASK) >> BONITO_PCIMEMBASECFG_MEMBASE##WIN##_MASK_SHIFT) << BONITO_PCIMEMBASECFG_ASHIFT) 412 #define BONITO_PCIMEMBASECFG_ADDRTRANS(WIN,CFG) ((((CFG) & BONITO_PCIMEMBASECFG_MEMBASE##WIN##_TRANS) >> BONITO_PCIMEMBASECFG_MEMBASE##WIN##_TRANS_SHIFT) << BONITO_PCIMEMBASECFG_ASHIFT) 413 414 #define BONITO_PCITOPHYS(WIN,ADDR,CFG) ( \ 415 (((ADDR) & (~(BONITO_PCIMEMBASECFG_MASK))) & (~(BONITO_PCIMEMBASECFG_ADDRMASK(WIN,CFG)))) | \ 416 (BONITO_PCIMEMBASECFG_ADDRTRANS(WIN,CFG)) \ 417 ) 418 /* PCIMAP Cfg */ 419 420 #define BONITO_PCIMAPCFG_TYPE1 0x00010000 421 422 /* PCICmd */ 423 424 #define BONITO_PCICMD_MEMEN 0x00000002 425 #define BONITO_PCICMD_MSTREN 0x00000004 426 427 428 #define BONITO_TIMERCFG BONITO(BONITO_REGBASE + 0x60) 429 430 /* 431 * Bonito interrupt assignments 432 */ 433 434 /* 435 * Loongson 2F assignments 436 */ 437 438 #define LOONGSON_INTR_GPIO0 0 439 #define LOONGSON_INTR_GPIO1 1 440 #define LOONGSON_INTR_GPIO2 2 441 #define LOONGSON_INTR_GPIO3 3 442 443 /* pci interrupts */ 444 #define LOONGSON_INTR_PCIA 4 445 #define LOONGSON_INTR_PCIB 5 446 #define LOONGSON_INTR_PCIC 6 447 #define LOONGSON_INTR_PCID 7 448 449 #define LOONGSON_INTR_PCI_PARERR 8 450 #define LOONGSON_INTR_PCI_SYSERR 9 451 #define LOONGSON_INTR_DRAM_PARERR 10 452 453 /* non-PCI interrupts */ 454 #define LOONGSON_INTR_INT0 11 455 #define LOONGSON_INTR_INT1 12 456 #define LOONGSON_INTR_INT2 13 457 #define LOONGSON_INTR_INT3 14 458 459 #define LOONGSON_INTRMASK_GPIO0 0x00000001 /* can't interrupt */ 460 #define LOONGSON_INTRMASK_GPIO1 0x00000002 461 #define LOONGSON_INTRMASK_GPIO2 0x00000004 462 #define LOONGSON_INTRMASK_GPIO3 0x00000008 463 464 #define LOONGSON_INTRMASK_GPIO 0x0000000f 465 466 /* pci interrupts */ 467 #define LOONGSON_INTRMASK_PCIA 0x00000010 468 #define LOONGSON_INTRMASK_PCIB 0x00000020 469 #define LOONGSON_INTRMASK_PCIC 0x00000040 470 #define LOONGSON_INTRMASK_PCID 0x00000080 471 472 #define LOONGSON_INTRMASK_PCI_PARERR 0x00000100 473 #define LOONGSON_INTRMASK_PCI_SYSERR 0x00000200 474 #define LOONGSON_INTRMASK_DRAM_PARERR 0x00000400 475 476 /* non-PCI interrupts */ 477 #define LOONGSON_INTRMASK_INT0 0x00000800 478 #define LOONGSON_INTRMASK_INT1 0x00001000 479 #define LOONGSON_INTRMASK_INT2 0x00002000 480 #define LOONGSON_INTRMASK_INT3 0x00004000 481 482 #define LOONGSON_INTRMASK_LVL0 0x00007800 /* not maskable in bonito */ 483 #define LOONGSON_INTRMASK_LVL4 0x000007ff 484 485 /* 486 * Loongson 2E (Bonito64) assignments 487 */ 488 489 #define BONITO_INTRMASK_MBOX 0x0000000f 490 #define BONITO_INTR_MBOX 0 491 #define BONITO_INTRMASK_DMARDY 0x00000010 492 #define BONITO_INTRMASK_DMAEMPTY 0x00000020 493 #define BONITO_INTRMASK_COPYRDY 0x00000040 494 #define BONITO_INTRMASK_COPYEMPTY 0x00000080 495 #define BONITO_INTRMASK_COPYERR 0x00000100 496 #define BONITO_INTRMASK_PCIIRQ 0x00000200 497 #define BONITO_INTRMASK_MASTERERR 0x00000400 498 #define BONITO_INTRMASK_SYSTEMERR 0x00000800 499 #define BONITO_INTRMASK_DRAMPERR 0x00001000 500 #define BONITO_INTRMASK_RETRYERR 0x00002000 501 #define BONITO_INTRMASK_GPIO 0x01ff0000 502 #define BONITO_INTR_GPIO 16 503 #define BONITO_INTRMASK_GPIN 0x7e000000 504 #define BONITO_INTR_GPIN 25 505 506 /* 507 * Bonito interrupt handling recipes: 508 * - we have up to 32 interrupts at the Bonito level. 509 * - systems with ISA devices also have 16 (well, 15) ISA interrupts with the 510 * usual 8259 pair. Bonito and ISA interrupts happen on two different levels. 511 * 512 * These arbitrary values may be changed as long as interrupt mask variables 513 * use large enough integer types and always use the following macros to 514 * handle interrupt masks. 515 */ 516 517 #define INTPRI_BONITO (INTPRI_CLOCK + 1) 518 #define INTPRI_ISA (INTPRI_BONITO + 1) 519 520 #define BONITO_NDIRECT 32 521 #define BONITO_NISA 16 522 #define BONITO_NINTS (BONITO_NDIRECT + BONITO_NISA) 523 #define BONITO_ISA_IRQ(i) ((i) + BONITO_NDIRECT) 524 #define BONITO_DIRECT_IRQ(i) (i) 525 #define BONITO_IRQ_IS_ISA(i) ((i) >= BONITO_NDIRECT) 526 #define BONITO_IRQ_TO_ISA(i) ((i) - BONITO_NDIRECT) 527 528 #define BONITO_DIRECT_MASK(imask) ((imask) & ((1L << BONITO_NDIRECT) - 1)) 529 #define BONITO_ISA_MASK(imask) ((imask) >> BONITO_NDIRECT) 530 531 #endif /* _BONITO_H_ */ 532
Indexes created Thu Sep 25 16:09:42 GMT 2025