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    Searched defs:LVDS (Results 1 - 10 of 10) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/engine/disp/
ior.h 31 LVDS,
  /src/sys/external/bsd/drm2/dist/drm/radeon/
smu7.h 163 LVDS,
  /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/inc/
smu7.h 182 LVDS,
smu71.h 474 LVDS,
smu72.h 554 LVDS,
smu73.h 545 LVDS,
smu74.h 608 LVDS,
smu75.h 502 LVDS,
  /src/sys/external/bsd/drm/dist/shared-core/
i915_reg.h 377 #define LVDS 0x61180
409 * The i830 generation, in LVDS mode, defines P1 as the bit number set within
674 /* LVDS port control */
675 #define LVDS 0x61180
677 * Enables the LVDS port. This bit must be set before DPLLs are enabled, as
678 * the DPLL semantics change when the LVDS is assigned to that pipe.
681 /* Selects pipe B for LVDS data. Must be set on pre-965. */
722 * - LVDS/DVOB/DVOC on
  /src/sys/external/bsd/drm2/dist/drm/i915/
i915_reg.h 3422 * The i830 generation, in LVDS mode, defines P1 as the bit number set within
4750 /* LVDS port control */
4751 #define LVDS _MMIO(0x61180)
4753 * Enables the LVDS port. This bit must be set before DPLLs are enabled, as
4754 * the DPLL semantics change when the LVDS is assigned to that pipe.
4757 /* Selects pipe B for LVDS data. Must be set on pre-965. */
4764 /* LVDS dithering flag on 965/g4x platform */
4766 /* LVDS sync polarity flags. Set to invert (i.e. negative) */
4875 * - LVDS/DVOB/DVOC on

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