1 /* $NetBSD: pte.h,v 1.15 2026/04/02 07:44:30 skrll Exp $ */ 2 3 /*- 4 * Copyright (c) 2014 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Matt Thomas of 3am Software Foundry. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #ifndef _AARCH64_PTE_H_ 33 #define _AARCH64_PTE_H_ 34 35 #ifdef __aarch64__ 36 37 #ifndef _LOCORE 38 typedef uint64_t pd_entry_t; /* L0(512G) / L1(1G) / L2(2M) table entry */ 39 40 #ifndef __BSD_PTENTRY_T__ 41 #define __BSD_PTENTRY_T__ 42 typedef uint64_t pt_entry_t; /* L3(4k) table entry */ 43 #define PRIxPTE PRIx64 44 #endif /* __BSD_PTENTRY_T__ */ 45 46 #endif /* _LOCORE */ 47 48 /* 49 * translation table, block, and page descriptors 50 */ 51 #define LX_TBL_NSTABLE __BIT(63) /* inherited next level */ 52 #define LX_TBL_APTABLE __BITS(62,61) /* inherited next level */ 53 #define LX_TBL_APTABLE_NOEFFECT __SHIFTIN(0,LX_TBL_APTABLE) 54 #define LX_TBL_APTABLE_EL0_NOACCESS __SHIFTIN(1,LX_TBL_APTABLE) 55 #define LX_TBL_APTABLE_RO __SHIFTIN(2,LX_TBL_APTABLE) 56 #define LX_TBL_APTABLE_RO_EL0_NOREAD __SHIFTIN(3,LX_TBL_APTABLE) 57 #define LX_TBL_UXNTABLE __BIT(60) /* inherited next level */ 58 #define LX_TBL_PXNTABLE __BIT(59) /* inherited next level */ 59 #define LX_BLKPAG_OS __BITS(58, 55) 60 #define LX_BLKPAG_OS_0 __SHIFTIN(1,LX_BLKPAG_OS) 61 #define LX_BLKPAG_OS_1 __SHIFTIN(2,LX_BLKPAG_OS) 62 #define LX_BLKPAG_OS_2 __SHIFTIN(4,LX_BLKPAG_OS) 63 #define LX_BLKPAG_OS_3 __SHIFTIN(8,LX_BLKPAG_OS) 64 #define LX_BLKPAG_UXN __BIT(54) /* Unprivileged Execute Never */ 65 #define LX_BLKPAG_XN __BIT(54) /* Execute Never (EL2) */ 66 #define LX_BLKPAG_PXN __BIT(53) /* Privileged Execute Never */ 67 #define LX_S2_BLKPAG_XN __BITS(54,53) /* Execute Never (stage2) */ 68 #define LX_S2_BLKPAG_XN_XN __SHIFTIN(1,LX_S2_BLKPAG_XN) 69 #define LX_BLKPAG_CONTIG __BIT(52) /* Hint of TLB cache */ 70 #define LX_BLKPAG_DBM __BIT(51) /* Dirty Bit Modifier (V8.1) */ 71 #define LX_BLKPAG_GP __BIT(50) /* Guarded Page (V8.5) */ 72 #define LX_TBL_PA __BITS(47, 12) 73 #define LX_BLKPAG_OA __BITS(47, 12) 74 #define LX_BLKPAG_NG __BIT(11) /* Not Global */ 75 #define LX_S2_BLKPAG_FnXS __BIT(11) 76 #define LX_BLKPAG_AF __BIT(10) /* Access Flag */ 77 #define LX_BLKPAG_SH __BITS(9,8) /* Shareability */ 78 #define LX_BLKPAG_SH_NS __SHIFTIN(0,LX_BLKPAG_SH) /* Non Shareable */ 79 #define LX_BLKPAG_SH_OS __SHIFTIN(2,LX_BLKPAG_SH) /* Outer Shareable */ 80 #define LX_BLKPAG_SH_IS __SHIFTIN(3,LX_BLKPAG_SH) /* Inner Shareable */ 81 #define LX_BLKPAG_AP __BIT(7) 82 #define LX_BLKPAG_AP_RW __SHIFTIN(0,LX_BLKPAG_AP) /* RW */ 83 #define LX_BLKPAG_AP_RO __SHIFTIN(1,LX_BLKPAG_AP) /* RO */ 84 #define LX_BLKPAG_APUSER __BIT(6) 85 #define LX_S2_BLKPAG_AP1_RES1 __BIT(6) /* EL2 */ 86 #define LX_S2_BLKPAG_S2AP __BITS(7,6) 87 #define LX_S2_BLKPAG_S2AP_NA __SHIFTIN(0,LX_S2_BLKPAG_S2AP) /* No access */ 88 #define LX_S2_BLKPAG_S2AP_RO __SHIFTIN(1,LX_S2_BLKPAG_S2AP) /* Read-only */ 89 #define LX_S2_BLKPAG_S2AP_WO __SHIFTIN(2,LX_S2_BLKPAG_S2AP) /* Write-only */ 90 #define LX_S2_BLKPAG_S2AP_RW __SHIFTIN(3,LX_S2_BLKPAG_S2AP) /* Read/Write */ 91 #define LX_BLKPAG_NS __BIT(5) 92 #define LX_BLKPAG_ATTR_INDX __BITS(4,2) /* refer MAIR_EL1 attr<n> */ 93 #define LX_BLKPAG_ATTR_INDX_0 __SHIFTIN(0,LX_BLKPAG_ATTR_INDX) 94 #define LX_BLKPAG_ATTR_INDX_1 __SHIFTIN(1,LX_BLKPAG_ATTR_INDX) 95 #define LX_BLKPAG_ATTR_INDX_2 __SHIFTIN(2,LX_BLKPAG_ATTR_INDX) 96 #define LX_BLKPAG_ATTR_INDX_3 __SHIFTIN(3,LX_BLKPAG_ATTR_INDX) 97 #define LX_S2_BLKPAG_MEMATTR __BITS(5,2) 98 #define LX_S2_BLKPAG_MEMATTR_nGnRnE __SHIFTIN(0x0,LX_S2_BLKPAG_MEMATTR) 99 #define LX_S2_BLKPAG_MEMATTR_nGnRE __SHIFTIN(0x1,LX_S2_BLKPAG_MEMATTR) 100 #define LX_S2_BLKPAG_MEMATTR_nGRE __SHIFTIN(0x2,LX_S2_BLKPAG_MEMATTR) 101 #define LX_S2_BLKPAG_MEMATTR_GRE __SHIFTIN(0x3,LX_S2_BLKPAG_MEMATTR) 102 #define LX_S2_BLKPAG_MEMATTR_NC __SHIFTIN(0x5,LX_S2_BLKPAG_MEMATTR) 103 #define LX_S2_BLKPAG_MEMATTR_WT __SHIFTIN(0xa,LX_S2_BLKPAG_MEMATTR) 104 #define LX_S2_BLKPAG_MEMATTR_WB __SHIFTIN(0xf,LX_S2_BLKPAG_MEMATTR) 105 106 #define LX_TYPE __BIT(1) 107 #define LX_TYPE_BLK __SHIFTIN(0, LX_TYPE) 108 #define LX_TYPE_TBL __SHIFTIN(1, LX_TYPE) 109 #define L3_TYPE_PAG __SHIFTIN(1, LX_TYPE) 110 #define LX_VALID __BIT(0) 111 112 #define L1_BLK_OA __BITS(47, 30) /* 1GB */ 113 #define L2_BLK_OA __BITS(47, 21) /* 2MB */ 114 #define L3_PAG_OA __BITS(47, 12) /* 4KB */ 115 #define AARCH64_MAX_PA __BIT(48) 116 117 118 /* L0 table, 512GB/entry * 512 */ 119 #define L0_SHIFT 39 120 #define L0_ADDR_BITS __BITS(47,39) 121 #define L0_SIZE (1UL << L0_SHIFT) 122 #define L0_OFFSET (L0_SIZE - 1UL) 123 #define L0_FRAME (~L0_OFFSET) 124 /* L0_BLOCK Level 0 doesn't support block translation */ 125 #define L0_TABLE (LX_TYPE_TBL | LX_VALID) 126 127 /* L1 table, 1GB/entry * 512 */ 128 #define L1_SHIFT 30 129 #define L1_ADDR_BITS __BITS(38,30) 130 #define L1_SIZE (1UL << L1_SHIFT) 131 #define L1_OFFSET (L1_SIZE - 1UL) 132 #define L1_FRAME (~L1_OFFSET) 133 #define L1_BLOCK (LX_TYPE_BLK | LX_VALID) 134 #define L1_TABLE (LX_TYPE_TBL | LX_VALID) 135 136 /* L2 table, 2MB/entry * 512 */ 137 #define L2_SHIFT 21 138 #define L2_ADDR_BITS __BITS(29,21) 139 #define L2_SIZE (1UL << L2_SHIFT) 140 #define L2_OFFSET (L2_SIZE - 1UL) 141 #define L2_FRAME (~L2_OFFSET) 142 #define L2_BLOCK (LX_TYPE_BLK | LX_VALID) 143 #define L2_TABLE (LX_TYPE_TBL | LX_VALID) 144 #define L2_BLOCK_MASK __BITS(47,21) 145 146 /* L3 table, 4KB/entry * 512 */ 147 #define L3_SHIFT 12 148 #define L3_ADDR_BITS __BITS(20,12) 149 #define L3_SIZE (1UL << L3_SHIFT) 150 #define L3_OFFSET (L3_SIZE - 1UL) 151 #define L3_FRAME (~L3_OFFSET) 152 #define L3_PAGE (L3_TYPE_PAG | LX_VALID) 153 154 #define Ln_ENTRIES_SHIFT 9 155 #define Ln_ENTRIES (1 << Ln_ENTRIES_SHIFT) 156 #define Ln_TABLE_SIZE (8 << Ln_ENTRIES_SHIFT) 157 158 #elif defined(__arm__) 159 160 #include <arm/pte.h> 161 162 #endif /* __aarch64__/__arm__ */ 163 164 #endif /* _AARCH64_PTE_H_ */ 165
Indexes created Wed Oct 14 00:28:03 UTC 2026