| /xsrc/external/mit/MesaLib/dist/src/mesa/program/ |
| prog_instruction.c | 84 enum prog_opcode Opcode;
92 * \note Opcode should equal array index!
159 * Return the number of src registers for the given instruction/opcode.
162 _mesa_num_inst_src_regs(enum prog_opcode opcode)
164 assert(opcode < MAX_OPCODE);
165 assert(opcode == InstInfo[opcode].Opcode);
166 assert(OPCODE_XPD == InstInfo[OPCODE_XPD].Opcode);
167 return InstInfo[opcode].NumSrcRegs
[all...] |
| prog_instruction.h | 223 enum prog_opcode Opcode;
274 _mesa_num_inst_src_regs(enum prog_opcode opcode);
277 _mesa_num_inst_dst_regs(enum prog_opcode opcode);
280 _mesa_is_tex_instruction(enum prog_opcode opcode);
286 _mesa_opcode_string(enum prog_opcode opcode);
|
| /xsrc/external/mit/MesaLib.old/dist/src/mesa/program/ |
| prog_instruction.c | 82 enum prog_opcode Opcode;
90 * \note Opcode should equal array index!
157 * Return the number of src registers for the given instruction/opcode.
160 _mesa_num_inst_src_regs(enum prog_opcode opcode)
162 assert(opcode < MAX_OPCODE);
163 assert(opcode == InstInfo[opcode].Opcode);
164 assert(OPCODE_XPD == InstInfo[OPCODE_XPD].Opcode);
165 return InstInfo[opcode].NumSrcRegs
[all...] |
| prog_instruction.h | 223 enum prog_opcode Opcode;
274 _mesa_num_inst_src_regs(enum prog_opcode opcode);
277 _mesa_num_inst_dst_regs(enum prog_opcode opcode);
280 _mesa_is_tex_instruction(enum prog_opcode opcode);
286 _mesa_opcode_string(enum prog_opcode opcode);
|
| /xsrc/external/mit/MesaLib/dist/src/mesa/main/ |
| atifragshader.h | 23 GLenum opcode; member in struct:ati_fs_opcode_st
50 GLenum Opcode[2];
59 GLenum Opcode;
|
| /xsrc/external/mit/MesaLib.old/dist/src/mesa/main/ |
| atifragshader.h | 23 GLenum opcode; member in struct:ati_fs_opcode_st
50 GLenum Opcode[2];
59 GLenum Opcode;
|
| dlist.c | 99 struct gl_list_instruction Opcode[MAX_DLIST_EXT_OPCODES];
566 } OpCode;
587 OpCode opcode; member in union:gl_dlist_node
706 if (n[0].opcode == OPCODE_BITMAP) {
708 if (n[0].opcode == OPCODE_END_OF_LIST)
722 return n[0].opcode == OPCODE_END_OF_LIST;
831 assert(n[0].opcode == OPCODE_BITMAP);
915 assert(n[0].opcode == OPCODE_BITMAP ||
916 n[0].opcode == OPCODE_END_OF_LIST)
1040 const OpCode opcode = n[0].opcode; local
9289 const OpCode opcode = n[0].opcode; local
11746 const OpCode opcode = n[0].opcode; local
[all...] |
| /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/r300/compiler/ |
| radeon_program_pair.h | 72 unsigned int Opcode:8;
|
| radeon_program.h | 65 rc_presubtract_op Opcode;
82 * Opcode of this instruction, according to \ref rc_opcode enums.
84 unsigned int Opcode:8;
|
| radeon_opcodes.h | 247 rc_opcode Opcode;
273 static inline const struct rc_opcode_info * rc_get_opcode_info(rc_opcode opcode)
275 assert((unsigned int)opcode < MAX_RC_OPCODE);
276 assert(rc_opcodes[opcode].Opcode == opcode);
278 return &rc_opcodes[opcode];
|
| /xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/r300/compiler/ |
| radeon_program_pair.h | 72 unsigned int Opcode:8;
|
| radeon_program.h | 65 rc_presubtract_op Opcode;
82 * Opcode of this instruction, according to \ref rc_opcode enums.
84 unsigned int Opcode:8;
|
| radeon_opcodes.h | 247 rc_opcode Opcode;
273 static inline const struct rc_opcode_info * rc_get_opcode_info(rc_opcode opcode)
275 assert((unsigned int)opcode < MAX_RC_OPCODE);
276 assert(rc_opcodes[opcode].Opcode == opcode);
278 return &rc_opcodes[opcode];
|
| /xsrc/external/mit/MesaLib/dist/src/asahi/compiler/ |
| agx_opcodes.py | 28 class Opcode(object):
64 opcodes[name] = Opcode(name, dests, srcs, imms, is_float, can_eliminate, encoding_16, encoding_32)
126 def funop(name, opcode):
127 op(name, (0x0A | L | (opcode << 28),
|
| /xsrc/external/mit/MesaLib/dist/src/compiler/nir/ |
| nir_opcodes.py | 28 # Class that represents all the information we have about the opcode
31 class Opcode(object):
32 """Class that represents all the information we have about the opcode
39 - name is the name of the opcode (prepend nir_op_ for the enum name)
42 - is_conversion is true if this opcode represents a type conversion
46 constant value of the opcode given the constant values of its inputs.
155 def opcode(name, output_size, output_type, input_sizes, input_types, function
158 opcodes[name] = Opcode(name, output_size, output_type, input_sizes,
163 opcode(name, 0, out_type, [0], [in_type], False, "", const_expr)
166 opcode(name, 0, ty, [0], [ty], False, "", const_expr
[all...] |
| /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/r600/sfn/ |
| sfn_instruction_tex.h | 36 enum Opcode {
75 TexInstruction(Opcode op, const GPRVector& dest, const GPRVector& src, unsigned sid,
80 unsigned opcode() const {return m_opcode;} function in class:r600::TexInstruction
123 static const char *opname(Opcode code);
125 Opcode m_opcode;
|
| /xsrc/external/mit/MesaLib.old/dist/src/compiler/nir/ |
| nir_opcodes.py | 28 # Class that represents all the information we have about the opcode
31 class Opcode(object):
32 """Class that represents all the information we have about the opcode
39 - name is the name of the opcode (prepend nir_op_ for the enum name)
42 - is_conversion is true if this opcode represents a type conversion
46 constant value of the opcode given the constant values of its inputs.
143 def opcode(name, output_size, output_type, input_sizes, input_types, function
146 opcodes[name] = Opcode(name, output_size, output_type, input_sizes,
151 opcode(name, 0, out_type, [0], [in_type], False, "", const_expr)
154 opcode(name, 0, ty, [0], [ty], False, "", const_expr
[all...] |
| /xsrc/external/mit/MesaLib/dist/src/amd/compiler/ |
| aco_opcodes.py | 24 # Class that represents all the information we have about the opcode
186 class Opcode(object):
187 """Class that represents all the information we have about the opcode
193 - name is the name of the opcode (prepend nir_op_ for the enum name)
199 constant value of the opcode given the constant values of its inputs.
249 def opcode(name, opcode_gfx7 = -1, opcode_gfx9 = -1, opcode_gfx10 = -1, format = Format.PSEUDO, cls = InstrClass.Other, input_mod = False, output_mod = False, is_atomic = False): function
251 opcodes[name] = Opcode(name, opcode_gfx7, opcode_gfx9, opcode_gfx10, format, input_mod, output_mod, is_atomic, cls)
260 opcode("exp", 0, 0, 0, format = Format.EXP, cls = InstrClass.Export)
261 opcode("p_parallelcopy")
262 opcode("p_startpgm"
[all...] |
| /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/r300/compiler/tests/ |
| rc_test_helpers.c | 351 struct match_info Opcode;
385 tokens.Opcode.String = inst_str + matches[1].rm_so;
386 tokens.Opcode.Length = match_length(matches, 1);
400 if (strncmp(tokens.Opcode.String, info->Name, tokens.Opcode.Length)) {
403 inst->U.I.Opcode = info->Opcode;
|
| /xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/r300/compiler/tests/ |
| rc_test_helpers.c | 351 struct match_info Opcode;
385 tokens.Opcode.String = inst_str + matches[1].rm_so;
386 tokens.Opcode.Length = match_length(matches, 1);
400 if (strncmp(tokens.Opcode.String, info->Name, tokens.Opcode.Length)) {
403 inst->U.I.Opcode = info->Opcode;
|
| /xsrc/external/mit/xf86-video-ati/dist/src/AtomBios/includes/ |
| CD_Structs.h | 343 UINT8 Opcode;
353 UINT8 Opcode;
358 UINT8 Opcode;
363 UINT8 Opcode;
368 UINT8 Opcode;
|
| /xsrc/external/mit/MesaLib/dist/src/gallium/include/pipe/ |
| p_shader_tokens.h | 625 * Opcode is the operation code to execute. A given operation defines the
640 unsigned Opcode : 8; /* TGSI_OPCODE_ */
|
| /xsrc/external/mit/MesaLib.old/dist/src/gallium/include/pipe/ |
| p_shader_tokens.h | 620 * Opcode is the operation code to execute. A given operation defines the
635 unsigned Opcode : 8; /* TGSI_OPCODE_ */
|
